airoha: reduce HWRNG quality

Backport a patch that reduces the quality of HWRNG. HWRNG has lower
entropy than expected. Thanks to this patch, it has a lower priority.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/21722
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

.github/workflows/build-on-comment.yml

@@ -1,164 +0,0 @@
-name: Build on Comment
-
-on:
-  issue_comment:
-    types: [created, edited]
-
-permissions:
-  pull-requests: write
-
-concurrency:
-  group: build-on-comment-${{ github.event.issue.number || github.event.pull_request.number }}
-  cancel-in-progress: true
-
-jobs:
-  check-and-build:
-    if: github.event.issue.pull_request != null
-    runs-on: ubuntu-latest
-
-    steps:
-      - name: Check if user is in reviewers team
-        id: check-reviewer
-        run: |
-          USERNAME="${{ github.event.comment.user.login }}"
-
-          STATUS_CODE=$(curl -s -H "Authorization: token ${{ secrets.LOOKUP_MEMBERS }}" \
-                -o response.json -w "%{http_code}" \
-                https://api.github.com/orgs/openwrt/teams/reviewers/memberships/$USERNAME)
-
-          if grep -q '"state": "active"' response.json && [ "$STATUS_CODE" -eq 200 ]; then
-            echo "authorized=true" >> $GITHUB_OUTPUT
-          else
-            echo "authorized=false" >> $GITHUB_OUTPUT
-          fi
-
-      - name: Parse build command
-        if: steps.check-reviewer.outputs.authorized == 'true'
-        id: parse-command
-        run: |
-          COMMENT="${{ github.event.comment.body }}"
-          if echo "$COMMENT" | grep -q "build [a-zA-Z0-9_-]\+/[a-zA-Z0-9_-]\+/[a-zA-Z0-9_-]\+"; then
-            BUILD_PATH=$(echo "$COMMENT" | grep -o "build [a-zA-Z0-9_-]\+/[a-zA-Z0-9_-]\+/[a-zA-Z0-9_-]\+" | sed 's/build //')
-            TARGET=$(echo "$BUILD_PATH" | cut -d'/' -f1)
-            SUBTARGET=$(echo "$BUILD_PATH" | cut -d'/' -f2)
-            PROFILE=$(echo "$BUILD_PATH" | cut -d'/' -f3)
-            echo "build_requested=true" >> $GITHUB_OUTPUT
-            echo "target=$TARGET" >> $GITHUB_OUTPUT
-            echo "subtarget=$SUBTARGET" >> $GITHUB_OUTPUT
-            echo "profile=$PROFILE" >> $GITHUB_OUTPUT
-            echo "build_path=$BUILD_PATH" >> $GITHUB_OUTPUT
-          else
-            echo "build_requested=false" >> $GITHUB_OUTPUT
-          fi
-
-      - name: Find existing build comment
-        if: steps.parse-command.outputs.build_requested == 'true'
-        id: find-comment
-        uses: peter-evans/find-comment@v2
-        with:
-          issue-number: ${{ github.event.pull_request.number || github.event.issue.number }}
-          comment-author: "github-actions[bot]"
-
-      - name: Create early build comment
-        if: steps.parse-command.outputs.build_requested == 'true'
-        id: start-comment
-        uses: peter-evans/create-or-update-comment@v3
-        with:
-          issue-number: ${{ github.event.pull_request.number || github.event.issue.number }}
-          comment-id: ${{ steps.find-comment.outputs.comment-id }}
-          body: |
-            🚧 **Build in progress for** `${{ steps.parse-command.outputs.build_path }}`...
-
-            You can follow progress [here](https://github.com/${{ github.repository }}/actions/runs/${{ github.run_id }})
-
-            *Triggered by: @${{ github.event.comment.user.login }}*
-          edit-mode: replace
-
-      - name: Checkout repository
-        if: steps.parse-command.outputs.build_requested == 'true'
-        uses: actions/checkout@v4
-        with:
-          token: ${{ secrets.GITHUB_TOKEN }}
-          fetch-depth: 0
-          ref: refs/pull/${{ github.event.issue.number }}/merge
-
-      - name: Setup build environment
-        if: steps.parse-command.outputs.build_requested == 'true'
-        continue-on-error: true
-        run: |
-          sudo apt-get update
-          sudo apt-get install -y build-essential libncurses5-dev gawk git subversion libssl-dev gettext zlib1g-dev swig unzip time rsync
-
-      - name: Build target
-        if: steps.parse-command.outputs.build_requested == 'true'
-        id: build
-        run: |
-          make defconfig
-          echo "CONFIG_DEVEL=y" > .config
-          echo "CONFIG_BPF_TOOLCHAIN_HOST=y" >> .config
-          echo "CONFIG_TARGET_${{ steps.parse-command.outputs.target }}=y" >> .config
-          echo "CONFIG_TARGET_${{ steps.parse-command.outputs.target }}_${{ steps.parse-command.outputs.subtarget }}=y" >> .config
-          echo "CONFIG_TARGET_${{ steps.parse-command.outputs.target }}_${{ steps.parse-command.outputs.subtarget }}_DEVICE_${{ steps.parse-command.outputs.profile }}=y" >> .config
-
-          make defconfig
-          make -j$(nproc) BUILD_LOG=1
-
-          echo "build_success=true" >> $GITHUB_OUTPUT
-
-      - name: Upload log
-        uses: actions/upload-artifact@v4
-        if: steps.check-reviewer.outputs.authorized == 'true' && (success() || failure())
-        with:
-          name: build-log-${{ steps.parse-command.outputs.target }}-${{ steps.parse-command.outputs.subtarget }}-${{ steps.parse-command.outputs.profile }}
-          path: logs/
-
-      - name: Create artifact archive
-        if: steps.build.outputs.build_success == 'true'
-        run: |
-          cd bin/
-          tar -czf ../build-artifacts.tar.gz *
-          cd ..
-
-      - name: Upload build artifacts
-        if: steps.build.outputs.build_success == 'true'
-        uses: actions/upload-artifact@v4
-        with:
-          name: build-${{ steps.parse-command.outputs.target }}-${{ steps.parse-command.outputs.subtarget }}-${{ steps.parse-command.outputs.profile }}
-          path: build-artifacts.tar.gz
-
-      - name: Update comment with build results
-        if: steps.build.outputs.build_success == 'true'
-        uses: peter-evans/create-or-update-comment@v3
-        with:
-          comment-id: ${{ steps.start-comment.outputs.comment-id }}
-          issue-number: ${{ github.event.pull_request.number || github.event.issue.number }}
-          body: |
-            ## Build Results for `${{ steps.parse-command.outputs.build_path }}`
-
-            ✅ **Build completed successfully!**
-
-            **Target:** `${{ steps.parse-command.outputs.target }}`
-            **Subtarget:** `${{ steps.parse-command.outputs.subtarget }}`
-            **Profile:** `${{ steps.parse-command.outputs.profile }}`
-
-            📦 **Artifacts:** [Download build-${{ steps.parse-command.outputs.target }}-${{ steps.parse-command.outputs.subtarget }}-${{ steps.parse-command.outputs.profile }}](https://github.com/${{ github.repository }}/actions/runs/${{ github.run_id }})
-
-            *Build triggered by: @${{ github.event.comment.user.login }}*
-            *Last updated: ${{ github.event.comment.created_at }}*
-          edit-mode: replace
-
-      - name: Update comment on build failure
-        if: steps.parse-command.outputs.build_requested == 'true' && steps.build.outputs.build_success == 'false'
-        uses: peter-evans/create-or-update-comment@v3
-        with:
-          comment-id: ${{ steps.start-comment.outputs.comment-id }}
-          issue-number: ${{ github.event.pull_request.number || github.event.issue.number }}
-          body: |
-            ## Build Results for `${{ steps.parse-command.outputs.build_path }}`
-
-            ❌ **Build failed!**
-
-            Please check the [action logs](https://github.com/${{ github.repository }}/actions/runs/${{ github.run_id }}) for more details.
-
-            *Build triggered by: @${{ github.event.comment.user.login }}*
-          edit-mode: replace

.github/workflows/build-pr-profile.yml

@@ -0,0 +1,12 @@
+name: Build PR Profile
+
+on:
+  pull_request:
+    types: [opened, edited, synchronize]
+
+permissions:
+  pull-requests: write
+
+jobs:
+  build-pr-profile:
+    uses: openwrt/actions-shared-workflows/.github/workflows/build-pr-profile.yml@main

config/Config-kernel.in

@@ -413,6 +413,102 @@ config KERNEL_PREEMPT_TRACER
 	  enabled. This option and the irqs-off timing option can be
 	  used together or separately.)
 
+config KERNEL_HWLAT_TRACER
+	bool "Tracer to detect hardware latencies (like SMIs)"
+	depends on KERNEL_FTRACE
+	help
+	  This tracer, when enabled will create one or more kernel threads,
+	  depending on what the cpumask file is set to, which each thread
+	  spinning in a loop looking for interruptions caused by
+	  something other than the kernel. For example, if a
+	  System Management Interrupt (SMI) takes a noticeable amount of
+	  time, this tracer will detect it. This is useful for testing
+	  if a system is reliable for Real Time tasks.
+
+	  Some files are created in the tracing directory when this
+	  is enabled:
+
+	    hwlat_detector/width   - time in usecs for how long to spin for
+	    hwlat_detector/window  - time in usecs between the start of each
+				     iteration
+
+	  A kernel thread is created that will spin with interrupts disabled
+	  for "width" microseconds in every "window" cycle. It will not spin
+	  for "window - width" microseconds, where the system can
+	  continue to operate.
+
+	  The output will appear in the trace and trace_pipe files.
+
+	  When the tracer is not running, it has no affect on the system,
+	  but when it is running, it can cause the system to be
+	  periodically non responsive. Do not run this tracer on a
+	  production system.
+
+	  To enable this tracer, echo in "hwlat" into the current_tracer
+	  file. Every time a latency is greater than tracing_thresh, it will
+	  be recorded into the ring buffer.
+
+config KERNEL_OSNOISE_TRACER
+	bool "OS Noise tracer"
+	depends on KERNEL_FTRACE
+	help
+	  In the context of high-performance computing (HPC), the Operating
+	  System Noise (osnoise) refers to the interference experienced by an
+	  application due to activities inside the operating system. In the
+	  context of Linux, NMIs, IRQs, SoftIRQs, and any other system thread
+	  can cause noise to the system. Moreover, hardware-related jobs can
+	  also cause noise, for example, via SMIs.
+
+	  The osnoise tracer leverages the hwlat_detector by running a similar
+	  loop with preemption, SoftIRQs and IRQs enabled, thus allowing all
+	  the sources of osnoise during its execution. The osnoise tracer takes
+	  note of the entry and exit point of any source of interferences,
+	  increasing a per-cpu interference counter. It saves an interference
+	  counter for each source of interference. The interference counter for
+	  NMI, IRQs, SoftIRQs, and threads is increased anytime the tool
+	  observes these interferences' entry events. When a noise happens
+	  without any interference from the operating system level, the
+	  hardware noise counter increases, pointing to a hardware-related
+	  noise. In this way, osnoise can account for any source of
+	  interference. At the end of the period, the osnoise tracer prints
+	  the sum of all noise, the max single noise, the percentage of CPU
+	  available for the thread, and the counters for the noise sources.
+
+	  In addition to the tracer, a set of tracepoints were added to
+	  facilitate the identification of the osnoise source.
+
+	  The output will appear in the trace and trace_pipe files.
+
+	  To enable this tracer, echo in "osnoise" into the current_tracer
+	  file.
+
+config KERNEL_TIMERLAT_TRACER
+	bool "Timerlat tracer"
+	depends on KERNEL_FTRACE
+	help
+	  The timerlat tracer aims to help the preemptive kernel developers
+	  to find sources of wakeup latencies of real-time threads.
+
+	  The tracer creates a per-cpu kernel thread with real-time priority.
+	  The tracer thread sets a periodic timer to wakeup itself, and goes
+	  to sleep waiting for the timer to fire. At the wakeup, the thread
+	  then computes a wakeup latency value as the difference between
+	  the current time and the absolute time that the timer was set
+	  to expire.
+
+	  The tracer prints two lines at every activation. The first is the
+	  timer latency observed at the hardirq context before the
+	  activation of the thread. The second is the timer latency observed
+	  by the thread, which is the same level that cyclictest reports. The
+	  ACTIVATION ID field serves to relate the irq execution to its
+	  respective thread execution.
+
+	  The tracer is build on top of osnoise tracer, and the osnoise:
+	  events can be used to trace the source of interference from NMI,
+	  IRQs and other threads. It also enables the capture of the
+	  stacktrace at the IRQ context, which helps to identify the code
+	  path that can cause thread delay.
+
 config KERNEL_HIST_TRIGGERS
 	bool "Histogram triggers"
 	depends on KERNEL_FTRACE
@@ -1181,6 +1277,7 @@ config KERNEL_NET_L3_MASTER_DEV
 config KERNEL_DCB
 	bool "Data Center Bridging support"
 	default y if TARGET_armsr_armv8
+	default y if TARGET_microchipsw
 	default y if TARGET_x86_64
 	help
 	  This enables support for configuring Data Center Bridging (DCB)
@@ -1492,3 +1589,72 @@ config KERNEL_WERROR
 	  and unusual warnings, or you have some architecture with problems,
 	  you may need to disable this config option in order to
 	  successfully build the kernel.
+
+choice
+	prompt "Preemption Model"
+	default KERNEL_PREEMPT_NONE
+
+config KERNEL_PREEMPT_NONE
+	bool "No Forced Preemption (Server)"
+	help
+	  This is the traditional Linux preemption model, geared towards
+	  throughput. It will still provide good latencies most of the
+	  time, but there are no guarantees and occasional longer delays
+	  are possible.
+
+	  Select this option if you are building a kernel for a server or
+	  scientific/computation system, or if you want to maximize the
+	  raw processing power of the kernel, irrespective of scheduling
+	  latencies.
+
+config KERNEL_PREEMPT_VOLUNTARY
+	bool "Voluntary Kernel Preemption (Desktop)"
+	help
+	  This option reduces the latency of the kernel by adding more
+	  "explicit preemption points" to the kernel code. These new
+	  preemption points have been selected to reduce the maximum
+	  latency of rescheduling, providing faster application reactions,
+	  at the cost of slightly lower throughput.
+
+	  This allows reaction to interactive events by allowing a
+	  low priority process to voluntarily preempt itself even if it
+	  is in kernel mode executing a system call. This allows
+	  applications to run more 'smoothly' even when the system is
+	  under load.
+
+	  Select this if you are building a kernel for a desktop system.
+
+config KERNEL_PREEMPT
+	bool "Preemptible Kernel (Low-Latency Desktop)"
+	help
+	  This option reduces the latency of the kernel by making
+	  all kernel code (that is not executing in a critical section)
+	  preemptible.  This allows reaction to interactive events by
+	  permitting a low priority process to be preempted involuntarily
+	  even if it is in kernel mode executing a system call and would
+	  otherwise not be about to reach a natural preemption point.
+	  This allows applications to run more 'smoothly' even when the
+	  system is under load, at the cost of slightly lower throughput
+	  and a slight runtime overhead to kernel code.
+
+	  Select this if you are building a kernel for a desktop or
+	  embedded system with latency requirements in the milliseconds
+	  range.
+
+config KERNEL_PREEMPT_RT
+	bool "Fully Preemptible Kernel (Real-Time)"
+	depends on (x86_64 || aarch64 || riscv64)
+	help
+	  This option turns the kernel into a real-time kernel by replacing
+	  various locking primitives (spinlocks, rwlocks, etc.) with
+	  preemptible priority-inheritance aware variants, enforcing
+	  interrupt threading and introducing mechanisms to break up long
+	  non-preemptible sections. This makes the kernel, except for very
+	  low level and critical code paths (entry code, scheduler, low
+	  level interrupt handling) fully preemptible and brings most
+	  execution contexts under scheduler control.
+
+	  Select this if you are building a kernel for systems which
+	  require real-time guarantees.
+
+endchoice

include/image.mk

@@ -41,6 +41,9 @@ KDIR=$(KERNEL_BUILD_DIR)
 KDIR_TMP=$(KDIR)/tmp
 DTS_DIR:=$(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/dts
 
+ifeq ($(EXTRA_IMAGE_NAME),)
+EXTRA_IMAGE_NAME:=$(call qstrip,$(CONFIG_EXTRA_IMAGE_NAME))
+endif
 IMG_PREFIX_EXTRA:=$(if $(EXTRA_IMAGE_NAME),$(call sanitize,$(EXTRA_IMAGE_NAME))-)
 IMG_PREFIX_VERNUM:=$(if $(CONFIG_VERSION_FILENAMES),$(call sanitize,$(VERSION_NUMBER))-)
 IMG_PREFIX_VERCODE:=$(if $(CONFIG_VERSION_CODE_FILENAMES),$(call sanitize,$(VERSION_CODE))-)

include/kernel.mk

@@ -212,9 +212,8 @@ define KernelPackage
     TITLE:=$(TITLE)
     SECTION:=kernel
     CATEGORY:=Kernel modules
-    DESCRIPTION:=$(DESCRIPTION)
-    EXTRA_DEPENDS:=kernel (=$(LINUX_VERSION)~$(LINUX_VERMAGIC)-r$(LINUX_RELEASE))
-    VERSION:=$(LINUX_VERSION)$(if $(PKG_VERSION),.$(PKG_VERSION))-r$(if $(PKG_RELEASE),$(PKG_RELEASE),$(LINUX_RELEASE))
+    EXTRA_DEPENDS:=kernel (=$(subst -rc,_rc,$(LINUX_VERSION))~$(LINUX_VERMAGIC)-r$(LINUX_RELEASE))
+    VERSION:=$(subst -rc,_rc,$(LINUX_VERSION))$(if $(PKG_VERSION),.$(PKG_VERSION))-r$(if $(PKG_RELEASE),$(PKG_RELEASE),$(LINUX_RELEASE))
     PKGFLAGS:=$(PKGFLAGS)
     $(call KernelPackage/$(1))
     $(call KernelPackage/$(1)/$(BOARD))
@@ -306,4 +305,3 @@ kernel_patchver_ge=$(call kernel_version_cmp,-ge,$(KERNEL_PATCHVER),$(1))
 kernel_patchver_eq=$(call kernel_version_cmp,-eq,$(KERNEL_PATCHVER),$(1))
 kernel_patchver_le=$(call kernel_version_cmp,-le,$(KERNEL_PATCHVER),$(1))
 kernel_patchver_lt=$(call kernel_version_cmp,-lt,$(KERNEL_PATCHVER),$(1))
-

include/netfilter.mk

@@ -358,7 +358,6 @@ $(eval $(if $(NF_KMOD),$(call nf_add,NFT_CONNLIMIT,CONFIG_NFT_CONNLIMIT, $(P_XT)
 IPT_BUILTIN += $(NF_IPT-y) $(NF_IPT-m)
 IPT_BUILTIN += $(IPT_CORE-y) $(IPT_CORE-m)
 IPT_BUILTIN += $(NF_CONNTRACK-y)
-IPT_BUILTIN += $(NF_CONNTRACK6-y)
 IPT_BUILTIN += $(IPT_CONNTRACK-y)
 IPT_BUILTIN += $(IPT_CONNTRACK_EXTRA-y)
 IPT_BUILTIN += $(IPT_EXTRA-y)

include/package-pack.mk

@@ -78,6 +78,196 @@ define FixupDependencies
   $(call AddDependency,$(1),$$(DEPS))
 endef
 
+# Format dependencies and extra dependencies
+#
+# ABI-version EXTRA_DEPENDS so dependencies can be correctly looked up using the
+# existing semantics without the ABI specified. This is needed since ABI-
+# versioned libraries don't provide `${package_name}=${package_version}`, so
+# that same library but with different ABI versions can be installed side by
+# side.
+#
+# Remove duplicate dependencies when EXTRA_DEPENDS specifies a versioned one
+# that is already in DEPENDS.
+#
+# 1: list of dependencies
+# 2: list of extra dependencies
+define FormatDepends
+$(strip
+  $(eval _COMMA_SEP := __COMMA_SEP__)
+  $(eval _SPACE_SEP := __SPACE_SEP__)
+  $(eval _DEPENDS := $(1))
+  $(eval _EXTRA_DEPENDS_ABI := )
+  $(eval _DEP_ITEMS := $(subst $(_COMMA_SEP),$(space),$(subst $(space),$(_SPACE_SEP),$(subst $(comma),$(_COMMA_SEP),$(2)))))
+
+  $(foreach dep,$(_DEP_ITEMS),
+    $(eval _EXTRA_DEP := )
+    $(eval _CUR_DEP := $(subst $(_SPACE_SEP),$(space),$(strip $(dep))))
+    $(eval _PKG_NAME := $(word 1,$(_CUR_DEP)))
+    $(if $(findstring $(paren_left), $(_PKG_NAME)),
+      $(error "Unsupported extra dependency format: no space before '(': $(_CUR_DEP)"))
+    )
+    $(eval _ABI_SUFFIX := $(call GetABISuffix,$(_PKG_NAME)))
+    $(eval _PKG_NAME_ABI := $(_PKG_NAME)$(_ABI_SUFFIX))
+    $(eval _VERSION_CONSTRAINT := $(word 2,$(_CUR_DEP)))
+    $(if $(_VERSION_CONSTRAINT),
+      $(eval _EXTRA_DEP := $(_PKG_NAME_ABI) $(_VERSION_CONSTRAINT)),
+      $(error "Extra dependencies must have version constraints. $(_PKG_NAME) seems to be unversioned.")
+    )
+    $(if $(and $(_EXTRA_DEPENDS_ABI),$(_EXTRA_DEP)),
+      $(eval _EXTRA_DEPENDS_ABI := $(_EXTRA_DEPENDS_ABI)$(comma)$(_EXTRA_DEP)),
+      $(eval _EXTRA_DEPENDS_ABI := $(_EXTRA_DEP))
+    )
+    $(if $(_DEPENDS),
+      $(eval _DEPENDS := $(filter-out $(_PKG_NAME_ABI),$(_DEPENDS)))
+    )
+  )
+
+  $(eval _DEPENDS := $(call mergelist,$(_DEPENDS)))
+  $(_EXTRA_DEPENDS_ABI)$(if $(_DEPENDS),$(comma) $(_DEPENDS))
+)
+endef
+
+# Format provide and add ABI and version if it's not a virtual provide marked
+# with an @.
+#
+# Same as for the base package name, if ABI version is set, provide both
+# unversioned provide and one with ABI version and version.
+#
+# 1: provide name
+# 2: provide version
+# 3: (optional) ABI version
+define AddProvide
+$(strip
+  $(if $(filter @%,$(1)),
+    $(patsubst @%,%,$(1)),
+    $(if $(3),
+      $(1) $(1)$(call FormatABISuffix,$(1),$(3))=$(2),
+      $(1)=$(2)
+    )
+  )
+)
+endef
+
+# Remove virtual provides prefix and self. apk doesn't like it when packages
+# specify a redundant provide pointing to self.
+#
+# 1: package name
+# 2: list of provides
+define SanitizeProvides
+$(filter-out $(1),$(patsubst @%,%,$(2)))
+endef
+
+# Format provides both for apk and control
+#
+# - If ABI version is defined:
+#   - package is named `${package_name}${ABI_version}`
+#     if a `package_name` ends in a number, the `ABI_version` will be prefixed
+#     with a - sign, e.g.: libsqlite3-0
+#   - package implicitly provides
+#     `${package_name}${ABI_version}=${package_version}`
+#     this implies that only one version of a package per ABI can be installed
+#     at the same time
+#   - additionally provide `${package_name}` so multiple packages can be looked
+#     up by its base name
+#   - for each `provides`:
+#     - provide `${provide}${ABI_version}=${package_version}`
+#       this implies that only one version of a provide can be installed at the
+#       same time
+#     - if a `provide` ends in a number, the `ABI_version` will be prefixed with
+#       a - sign, e.g.: provide1-0
+#     - additionally provide `${provide}` so multiple packages can be looked up
+#       by its base name
+#
+# - else if ABI version is _not_ defined
+#   - package is named `${package_name}`
+#   - package implicitly provides `${package_name}=${package_version}`
+#     this implies that only one version of a package can be installed at the
+#     same time
+#   - for each `provides`, provide `${provide}=${package_version}` this implies
+#     that only one version of a provide can be installed at the same time
+#
+# - Both with and without an ABI, if a provide starts with an @, treat it as a
+#   virtual provide, that doesn't own the name by not appending version.
+#   Multiple packages with the same virtual provides can be installed
+#   side-by-side.
+#
+# - apk doesn't like it when packages specify a redundant provide pointing to
+#   self. Filter it out, but keep virtual self provides, in the form of
+#   @(kmod-)?${package_name}-any.
+#
+# - Packages implicitly add a virtual @${package_name}-any provide in Package,
+#   which implies that kmods, which are also packages, will have a virtual
+#   @kmod-${package_name}-any provide.
+#
+# - Aside from the two aforementioned implicit provides, packages are expected
+#   to manage their provides themselves.
+#
+# - When multiple variants inside the same package have the same provide, a
+#   default variant must be set using DEFAULT_VARIANT:=1.
+#
+# - Cross-package provides must be virtual and a default variant must be set. If
+#   different packages provide the same versioned (i.e. non-virtual) provide the
+#   package with a higher version will be preferred, which results in unintended
+#   behavior, because the order might change with package updates.
+#
+#   Example:
+#   - both uclient-fetch and wget provide wget
+#   - wget doesn't have a default variant called wget that would provide an
+#     implicit @wget-any
+#     - add wget to PROVIDES for both wget-ssl and wget-nossl variants so they
+#       can't be installed at the same time
+#     - add @wget-any to both packages so packages outside of wget can provide
+#       it
+#   - uclient-fetch has only one variant
+#     - add @wget-any to PROVIDES
+#     - mark uclient-fetch as the default variant using DEFAULT_VARIANT:=1
+#   - switch wget consumer that don't depend on a specific version like apk to
+#     depend on @wget-any
+#
+# - Alternatives don't affect the packaging.
+#
+# 1: package name
+# 2: package version
+# 3: ABI version
+# 4: list of provides
+define FormatProvides
+$(strip
+  $(if $(call FormatABISuffix,$(1),$(3)),
+    $(1) $(foreach provide,
+      $(filter-out $(1),$(4)),
+      $(call AddProvide,$(provide),$(2),$(3))
+    ),
+    $(foreach provide,
+      $(filter-out $(1),$(4)),
+      $(call AddProvide,$(provide),$(2))
+    )
+  )
+)
+endef
+
+# Get apk provider priority
+#
+# - if a package is marked as a default variant, set it to 100.
+#
+# - if a package has an ABI version defined, set it to 10.
+#   The enables packages with an ABI version to be installed by their base name
+#   instead of a name and an ABI version, e.g.:
+#   libfoo3, where 3 is the ABI version can be installed by just libfoo.
+#   This affects manual installation only, as the dependency resolution takes
+#   care of ABI versions.
+#
+# - otherwise return nothing, i.e. package will have the default priority 0.
+#
+# 1: Default variant
+# 2: ABI version
+define GetProviderPriority
+$(strip
+  $(if $(1),100,
+    $(if $(2),10)
+  )
+)
+endef
+
 ifneq ($(PKG_NAME),toolchain)
   define CheckDependencies
 	@( \
@@ -191,17 +381,33 @@ endif
     $(STAGING_DIR_ROOT)/stamp/.$(1)_installed: $(PKG_BUILD_DIR)/.pkgdir/$(1).installed
 	mkdir -p $(STAGING_DIR_ROOT)/stamp
 	$(if $(ABI_VERSION),echo '$(ABI_VERSION)' | cmp -s - $(PKG_INFO_DIR)/$(1).version || { \
+		mkdir -p $(PKG_INFO_DIR); \
 		echo '$(ABI_VERSION)' > $(PKG_INFO_DIR)/$(1).version; \
-		$(foreach pkg,$(filter-out $(1),$(PROVIDES)), \
+		$(foreach pkg,$(call SanitizeProvides,$(1),$(PROVIDES)), \
 			cp $(PKG_INFO_DIR)/$(1).version $(PKG_INFO_DIR)/$(pkg).version; \
 		) \
 	} )
 	$(call locked,$(CP) $(PKG_BUILD_DIR)/.pkgdir/$(1)/. $(STAGING_DIR_ROOT)/,root-copy)
 	touch $$@
 
-    Package/$(1)/DEPENDS := $$(call mergelist,$$(foreach dep,$$(filter-out @%,$$(IDEPEND_$(1))),$$(dep)$$(call GetABISuffix,$$(dep))))
+    Package/$(1)/DEPENDS := $$(foreach dep,$$(filter-out @%,$$(IDEPEND_$(1))),$$(dep)$$(call GetABISuffix,$$(dep)))
     ifneq ($$(EXTRA_DEPENDS),)
-      Package/$(1)/DEPENDS := $$(EXTRA_DEPENDS)$$(if $$(Package/$(1)/DEPENDS),$$(comma) $$(Package/$(1)/DEPENDS))
+      ifeq ($(CONFIG_USE_APK),)
+        Package/$(1)/DEPENDS := $$(call mergelist,$$(Package/$(1)/DEPENDS))
+        Package/$(1)/DEPENDS := $$(EXTRA_DEPENDS)$$(if $$(Package/$(1)/DEPENDS),$$(comma) $$(Package/$(1)/DEPENDS))
+      else
+        Package/$(1)/DEPENDS := $$(call FormatDepends,$$(Package/$(1)/DEPENDS),$$(EXTRA_DEPENDS))
+      endif
+    else
+      Package/$(1)/DEPENDS := $$(call mergelist,$$(Package/$(1)/DEPENDS))
+    endif
+
+    ifeq ($(CONFIG_USE_APK),)
+      Package/$(1)/PROVIDES := $$(patsubst @%,%,$(PROVIDES))
+      Package/$(1)/PROVIDES := $$(filter-out $(1)$$(ABIV_$(1)),$$(Package/$(1)/PROVIDES)$$(if $$(ABIV_$(1)), $(1) $$(foreach provide,$$(Package/$(1)/PROVIDES),$$(provide)$$(ABIV_$(1)))))
+    else
+      Package/$(1)/PROVIDES := $$(call FormatProvides,$(1),$(VERSION),$(ABI_VERSION),$(PROVIDES))
+      Package/$(1)/PRIORITY := $$(call GetProviderPriority,$(DEFAULT_VARIANT),$(ABI_VERSION))
     endif
 
 $(_define) Package/$(1)/CONTROL
@@ -209,7 +415,7 @@ Package: $(1)$$(ABIV_$(1))
 Version: $(VERSION)
 $$(call addfield,Depends,$$(Package/$(1)/DEPENDS)
 )$$(call addfield,Conflicts,$$(call mergelist,$(CONFLICTS))
-)$$(call addfield,Provides,$$(call mergelist,$$(filter-out $(1)$$(ABIV_$(1)),$(PROVIDES)$$(if $$(ABIV_$(1)), $(1) $(foreach provide,$(PROVIDES),$(provide)$$(ABIV_$(1))))))
+)$$(call addfield,Provides,$$(call mergelist,$$(Package/$(1)/PROVIDES))
 )$$(call addfield,Alternatives,$$(call mergelist,$(ALTERNATIVES))
 )$$(call addfield,Source,$(SOURCE)
 )$$(call addfield,SourceName,$(PKG_NAME)
@@ -229,7 +435,7 @@ Installed-Size: 0
 $(_endef)
 
     $$(PACK_$(1)) : export CONTROL=$$(Package/$(1)/CONTROL)
-    $$(PACK_$(1)) : export DESCRIPTION=$$(Package/$(1)/description)
+    $$(PACK_$(1)) : $(call shexport,Package/$(1)/description)
     $$(PACK_$(1)) : export PATH=$$(TARGET_PATH_PKG)
     $$(PACK_$(1)) : export PKG_SOURCE_DATE_EPOCH:=$(PKG_SOURCE_DATE_EPOCH)
     $$(PACK_$(1)) : export SOURCE_DATE_EPOCH:=$(PKG_SOURCE_DATE_EPOCH)
@@ -253,7 +459,7 @@ endif
 			fi; \
 		done; $(Package/$(1)/extra_provides) \
 	) | sort -u > $(PKG_INFO_DIR)/$(1).provides
-	$(if $(PROVIDES),@for pkg in $(filter-out $(1),$(PROVIDES)); do cp $(PKG_INFO_DIR)/$(1).provides $(PKG_INFO_DIR)/$$$$pkg.provides; done)
+	$(if $(PROVIDES),@for pkg in $(call SanitizeProvides,$(1),$(PROVIDES)); do cp $(PKG_INFO_DIR)/$(1).provides $(PKG_INFO_DIR)/$$$$pkg.provides; done)
 	$(CheckDependencies)
 
 	$(RSTRIP) $$(IDIR_$(1))
@@ -287,7 +493,7 @@ ifeq ($(CONFIG_USE_APK),)
 	(cd $$(IDIR_$(1))/CONTROL; \
 		( \
 			echo "$$$$CONTROL"; \
-			printf "Description: "; echo "$$$$DESCRIPTION" | sed -e 's,^[[:space:]]*, ,g'; \
+			printf "Description: "; echo "$$$$$(call shvar,Package/$(1)/description)" | sed -e 's,^[[:space:]]*, ,g'; \
 		) > control; \
 		chmod 644 control; \
 		( \
@@ -320,24 +526,24 @@ else
 		echo "[ -s "\$$$${IPKG_INSTROOT}/lib/functions.sh" ] || exit 0"; \
 		echo ". \$$$${IPKG_INSTROOT}/lib/functions.sh"; \
 		echo 'export root="$$$${IPKG_INSTROOT}"'; \
-		echo 'export pkgname="$(1)"'; \
+		echo 'export pkgname="$(1)$$(ABIV_$(1))"'; \
 		echo "add_group_and_user"; \
 		echo "default_postinst"; \
-		[ ! -f $$(ADIR_$(1))/postinst-pkg ] || sed -z 's/^\s*#!/#!/' "$$(ADIR_$(1))/postinst-pkg"; \
+		[ ! -f $$(ADIR_$(1))/postinst-pkg ] || sed '/^\s*#!/d' "$$(ADIR_$(1))/postinst-pkg"; \
 	) > $$(ADIR_$(1))/post-install;
 
     ifdef Package/$(1)/preinst
 	( \
 		echo "#!/bin/sh"; \
 		echo 'export PKG_UPGRADE=1'; \
-		[ ! -f $$(ADIR_$(1))/preinst ] || sed -z 's/^\s*#!/#!/' "$$(ADIR_$(1))/preinst"; \
+		[ ! -f $$(ADIR_$(1))/preinst ] || sed '/^\s*#!/d' "$$(ADIR_$(1))/preinst"; \
 	) > $$(ADIR_$(1))/pre-upgrade;
     endif
 
 	( \
 		echo "#!/bin/sh"; \
 		echo 'export PKG_UPGRADE=1'; \
-		[ ! -f $$(ADIR_$(1))/post-install ] || sed -z 's/^\s*#!/#!/' "$$(ADIR_$(1))/post-install"; \
+		[ ! -f $$(ADIR_$(1))/post-install ] || sed '/^\s*#!/d' "$$(ADIR_$(1))/post-install"; \
 	) > $$(ADIR_$(1))/post-upgrade;
 
 	( \
@@ -345,34 +551,34 @@ else
 		echo "[ -s "\$$$${IPKG_INSTROOT}/lib/functions.sh" ] || exit 0"; \
 		echo ". \$$$${IPKG_INSTROOT}/lib/functions.sh"; \
 		echo 'export root="$$$${IPKG_INSTROOT}"'; \
-		echo 'export pkgname="$(1)"'; \
+		echo 'export pkgname="$(1)$$(ABIV_$(1))"'; \
 		echo "default_prerm"; \
-		[ ! -f $$(ADIR_$(1))/prerm-pkg ] || sed -z 's/^\s*#!/#!/' "$$(ADIR_$(1))/prerm-pkg"; \
+		[ ! -f $$(ADIR_$(1))/prerm-pkg ] || sed '/^\s*#!/d' "$$(ADIR_$(1))/prerm-pkg"; \
 	) > $$(ADIR_$(1))/pre-deinstall;
 
 	[ ! -f $$(ADIR_$(1))/postrm ] || sed -zi 's/^\s*#!/#!/' "$$(ADIR_$(1))/postrm";
 
-	if [ -n "$(USERID)" ]; then echo $(USERID) > $$(IDIR_$(1))/lib/apk/packages/$(1).rusers; fi;
-	if [ -n "$(ALTERNATIVES)" ]; then echo $(ALTERNATIVES) > $$(IDIR_$(1))/lib/apk/packages/$(1).alternatives; fi;
-	(cd $$(IDIR_$(1)) && find . -type f,l -printf "/%P\n" | sort > $(TMP_DIR)/$(1).list && mv $(TMP_DIR)/$(1).list $$(IDIR_$(1))/lib/apk/packages/$(1).list)
+	if [ -n "$(USERID)" ]; then echo $(USERID) > $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).rusers; fi;
+	if [ -n "$(ALTERNATIVES)" ]; then echo $(ALTERNATIVES) > $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).alternatives; fi;
+	(cd $$(IDIR_$(1)) && find . -type f,l -printf "/%P\n" | sort > $(TMP_DIR)/$(1).list && mv $(TMP_DIR)/$(1).list $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).list)
 	# Move conffiles to IDIR and build conffiles_static with csums
 	if [ -f $$(ADIR_$(1))/conffiles ]; then \
-		mv -f $$(ADIR_$(1))/conffiles $$(IDIR_$(1))/lib/apk/packages/$(1).conffiles; \
-		for file in $$$$(cat $$(IDIR_$(1))/lib/apk/packages/$(1).conffiles); do \
+		mv -f $$(ADIR_$(1))/conffiles $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).conffiles; \
+		for file in $$$$(cat $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).conffiles); do \
 			[ -f $$(IDIR_$(1))/$$$$file ] || continue; \
 			csum=$$$$($(MKHASH) sha256 $$(IDIR_$(1))/$$$$file); \
-			echo $$$$file $$$$csum >> $$(IDIR_$(1))/lib/apk/packages/$(1).conffiles_static; \
+			echo $$$$file $$$$csum >> $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).conffiles_static; \
 		done; \
 	fi
 
 	# Some package (base-files) manually append stuff to conffiles
 	# Append stuff from it and delete the CONTROL directory since everything else should be migrated
 	if [ -f $$(IDIR_$(1))/CONTROL/conffiles ]; then \
-		echo $$$$(IDIR_$(1))/CONTROL/conffiles >> $$(IDIR_$(1))/lib/apk/packages/$(1).conffiles; \
+		echo $$$$(IDIR_$(1))/CONTROL/conffiles >> $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).conffiles; \
 		for file in $$$$(cat $$(IDIR_$(1))/CONTROL/conffiles); do \
 			[ -f $$(IDIR_$(1))/$$$$file ] || continue; \
 			csum=$$$$($(MKHASH) sha256 $$(IDIR_$(1))/$$$$file); \
-			echo $$$$file $$$$csum >> $$(IDIR_$(1))/lib/apk/packages/$(1).conffiles_static; \
+			echo $$$$file $$$$csum >> $$(IDIR_$(1))/lib/apk/packages/$(1)$$(ABIV_$(1)).conffiles_static; \
 		done; \
 		rm -rf $$(IDIR_$(1))/CONTROL/conffiles; \
 	fi
@@ -394,17 +600,8 @@ else
 	  --info "origin:$(SOURCE)" \
 	  --info "url:$(URL)" \
 	  --info "maintainer:$(MAINTAINER)" \
-	  --info "provides:$$(foreach prov,\
-			$$(filter-out $(1)$$(ABIV_$(1)), \
-			$(PROVIDES)$$(if $$(ABIV_$(1)), \
-				$(1)=$(VERSION) $(foreach provide, \
-					$(PROVIDES), \
-					$(provide)$$(ABIV_$(1))=$(VERSION) \
-				) \
-			) \
-		), \
-		$$(prov) )" \
-	  $(if $(DEFAULT_VARIANT),--info "provider-priority:100",$(if $(PROVIDES),--info "provider-priority:1")) \
+	  $$(if $$(Package/$(1)/PROVIDES),--info "provides:$$(Package/$(1)/PROVIDES)") \
+	  $$(if $$(Package/$(1)/PRIORITY),--info "provider-priority:$$(Package/$(1)/PRIORITY)") \
 	  $$(APK_SCRIPTS_$(1)) \
 	  --info "depends:$$(foreach depends,$$(subst $$(comma),$$(space),$$(subst $$(space),,$$(subst $$(paren_right),,$$(subst $$(paren_left),,$$(Package/$(1)/DEPENDS))))),$$(depends))" \
 	  --files "$$(IDIR_$(1))" \

include/package.mk

@@ -332,9 +332,12 @@ define BuildPackage
   $(eval $(Package/Default))
   $(eval $(Package/$(1)))
 
-ifdef DESCRIPTION
-$$(error DESCRIPTION:= is obsolete, use Package/PKG_NAME/description)
-endif
+  # Add an implicit self-provide. apk can't handle self provides, be it
+  # versioned or virtual, so opt for a suffix instead. This allows several
+  # variants to provide the same virtual package without adding extra provides
+  # to the default one, e.g. wget implicitly provides wget-any and is marked as
+  # default, so wget-ssl can explicitly provide @wget-any as well.
+  $(eval PROVIDES:=$(strip @$(1)-any $(PROVIDES)))
 
 ifndef Package/$(1)/description
 define Package/$(1)/description
@@ -388,7 +391,7 @@ prepare-package-install:
 $(PACKAGE_DIR):
 	mkdir -p $@
 
-compile:
+compile: prepare-package-install
 .install: .compile
 install: compile
 

include/target.mk

@@ -359,7 +359,7 @@ endif
 
 define BuildTargets/DumpCurrent
   .PHONY: dumpinfo
-  dumpinfo : export DESCRIPTION=$$(Target/Description)
+  dumpinfo: $(call shexport,Target/Description)
   dumpinfo:
 	@echo 'Target: $(TARGETID)'; \
 	 echo 'Target-Board: $(BOARD)'; \
@@ -376,7 +376,7 @@ define BuildTargets/DumpCurrent
 	 echo 'Linux-Kernel-Arch: $(LINUX_KARCH)'; \
 	$(if $(SUBTARGET),,$(if $(DEFAULT_SUBTARGET), echo 'Default-Subtarget: $(DEFAULT_SUBTARGET)'; )) \
 	 echo 'Target-Description:'; \
-	 echo "$$$$DESCRIPTION"; \
+	 echo "$$$$$(call shvar,Target/Description);"; \
 	 echo '@@'; \
 	 $(if $(DEFAULT_PROFILE),echo 'Target-Default-Profile: $(DEFAULT_PROFILE)';) \
 	 echo 'Default-Packages: $(DEFAULT_PACKAGES)'; \

include/u-boot.mk

@@ -104,7 +104,7 @@ define Build/U-Boot/Target
       endif
     endif
     $(if $(DEFAULT),DEFAULT:=$(DEFAULT))
-    URL:=http://www.denx.de/wiki/U-Boot
+    URL:=https://docs.u-boot.org/en/latest/
   endef
 
   define Package/u-boot-$(1)/install

package/Makefile

@@ -105,7 +105,7 @@ ifneq ($(CONFIG_USE_APK),)
 		$$(cat $(TMP_DIR)/apk_install_list) \
 			"base-files=$(shell cat $(TMP_DIR)/base-files.version)" \
 			"libc=$(shell cat $(TMP_DIR)/libc.version)" \
-			"kernel=$(shell cat $(TMP_DIR)/kernel.version)"
+			"kernel=$(subst -rc,_rc,$(shell cat $(TMP_DIR)/kernel.version))"
 
 	rm -rf $(TARGET_DIR)/run
 else

package/base-files/Makefile

@@ -45,7 +45,7 @@ define Package/base-files
 	+SELINUX:procd-selinux +!SELINUX:procd +USE_SECCOMP:procd-seccomp \
 	+SELINUX:busybox-selinux +!SELINUX:busybox
   TITLE:=Base filesystem for OpenWrt
-  URL:=http://openwrt.org/
+  URL:=https://openwrt.org/
   VERSION:=$(PKG_RELEASE)~$(lastword $(subst -, ,$(REVISION)))
 endef
 

package/base-files/files/etc/group

@@ -5,7 +5,6 @@ mail:x:8:
 dialout:x:20:
 audio:x:29:
 www-data:x:33:
-ftp:x:55:
 users:x:100:
 network:x:101:
 nogroup:x:65534:

package/base-files/files/etc/passwd

@@ -1,5 +1,4 @@
 root:x:0:0:root:/root:/bin/ash
 daemon:*:1:1:daemon:/var:/bin/false
-ftp:*:55:55:ftp:/home/ftp:/bin/false
 network:*:101:101:network:/var:/bin/false
 nobody:*:65534:65534:nobody:/var:/bin/false

package/base-files/files/etc/shadow

@@ -1,5 +1,4 @@
 root:::0:99999:7:::
 daemon:*:0:0:99999:7:::
-ftp:*:0:0:99999:7:::
 network:*:0:0:99999:7:::
 nobody:*:0:0:99999:7:::

package/base-files/files/etc/uci-defaults/14_network-generate-duid

@@ -1,4 +1,4 @@
-[ "$(uci -q get network.globals.dhcp_default_duid)" != "auto" ] && exit 0
+[ "$(uci -q get network.globals.dhcp_default_duid || echo "auto")" != "auto" ] && exit 0
 
 uci -q batch <<-EOF >/dev/null
 	# DUID-UUID - RFC6355

package/base-files/files/etc/uci-defaults/15_migrate-time-zonename

@@ -0,0 +1,6 @@
+zonename="$(uci -q get system.@system[0].zonename)"
+case "$zonename" in
+        *[[:space:]]*) uci set system.@system[0].zonename="${zonename// /_}" ;;
+esac
+
+exit 0

package/base-files/files/lib/functions.sh

@@ -382,7 +382,7 @@ default_postinst() {
 			uci commit
 		fi
 
-		rm -f /tmp/luci-indexcache
+		rm -f /tmp/luci-indexcache.*
 	fi
 
 	if [ -f "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" ]; then

package/base-files/files/lib/functions/network.sh

@@ -24,6 +24,17 @@ __network_ifstatus() {
 	eval "$__tmp"
 }
 
+# determine the IAID of the given logical interface
+# 1: destination variable
+# 2: interface
+network_generate_iface_iaid() {
+	local __iaid
+
+	__iaid=$(printf '%s' "$2" | md5sum | cut -c 1-8)
+
+	export "$1=$__iaid"
+}
+
 # determine first IPv4 address of given logical interface
 # 1: destination variable
 # 2: interface

package/base-files/image-config.in

@@ -5,6 +5,14 @@
 # See /LICENSE for more information.
 #
 
+config EXTRA_IMAGE_NAME
+	string
+	prompt "Extra image filename" if IMAGEOPT
+	default ""
+	help
+		Add this to the output image filenames, to distinguish between
+		different builds for the same hardware type.
+
 config TARGET_DEFAULT_LAN_IP_FROM_PREINIT
 	bool "Use preinit IP configuration as default LAN IP" if IMAGEOPT
 	default n

package/boot/arm-trusted-firmware-mediatek/Makefile

@@ -30,6 +30,7 @@ define Trusted-Firmware-A/Default
   BOOT_DEVICE:=
   DDR3_FLYBY:=
   DDR3_FREQ_1866:=
+  DDR4_4BG_MODE:=
   DDR_TYPE:=
   NAND_TYPE:=
   BOARD_QFN:=
@@ -139,6 +140,14 @@ define Trusted-Firmware-A/mt7622-sdmmc-2ddr
   DDR3_FLYBY:=1
 endef
 
+define Trusted-Firmware-A/mt7981-nor-ddr4
+  NAME:=MediaTek MT7981 (SPI-NOR, DDR4)
+  BOOT_DEVICE:=nor
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7981
+  DDR_TYPE:=ddr4
+endef
+
 define Trusted-Firmware-A/mt7981-ram-ddr4
   NAME:=MediaTek MT7981 (RAM, DDR4)
   BOOT_DEVICE:=ram
@@ -158,6 +167,14 @@ define Trusted-Firmware-A/mt7981-emmc-ddr4
   DDR_TYPE:=ddr4
 endef
 
+define Trusted-Firmware-A/mt7981-sdmmc-ddr4
+  NAME:=MediaTek MT7981 (SD card, DDR4)
+  BOOT_DEVICE:=sdmmc
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7981
+  DDR_TYPE:=ddr4
+endef
+
 define Trusted-Firmware-A/mt7981-spim-nand-ddr4
   NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR4)
   BOOT_DEVICE:=spim-nand
@@ -186,14 +203,6 @@ define Trusted-Firmware-A/mt7981-ram-ddr3
   DEFAULT:=TARGET_mediatek_filogic
 endef
 
-define Trusted-Firmware-A/mt7981-nor-ddr4
-  NAME:=MediaTek MT7981 (SPI-NOR, DDR4)
-  BOOT_DEVICE:=nor
-  BUILD_SUBTARGET:=filogic
-  PLAT:=mt7981
-  DDR_TYPE:=ddr4
-endef
-
 define Trusted-Firmware-A/mt7981-emmc-ddr3
   NAME:=MediaTek MT7981 (eMMC, DDR3)
   BOOT_DEVICE:=emmc
@@ -202,8 +211,8 @@ define Trusted-Firmware-A/mt7981-emmc-ddr3
   DDR_TYPE:=ddr3
 endef
 
-define Trusted-Firmware-A/mt7981-emmc-ddr3-1866mhz
-  NAME:=MediaTek MT7981 (eMMC, DDR3 1866 MHz)
+define Trusted-Firmware-A/mt7981-emmc-ddr3-1866
+  NAME:=MediaTek MT7981 (eMMC, DDR3 1866 MT/s)
   BOOT_DEVICE:=emmc
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7981
@@ -235,8 +244,8 @@ define Trusted-Firmware-A/mt7981-spim-nand-ddr3
   DDR_TYPE:=ddr3
 endef
 
-define Trusted-Firmware-A/mt7981-spim-nand-ddr3-1866mhz
-  NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR3 1866 MHz)
+define Trusted-Firmware-A/mt7981-spim-nand-ddr3-1866
+  NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR3 1866 MT/s)
   BOOT_DEVICE:=spim-nand
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7981
@@ -244,8 +253,17 @@ define Trusted-Firmware-A/mt7981-spim-nand-ddr3-1866mhz
   DDR3_FREQ_1866:=1
 endef
 
-define Trusted-Firmware-A/mt7981-cudy-tr3000-v1
-  NAME:=Cudy TR3000 v1 (SPI-NAND via SPIM, DDR3)
+define Trusted-Firmware-A/mt7981-spim-nand-ubi-ddr4
+  NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR4)
+  BOOT_DEVICE:=spim-nand
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7981
+  DDR_TYPE:=ddr4
+  USE_UBI:=1
+endef
+
+define Trusted-Firmware-A/mt7981-cudy-ddr3
+  NAME:=Cudy (SPI-NAND via SPIM, DDR3)
   BOOT_DEVICE:=spim-nand
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7981
@@ -265,15 +283,6 @@ define Trusted-Firmware-A/mt7986-ram-ddr4
   DEFAULT:=TARGET_mediatek_filogic
 endef
 
-define Trusted-Firmware-A/mt7981-spim-nand-ubi-ddr4
-  NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR4)
-  BOOT_DEVICE:=spim-nand
-  BUILD_SUBTARGET:=filogic
-  PLAT:=mt7981
-  DDR_TYPE:=ddr4
-  USE_UBI:=1
-endef
-
 define Trusted-Firmware-A/mt7986-nor-ddr4
   NAME:=MediaTek MT7986 (SPI-NOR, DDR4)
   BOOT_DEVICE:=nor
@@ -399,7 +408,14 @@ define Trusted-Firmware-A/mt7987-emmc-comb
   BOOT_DEVICE:=emmc
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7987
-  DRAM_USE_COMB:=1
+endef
+
+define Trusted-Firmware-A/mt7987-emmc-ddr4-4bg
+  NAME:=MediaTek MT7987 (eMMC, DDR4 4GB)
+  BOOT_DEVICE:=emmc
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7987
+  DDR4_4BG_MODE:=1
 endef
 
 define Trusted-Firmware-A/mt7987-nor-comb
@@ -407,7 +423,6 @@ define Trusted-Firmware-A/mt7987-nor-comb
   BOOT_DEVICE:=nor
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7987
-  DRAM_USE_COMB:=1
 endef
 
 define Trusted-Firmware-A/mt7987-sdmmc-comb
@@ -415,7 +430,22 @@ define Trusted-Firmware-A/mt7987-sdmmc-comb
   BOOT_DEVICE:=sdmmc
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7987
-  DRAM_USE_COMB:=1
+endef
+
+define Trusted-Firmware-A/mt7987-sdmmc-ddr4-4bg
+  NAME:=MediaTek MT7987 (SD card, DDR4 4GB)
+  BOOT_DEVICE:=sdmmc
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7987
+  DDR4_4BG_MODE:=1
+endef
+
+define Trusted-Firmware-A/mt7987-spim-nand0
+  NAME:=MediaTek MT7987 (SPI-NAND via SPIM)
+  BOOT_DEVICE:=spim-nand
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7987
+  SPIM_CTRL:=0
 endef
 
 define Trusted-Firmware-A/mt7987-spim-nand0-ubi-comb
@@ -423,7 +453,6 @@ define Trusted-Firmware-A/mt7987-spim-nand0-ubi-comb
   BOOT_DEVICE:=spim-nand
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7987
-  DRAM_USE_COMB:=1
   USE_UBI:=1
   SPIM_CTRL:=0
 endef
@@ -433,7 +462,6 @@ define Trusted-Firmware-A/mt7987-spim-nand2-ubi-comb
   BOOT_DEVICE:=spim-nand
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7987
-  DRAM_USE_COMB:=1
   USE_UBI:=1
   SPIM_CTRL:=2
 endef
@@ -443,7 +471,6 @@ define Trusted-Firmware-A/mt7987-ram-comb
   BOOT_DEVICE:=ram
   BUILD_SUBTARGET:=filogic
   PLAT:=mt7987
-  DRAM_USE_COMB:=1
   RAM_BOOT_UART_DL:=1
   HIDDEN:=
   DEFAULT:=TARGET_mediatek_filogic
@@ -618,6 +645,34 @@ define Trusted-Firmware-A/mt7988-spim-nand-ubi-ddr4
   USE_UBI:=1
 endef
 
+define Trusted-Firmware-A/mt7988-emmc-comb-4bg
+  NAME:=MediaTek MT7988 (eMMC, DDR4 8GB)
+  BOOT_DEVICE:=emmc
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7988
+  DRAM_USE_COMB:=1
+  DDR4_4BG_MODE:=1
+endef
+
+define Trusted-Firmware-A/mt7988-sdmmc-comb-4bg
+  NAME:=MediaTek MT7988 (SD card, DDR4 8GB)
+  BOOT_DEVICE:=sdmmc
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7988
+  DRAM_USE_COMB:=1
+  DDR4_4BG_MODE:=1
+endef
+
+define Trusted-Firmware-A/mt7988-spim-nand-ubi-comb-4bg
+  NAME:=MediaTek MT7988 (SPI-NAND via SPIM, UBI, DDR4 8GB)
+  BOOT_DEVICE:=spim-nand
+  BUILD_SUBTARGET:=filogic
+  PLAT:=mt7988
+  DRAM_USE_COMB:=1
+  DDR4_4BG_MODE:=1
+  USE_UBI:=1
+endef
+
 TFA_TARGETS:= \
 	mt7622-nor-1ddr \
 	mt7622-nor-2ddr \
@@ -633,18 +688,19 @@ TFA_TARGETS:= \
 	mt7622-sdmmc-2ddr \
 	mt7981-ram-ddr3 \
 	mt7981-emmc-ddr3 \
-	mt7981-emmc-ddr3-1866mhz \
+	mt7981-emmc-ddr3-1866 \
 	mt7981-nor-ddr3 \
 	mt7981-nor-ddr4 \
 	mt7981-sdmmc-ddr3 \
 	mt7981-snand-ddr3 \
 	mt7981-spim-nand-ddr3 \
-	mt7981-spim-nand-ddr3-1866mhz \
+	mt7981-spim-nand-ddr3-1866 \
 	mt7981-spim-nand-ubi-ddr4 \
 	mt7981-ram-ddr4 \
 	mt7981-emmc-ddr4 \
+	mt7981-sdmmc-ddr4 \
 	mt7981-spim-nand-ddr4 \
-	mt7981-cudy-tr3000-v1 \
+	mt7981-cudy-ddr3 \
 	mt7986-ram-ddr3 \
 	mt7986-emmc-ddr3 \
 	mt7986-nor-ddr3 \
@@ -661,8 +717,11 @@ TFA_TARGETS:= \
 	mt7986-spim-nand-ubi-ddr4 \
 	mt7986-spim-nand-4k-ddr4 \
 	mt7987-emmc-comb \
+	mt7987-emmc-ddr4-4bg \
 	mt7987-nor-comb \
 	mt7987-sdmmc-comb \
+	mt7987-sdmmc-ddr4-4bg \
+	mt7987-spim-nand0 \
 	mt7987-spim-nand0-ubi-comb \
 	mt7987-spim-nand2-ubi-comb \
 	mt7987-ram-comb \
@@ -685,7 +744,10 @@ TFA_TARGETS:= \
 	mt7988-snand-ubi-comb \
 	mt7988-spim-nand-comb \
 	mt7988-spim-nand-ubi-comb \
-	mt7988-spim-nand-ubi-ddr4
+	mt7988-spim-nand-ubi-ddr4 \
+	mt7988-emmc-comb-4bg \
+	mt7988-sdmmc-comb-4bg \
+	mt7988-spim-nand-ubi-comb-4bg
 
 TFA_MAKE_FLAGS += \
 	BOOT_DEVICE=$(BOOT_DEVICE) \
@@ -696,6 +758,7 @@ TFA_MAKE_FLAGS += \
 	HAVE_DRAM_OBJ_FILE=yes \
 	$(if $(DDR3_FLYBY),DDR3_FLYBY=1) \
 	$(if $(DDR3_FREQ_1866),DDR3_FREQ_1866=1) \
+	$(if $(DDR4_4BG_MODE),DDR4_4BG_MODE=1) \
 	$(if $(DRAM_USE_COMB),DRAM_USE_COMB=1) \
 	$(if $(RAM_BOOT_UART_DL),RAM_BOOT_UART_DL=1) \
 	$(if $(USE_UBI),UBI=1 $(if $(findstring mt7622,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x80000)) \

package/boot/arm-trusted-firmware-microchipsw/Makefile

@@ -5,10 +5,11 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=https://github.com/microchip-ung/arm-trusted-firmware.git
-PKG_SOURCE_DATE:=2024-08-13
-PKG_SOURCE_VERSION:=67fcfcab71f78ac7d4af834c37b29f8c98dd5ff1
-PKG_MIRROR_HASH:=777c68273e84028de77750f3fe8a1219b02f01d43ce35948893ac642d8eb10d7
+PKG_SOURCE_DATE:=2026-01-07
+PKG_SOURCE_VERSION:=7696c9aaaae7c677f4c373a61a1289cba7f824aa
+PKG_MIRROR_HASH:=331548d7c73896bd5e4438c0ec9c71bbe58d3bf9a29350496ad94c382e922b9c
 
+PKG_BUILD_DEPENDS:=ruby/host
 PKG_MAINTAINER:=Robert Marko <robert.marko@sartura.hr>
 
 include $(INCLUDE_DIR)/kernel.mk
@@ -28,7 +29,17 @@ define Trusted-Firmware-A/ev23x71a
   DEPENDS:=+u-boot-ev23x71a
 endef
 
-TFA_TARGETS:= ev23x71a
+define Trusted-Firmware-A/tactical-1000
+  NAME:=Novarq Tactical 1000
+  BUILD_SUBTARGET:=lan969x
+  BUILD_DEVICES:=novarq_tactical-1000
+  PLAT:=novarq_tactical_1000_v3
+  DEPENDS:=+u-boot-tactical-1000
+endef
+
+TFA_TARGETS:= \
+	ev23x71a \
+	tactical-1000
 
 MBEDTLS_NAME:=mbedtls
 MBEDTLS_RELEASE:=2.28.10
@@ -52,17 +63,6 @@ define Build/Prepare
 	$(TAR) -C $(PKG_BUILD_DIR) -xf $(DL_DIR)/$(MBEDTLS_SOURCE)
 endef
 
-# We must not pass OPENSSL_DIR as locally built mbedtls is used
-define Build/Compile
-	+unset CC; \
-	$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \
-		CROSS_COMPILE=$(TARGET_CROSS) \
-		$(if $(DTC),DTC="$(DTC)") \
-		PLAT=$(PLAT) \
-		BUILD_STRING="OpenWrt $(PKG_VERSION_PREFIX)$(PKG_VERSION)-$(PKG_RELEASE) ($(VARIANT))" \
-		$(TFA_MAKE_FLAGS)
-endef
-
 TFA_MAKE_FLAGS += \
 	MBEDTLS_DIR=$(PKG_BUILD_DIR)/$(MBEDTLS_NAME) \
 	BL33=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.bin \

package/boot/arm-trusted-firmware-microchipsw/patches/0001-microchip-lan969x-add-Novarq-Tactical-1000-v3.patch

@@ -0,0 +1,171 @@
+From 190202583edb9dcab5ca49638169d08a332f0fdf Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Sun, 2 Nov 2025 16:57:45 +0100
+Subject: [PATCH] microchip: lan969x: add Novarq Tactical 1000 v3
+
+Add support for Novarq Tactical 1000 v3 board as a separate platform since
+it uses 2GB of RAM and requires a different RAM configuration.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ .../fdts/lan969x-tactical-1000-v3-ddr.dtsi    | 90 +++++++++++++++++++
+ .../novarq_tactical_1000_v3_tb_fw_config.dts  | 30 +++++++
+ .../novarq_tactical_1000_v3/platform.mk       | 12 +++
+ scripts/fwu/fwu.js                            |  2 +-
+ 4 files changed, 133 insertions(+), 1 deletion(-)
+ create mode 100644 plat/microchip/lan969x/fdts/lan969x-tactical-1000-v3-ddr.dtsi
+ create mode 100644 plat/microchip/lan969x/novarq_tactical_1000_v3/fdts/novarq_tactical_1000_v3_tb_fw_config.dts
+ create mode 100644 plat/microchip/lan969x/novarq_tactical_1000_v3/platform.mk
+
+--- /dev/null
++++ b/plat/microchip/lan969x/fdts/lan969x-tactical-1000-v3-ddr.dtsi
+@@ -0,0 +1,90 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries.
++ *
++ */
++
++&ddr {
++	microchip,mem-name = "lan969x_tactical_1000_2gb 2025-11-02-13:03:23 7391dfb-dirty";
++	microchip,mem-speed = <2400>;
++	microchip,mem-size = <0x80000000>;
++	microchip,mem-bus-width = <16>;
++
++	microchip,main-reg = <
++		0x00001091	/* crcparctl1 */
++		0x00000001	/* dbictl */
++		0x00000040	/* dfimisc */
++		0x0391820f	/* dfitmg0 */
++		0x00040201	/* dfitmg1 */
++		0x40400003	/* dfiupd0 */
++		0x004000ff	/* dfiupd1 */
++		0x003f7f40	/* ecccfg0 */
++		0x00020248	/* init0 */
++		0x00e80000	/* init1 */
++		0x0c340101	/* init3 */
++		0x10180200	/* init4 */
++		0x00110000	/* init5 */
++		0x00000402	/* init6 */
++		0x00000c19	/* init7 */
++		0x81040010	/* mstr */
++		0x00000000	/* pccfg */
++		0x00000000	/* pwrctl */
++		0x00210020	/* rfshctl0 */
++		0x00000000	/* rfshctl3 */
++	>;
++
++	microchip,timing-reg = <
++		0x17131413	/* dramtmg0 */
++		0x0007051b	/* dramtmg1 */
++		0x1a000010	/* dramtmg12 */
++		0x090b0512	/* dramtmg2 */
++		0x0000400c	/* dramtmg3 */
++		0x08040409	/* dramtmg4 */
++		0x07070404	/* dramtmg5 */
++		0x07060c0b	/* dramtmg8 */
++		0x0003040d	/* dramtmg9 */
++		0x07000610	/* odtcfg */
++		0x0049014b	/* rfshtmg */
++	>;
++
++	microchip,mapping-reg = <
++		0x0000001f	/* addrmap0 */
++		0x003f0909	/* addrmap1 */
++		0x00000700	/* addrmap2 */
++		0x00000000	/* addrmap3 */
++		0x00001f1f	/* addrmap4 */
++		0x07070707	/* addrmap5 */
++		0x07070707	/* addrmap6 */
++		0x00000f07	/* addrmap7 */
++		0x00003f01	/* addrmap8 */
++	>;
++
++	microchip,phy-reg = <
++		0x0000040c	/* dcr */
++		0x0064401b	/* dsgcr */
++		0x8000b0cf	/* dtcr0 */
++		0x00010a37	/* dtcr1 */
++		0x00c01884	/* dxccr */
++		0x000010ba	/* pgcr2 */
++		0x00000000	/* schcr1 */
++		0x00079900	/* zq0pr */
++		0x10077900	/* zq1pr */
++		0x00000000	/* zq2pr */
++		0x00058f00	/* zqcr */
++	>;
++
++	microchip,phy_timing-reg = <
++		0x0827100a	/* dtpr0 */
++		0x28250018	/* dtpr1 */
++		0x000702a1	/* dtpr2 */
++		0x03000101	/* dtpr3 */
++		0x02950808	/* dtpr4 */
++		0x00361009	/* dtpr5 */
++		0x4ae25710	/* ptr0 */
++		0x74f4950e	/* ptr1 */
++		0x00083def	/* ptr2 */
++		0x2a192000	/* ptr3 */
++		0x1003a000	/* ptr4 */
++	>;
++
++};
+--- /dev/null
++++ b/plat/microchip/lan969x/novarq_tactical_1000_v3/fdts/novarq_tactical_1000_v3_tb_fw_config.dts
+@@ -0,0 +1,30 @@
++/*
++ * Copyright (c) 2022, Microchip Technology Inc. and its subsidiaries.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ */
++
++/dts-v1/;
++
++#include "lan969x.dtsi"
++#include "lan969x-tactical-1000-v3-ddr.dtsi"
++
++&emmc_clk {
++	clock-frequency = <100000000>;
++};
++
++&sdmmc0 {
++	status = "okay";
++	bus-width = <8>;
++};
++
++&qspi0 {
++	status = "okay";
++	spi-flash@0 {
++		compatible = "jedec,spi-nor";
++		reg = <0>;
++		spi-max-frequency = <100000000>;
++		spi-tx-bus-width = <4>;
++		spi-rx-bus-width = <4>;
++	};
++};
+--- /dev/null
++++ b/plat/microchip/lan969x/novarq_tactical_1000_v3/platform.mk
+@@ -0,0 +1,12 @@
++#
++# Copyright (c) 2021, Microchip Technology Inc. and its subsidiaries.
++#
++# SPDX-License-Identifier: BSD-3-Clause
++#
++
++include plat/microchip/lan969x/common/common.mk
++
++# This is used in lan969x code
++$(eval $(call add_define,LAN969X_ASIC))
++# This is used in common drivers
++$(eval $(call add_define,LAN966X_ASIC))
+--- a/scripts/fwu/fwu.js
++++ b/scripts/fwu/fwu.js
+@@ -91,7 +91,7 @@ const platforms = [
+ 	"ddr_diag":	ddr_diag_regs_lan969x,
+ 	"ddr_regs":	ddr_regs_lan969x,
+ 	"ddr_speed":	lan969x_speeds,
+-	"bl2u_compat":	["lan969x_a0", "lan969x_svb"],
++	"bl2u_compat":	["lan969x_a0", "lan969x_svb", "novarq_tactical_1000_v3"],
+     },
+ ];
+ 

package/boot/arm-trusted-firmware-microchipsw/patches/0002-cert_create-add-LibreSSL-3.9-compatibility.patch

@@ -0,0 +1,95 @@
+From 40166fd8d88f33c621d3cca0b936f31816f3fe2e Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 12 Jan 2026 14:40:23 +0100
+Subject: [PATCH] cert_create: add LibreSSL 3.9+ compatibility
+
+LibreSSL 3.9+ has dropped the whole support for X509V3 extensions.
+
+Generated by Gemini 3 Pro.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ tools/cert_create/src/ext.c | 26 ++++++++++++++++++++++----
+ 1 file changed, 22 insertions(+), 4 deletions(-)
+
+--- a/tools/cert_create/src/ext.c
++++ b/tools/cert_create/src/ext.c
+@@ -51,15 +51,18 @@ int ext_init(void)
+ {
+ 	cmd_opt_t cmd_opt;
+ 	ext_t *ext;
++#if !defined(LIBRESSL_VERSION_NUMBER) || LIBRESSL_VERSION_NUMBER < 0x40200000L
+ 	X509V3_EXT_METHOD *m;
+-	int nid, ret;
++	int ret, nid;
++#endif
+ 	unsigned int i;
+ 
+ 	extensions = malloc((num_def_extensions * sizeof(def_extensions[0]))
+ #ifdef PDEF_EXTS
+ 			    + (num_pdef_extensions * sizeof(pdef_extensions[0]))
+ #endif
+-			    );
++		);
++
+ 	if (extensions == NULL) {
+ 		ERROR("%s:%d Failed to allocate memory.\n", __func__, __LINE__);
+ 		return 1;
+@@ -69,7 +72,7 @@ int ext_init(void)
+ 	       (num_def_extensions * sizeof(def_extensions[0])));
+ #ifdef PDEF_EXTS
+ 	memcpy(&extensions[num_def_extensions], &pdef_extensions[0],
+-		(num_pdef_extensions * sizeof(pdef_extensions[0])));
++	       (num_pdef_extensions * sizeof(pdef_extensions[0])));
+ 	num_extensions = num_def_extensions + num_pdef_extensions;
+ #else
+ 	num_extensions = num_def_extensions;
+@@ -86,11 +89,15 @@ int ext_init(void)
+ 			cmd_opt.help_msg = ext->help_msg;
+ 			cmd_opt_add(&cmd_opt);
+ 		}
++
+ 		/* Register the extension OID in OpenSSL */
+ 		if (ext->oid == NULL) {
+ 			continue;
+ 		}
++
++#if !defined(LIBRESSL_VERSION_NUMBER) || LIBRESSL_VERSION_NUMBER < 0x40200000L
+ 		nid = OBJ_create(ext->oid, ext->sn, ext->ln);
++
+ 		if (ext->alias) {
+ 			X509V3_EXT_add_alias(nid, ext->alias);
+ 		} else {
+@@ -117,7 +124,16 @@ int ext_init(void)
+ 				return 1;
+ 			}
+ 		}
++#else
++		/*
++		 * LibreSSL 4.2.0+ removed X509V3_EXT_add/alias.
++		 * We still register the OID, but ignore the returned NID
++		 * as we skip method registration.
++		 */
++		OBJ_create(ext->oid, ext->sn, ext->ln);
++#endif
+ 	}
++
+ 	return 0;
+ }
+ 
+@@ -323,12 +339,14 @@ void ext_cleanup(void)
+ 	for (i = 0; i < num_extensions; i++) {
+ 		if (extensions[i].arg != NULL) {
+ 			void *ptr = (void *)extensions[i].arg;
+-
+ 			extensions[i].arg = NULL;
+ 			free(ptr);
+ 		}
+ 	}
+ 	free(extensions);
++
++#if !defined(LIBRESSL_VERSION_NUMBER) || LIBRESSL_VERSION_NUMBER < 0x40200000L
+ 	X509V3_EXT_cleanup();
++#endif
+ }
+ 

package/boot/arm-trusted-firmware-microchipsw/patches/0003-cert_create-pass-pthread-in-LDFLAGS.patch

@@ -0,0 +1,36 @@
+From 11ff8b5e67830d5a09f39e8c1f000b0ddcf8e88f Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 12 Jan 2026 15:16:07 +0100
+Subject: [PATCH] cert_create: pass pthread in LDFLAGS
+
+OpenWrt-s LibreSSL is linked against pthread, so we have to make sure to
+pass -lpthread in LDFLAGS to avoid:
+/usr/bin/ld: /openwrt/staging_dir/host/lib/libcrypto.a(libcrypto_la-crypto_init.o): in function `OPENSSL_init_crypto':
+crypto_init.c:(.text+0x67): undefined reference to `pthread_once'
+/usr/bin/ld: /openwrt/staging_dir/host/lib/libcrypto.a(libcrypto_la-err.o): in function `ERR_load_ERR_strings':
+err.c:(.text+0x812): undefined reference to `pthread_once'
+/usr/bin/ld: /openwrt/staging_dir/host/lib/libcrypto.a(libcrypto_la-conf_sap.o): in function `OpenSSL_config':
+conf_sap.c:(.text+0xc0): undefined reference to `pthread_once'
+/usr/bin/ld: /openwrt/staging_dir/host/lib/libcrypto.a(libcrypto_la-conf_sap.o): in function `OpenSSL_no_config':
+conf_sap.c:(.text+0x107): undefined reference to `pthread_once'
+/usr/bin/ld: /openwrt/staging_dir/host/lib/libcrypto.a(libcrypto_la-err_all.o): in function `ERR_load_crypto_strings':
+err_all.c:(.text+0xa3): undefined reference to `pthread_once'
+collect2: error: ld returned 1 exit status
+make[4]: *** [Makefile:93: cert_create] Error 1
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ tools/cert_create/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/tools/cert_create/Makefile
++++ b/tools/cert_create/Makefile
+@@ -79,7 +79,7 @@ INC_DIR += -I ./include -I ${PLAT_INCLUD
+ # located under the main project directory (i.e.: ${OPENSSL_DIR}, not
+ # ${OPENSSL_DIR}/lib/).
+ LIB_DIR := -L ${OPENSSL_DIR}/lib -L ${OPENSSL_DIR}
+-LIB := -lssl -lcrypto
++LIB := -lssl -lcrypto -pthread
+ 
+ HOSTCC ?= gcc
+ 

package/boot/arm-trusted-firmware-microchipsw/patches/0004-microchip-lan969x-do-not-rely-on-Ruby-shebang.patch

@@ -0,0 +1,29 @@
+From f78f934710394822a36bd74043ed93a812c1c690 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 12 Jan 2026 15:36:35 +0100
+Subject: [PATCH] microchip: lan969x: do not rely on Ruby shebang
+
+Host Ruby build in the staging dir must be used, so we cannot rely on the
+shebang as that will fail.
+
+So, call the script via Ruby executable instead.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ plat/microchip/lan969x/common/common.mk | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/plat/microchip/lan969x/common/common.mk
++++ b/plat/microchip/lan969x/common/common.mk
+@@ -218,9 +218,9 @@ FWU_HTML := ${BUILD_PLAT}/fwu.html
+ FWU_JS   := ${BUILD_PLAT}/fwu_app.js
+ 
+ ${FWU_JS}: ${BUILD_PLAT}/${FWU_FIP_NAME}
+-	./plat/microchip/scripts/mkjs.rb -p ${PLAT} -o ${FWU_JS} $<
++	$(Q)ruby ./plat/microchip/scripts/mkjs.rb -p ${PLAT} -o ${FWU_JS} $<
+ 
+ ${FWU_HTML}: ${FWU_JS}
+-	./plat/microchip/scripts/html_inline.rb -i ${BUILD_PLAT} ./scripts/fwu/serial.html > ${FWU_HTML}
++	$(Q)ruby ./plat/microchip/scripts/html_inline.rb -i ${BUILD_PLAT} ./scripts/fwu/serial.html > ${FWU_HTML}
+ 
+ all: ${FWU_HTML}

package/boot/arm-trusted-firmware-rockchip/Makefile

@@ -7,10 +7,10 @@
 
 include $(TOPDIR)/rules.mk
 
-PKG_VERSION:=2.13
+PKG_VERSION:=2.14.0
 PKG_RELEASE:=1
 
-PKG_HASH:=afb5c408392fcec840bd30de9b02a236b0108142024f9853b542b596b0d894e3
+PKG_HASH:=b2a3bc360307c929714ffd8e7f1441c4888cd5d80531276e809c2de54db5dc16
 
 PKG_MAINTAINER:=Sarah Maedel <openwrt@tbspace.de>
 

package/boot/grub2/Makefile

@@ -34,7 +34,7 @@ define Package/grub2/Default
   CATEGORY:=Boot Loaders
   SECTION:=boot
   TITLE:=GRand Unified Bootloader ($(2))
-  URL:=http://www.gnu.org/software/grub/
+  URL:=https://www.gnu.org/software/grub/
   DEPENDS:=@TARGET_$(1)
   VARIANT:=$(2)
 endef
@@ -49,7 +49,7 @@ define Package/grub2-editenv
   SECTION:=utils
   SUBMENU:=Boot Loaders
   TITLE:=Grub2 Environment editor
-  URL:=http://www.gnu.org/software/grub/
+  URL:=https://www.gnu.org/software/grub/
   DEPENDS:=@TARGET_x86
   VARIANT:=none
 endef
@@ -63,7 +63,7 @@ define Package/grub2-bios-setup
   SECTION:=utils
   SUBMENU:=Boot Loaders
   TITLE:=Grub2 BIOS boot setup tool
-  URL:=http://www.gnu.org/software/grub/
+  URL:=https://www.gnu.org/software/grub/
   DEPENDS:=@TARGET_x86
   VARIANT:=none
 endef

package/boot/kexec-tools/Makefile

@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=kexec-tools
-PKG_VERSION:=2.0.28
+PKG_VERSION:=2.0.32
 PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/utils/kernel/kexec
-PKG_HASH:=d2f0ef872f39e2fe4b1b01feb62b0001383207239b9f8041f98a95564161d053
+PKG_HASH:=8f81422a5fd2362cf6cb001b511e535565ed0f32c2f4451fb5eb68fed6710a5d
 
 PKG_LICENSE:=GPL-2.0-only
 PKG_LICENSE_FILES:=COPYING
@@ -47,7 +47,7 @@ define Package/kexec
   $(call Package/kexec-tools/Default)
   TITLE:=Kernel boots kernel
   DEPENDS:=\
-	@(armeb||arm||i386||x86_64||powerpc64||mipsel||mips) \
+	@(armeb||arm||aarch64||i386||x86_64||powerpc64||mipsel||mips) \
 	+KEXEC_ZLIB:zlib +KEXEC_LZMA:liblzma @KERNEL_KEXEC
 endef
 
@@ -58,7 +58,7 @@ endef
 define Package/kdump
   $(call Package/kexec-tools/Default)
   TITLE:=Kernel crash analysis
-  DEPENDS:=+kexec @(i386||x86_64||arm) @KERNEL_CRASH_DUMP
+  DEPENDS:=+kexec @(i386||x86_64||arm||aarch64) @KERNEL_CRASH_DUMP
 endef
 
 define Package/kdump/description

package/boot/kexec-tools/patches/010-Fix-building-on-x86_64-with-binutils-2.41.patch

@@ -1,81 +0,0 @@
-From 328de8e00e298f00d7ba6b25dc3950147e9642e6 Mon Sep 17 00:00:00 2001
-From: Michel Lind <salimma@fedoraproject.org>
-Date: Tue, 30 Jan 2024 04:14:31 -0600
-Subject: [PATCH] Fix building on x86_64 with binutils 2.41
-
-Newer versions of the GNU assembler (observed with binutils 2.41) will
-complain about the ".arch i386" in files assembled with "as --64",
-with the message "Error: 64bit mode not supported on 'i386'".
-
-Fix by moving ".arch i386" below the relevant ".code32" directive, so
-that the assembler is no longer expecting 64-bit instructions to be used
-by the time that the ".arch i386" directive is encountered.
-
-Based on similar iPXE fix:
-https://github.com/ipxe/ipxe/commit/6ca597eee
-
-Signed-off-by: Michel Lind <michel@michel-slm.name>
-Signed-off-by: Simon Horman <horms@kernel.org>
----
- purgatory/arch/i386/entry32-16-debug.S | 2 +-
- purgatory/arch/i386/entry32-16.S       | 2 +-
- purgatory/arch/i386/entry32.S          | 2 +-
- purgatory/arch/i386/setup-x86.S        | 2 +-
- 4 files changed, 4 insertions(+), 4 deletions(-)
-
---- a/purgatory/arch/i386/entry32-16-debug.S
-+++ b/purgatory/arch/i386/entry32-16-debug.S
-@@ -25,10 +25,10 @@
- 	.globl entry16_debug_pre32
- 	.globl entry16_debug_first32
- 	.globl entry16_debug_old_first32
--	.arch i386
- 	.balign 16
- entry16_debug:
- 	.code32
-+	.arch i386
- 	/* Compute where I am running at (assumes esp valid) */
- 	call	1f
- 1:	popl	%ebx
---- a/purgatory/arch/i386/entry32-16.S
-+++ b/purgatory/arch/i386/entry32-16.S
-@@ -20,10 +20,10 @@
- #undef i386	
- 	.text
- 	.globl entry16, entry16_regs
--	.arch i386
- 	.balign 16
- entry16:
- 	.code32
-+	.arch i386
- 	/* Compute where I am running at (assumes esp valid) */
- 	call	1f
- 1:	popl	%ebx
---- a/purgatory/arch/i386/entry32.S
-+++ b/purgatory/arch/i386/entry32.S
-@@ -20,10 +20,10 @@
- #undef i386
- 
- 	.text
--	.arch	i386
- 	.globl entry32, entry32_regs
- entry32:
- 	.code32
-+	.arch	i386
- 
- 	/* Setup a gdt that should that is generally usefully */
- 	lgdt	%cs:gdt
---- a/purgatory/arch/i386/setup-x86.S
-+++ b/purgatory/arch/i386/setup-x86.S
-@@ -21,10 +21,10 @@
- #undef i386
- 
- 	.text
--	.arch	i386
- 	.globl purgatory_start
- purgatory_start:
- 	.code32
-+	.arch	i386
- 
- 	/* Load a gdt so I know what the segment registers are */
- 	lgdt	%cs:gdt

package/boot/kexec-tools/patches/020-i386-improve-basename-compatibility.patch

@@ -1,37 +0,0 @@
-From 99f62f58fac57214ecc3c9aabf6bf61ac1e1201d Mon Sep 17 00:00:00 2001
-From: Tony Ambardar <itugrok@yahoo.com>
-Date: Fri, 7 Jun 2024 21:54:56 -0700
-Subject: [PATCH] i386: improve basename() compatibility
-
-Drop usage of glibc basename() in favour of a simpler implementation that
-works across GNU and musl libc, and is similar to existing code in fs2dt.c.
-
-This fixes compile errors seen building against musl.
-
-Signed-off-by: Tony Ambardar <itugrok@yahoo.com>
----
- kexec/arch/i386/x86-linux-setup.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/kexec/arch/i386/x86-linux-setup.c
-+++ b/kexec/arch/i386/x86-linux-setup.c
-@@ -318,6 +318,7 @@ static int add_edd_entry(struct x86_linu
- 	uint8_t devnum, version;
- 	uint32_t mbr_sig;
- 	struct edd_info *edd_info;
-+	char *basename = strrchr(sysfs_name,'/') + 1;
- 
- 	if (!current_mbr || !current_edd) {
- 		fprintf(stderr, "%s: current_edd and current_edd "
-@@ -329,9 +330,9 @@ static int add_edd_entry(struct x86_linu
- 	memset(edd_info, 0, sizeof(struct edd_info));
- 
- 	/* extract the device number */
--	if (sscanf(basename(sysfs_name), "int13_dev%hhx", &devnum) != 1) {
-+	if (sscanf(basename, "int13_dev%hhx", &devnum) != 1) {
- 		fprintf(stderr, "Invalid format of int13_dev dir "
--				"entry: %s\n", basename(sysfs_name));
-+				"entry: %s\n", basename);
- 		return -1;
- 	}
- 

package/boot/uboot-bcm53xx/Makefile

@@ -1,8 +1,8 @@
 include $(TOPDIR)/rules.mk
 
-PKG_VERSION:=2024.01
-PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
-PKG_RELEASE:=2
+PKG_VERSION:=2025.10
+PKG_HASH:=b4f032848e56cc8f213ad59f9132c084dbbb632bc29176d024e58220e0efdf4a
+PKG_RELEASE:=1
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk

package/boot/uboot-d1/Makefile

@@ -6,13 +6,10 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2023.01
+PKG_VERSION:=2024.01
 PKG_RELEASE:=1
 
-PKG_HASH:=69423bad380f89a0916636e89e6dcbd2e4512d584308d922d1039d1e4331950f
-
-include $(INCLUDE_DIR)/u-boot.mk
-include $(INCLUDE_DIR)/package.mk
+PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk

package/boot/uboot-d1/patches/0001-ARM-dts-sun8i-A33-Add-iNet-U70B-REV01.patch

@@ -1,197 +0,0 @@
-From d45e64aad18e5e324425b9efbe6a0ec9e1a343da Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 20 Nov 2021 13:19:13 -0600
-Subject: [PATCH 01/90] ARM: dts: sun8i: A33: Add iNet U70B REV01
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/dts/Makefile                     |   1 +
- arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts | 172 ++++++++++++++++++++++
- 2 files changed, 173 insertions(+)
- create mode 100644 arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts
-
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -644,6 +644,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \
- 	sun8i-a33-et-q8-v1.6.dtb \
- 	sun8i-a33-ga10h-v1.1.dtb \
- 	sun8i-a33-inet-d978-rev2.dtb \
-+	sun8i-a33-inet-u70b-rev1.dtb \
- 	sun8i-a33-ippo-q8h-v1.2.dtb \
- 	sun8i-a33-olinuxino.dtb \
- 	sun8i-a33-q8-tablet.dtb \
---- /dev/null
-+++ b/arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts
-@@ -0,0 +1,172 @@
-+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
-+
-+/dts-v1/;
-+
-+#include "sun8i-a33.dtsi"
-+#include "sun8i-reference-design-tablet.dtsi"
-+
-+/ {
-+	model = "iNet U70B REV01";
-+	compatible = "inet-tek,inet-u70b-rev01", "allwinner,sun8i-a33";
-+
-+	aliases {
-+		ethernet0 = &rtl8723cs;
-+	};
-+
-+	panel: panel {
-+		compatible = "panel-dpi";
-+		backlight = <&backlight>;
-+		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
-+		power-supply = <&reg_dc1sw>;
-+
-+		panel-timing {
-+			clock-frequency = <51000000>;
-+			hactive = <1024>;
-+			vactive = <600>;
-+			hfront-porch = <162>;
-+			hback-porch = <158>;
-+			hsync-len = <20>;
-+			vback-porch = <25>;
-+			vfront-porch = <10>;
-+			vsync-len = <3>;
-+			hsync-active = <1>;
-+			vsync-active = <1>;
-+		};
-+
-+		port {
-+			panel_in_tcon0: endpoint {
-+				remote-endpoint = <&tcon0_out_panel>;
-+			};
-+		};
-+	};
-+
-+	speaker_amp: audio-amplifier {
-+		compatible = "simple-audio-amplifier";
-+		enable-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
-+		sound-name-prefix = "Speaker Amp";
-+	};
-+
-+	wifi_pwrseq: wifi-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
-+		post-power-on-delay-ms = <200>;
-+	};
-+};
-+
-+&codec {
-+	status = "okay";
-+};
-+
-+&dai {
-+	status = "okay";
-+};
-+
-+&de {
-+	status = "okay";
-+};
-+
-+&i2c1 {
-+	clock-frequency = <400000>;
-+
-+	accelerometer@18 {
-+		compatible = "bosch,bma250";
-+		reg = <0x18>;
-+		interrupt-parent = <&pio>;
-+		interrupts = <7 10 IRQ_TYPE_EDGE_RISING>; /* PH10 / EINT10 */
-+	};
-+};
-+
-+&mmc1 {
-+	pinctrl-0 = <&mmc1_pg_pins>;
-+	pinctrl-names = "default";
-+	bus-width = <4>;
-+	non-removable;
-+	vmmc-supply = <&reg_dldo1>;
-+	vqmmc-supply = <&reg_dldo2>;
-+	status = "okay";
-+
-+	rtl8723cs: wifi@1 {
-+		reg = <1>;
-+		interrupt-parent = <&r_pio>;
-+		interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
-+	};
-+};
-+
-+&nfc {
-+	status = "okay";
-+
-+	nand@0 {
-+		reg = <0>;
-+		allwinner,rb = <0>;
-+		nand-ecc-maximize;
-+	};
-+};
-+
-+&r_uart {
-+	status = "disabled";
-+};
-+
-+&reg_dldo2 {
-+	regulator-min-microvolt = <3300000>;
-+	regulator-max-microvolt = <3300000>;
-+	regulator-name = "vcc-wifi-io";
-+};
-+
-+&simplefb_lcd {
-+	status = "okay";
-+};
-+
-+&sound {
-+	simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
-+	simple-audio-card,widgets = "Headphone", "Headphone Jack",
-+				    "Microphone", "Internal Microphone",
-+				    "Speaker", "Internal Speaker";
-+	simple-audio-card,routing = "Headphone Jack", "HP",
-+				    "Internal Speaker", "Speaker Amp OUTL",
-+				    "Internal Speaker", "Speaker Amp OUTR",
-+				    "Speaker Amp INL", "HP", /* PHONEOUT ??? */
-+				    "Speaker Amp INR", "HP", /* PHONEOUT ??? */
-+				    "Left DAC", "DACL",
-+				    "Right DAC", "DACR",
-+				    "ADCL", "Left ADC",
-+				    "ADCR", "Right ADC",
-+				    "MIC1", "Internal Microphone",
-+				    "MIC2", "Headset Microphone",
-+				    "Headset Microphone", "HBIAS",
-+				    "Internal Microphone", "MBIAS";
-+	status = "okay";
-+};
-+
-+&tcon0 {
-+	pinctrl-0 = <&lcd_rgb666_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
-+&tcon0_out {
-+	tcon0_out_panel: endpoint {
-+		remote-endpoint = <&panel_in_tcon0>;
-+	};
-+};
-+
-+&touchscreen {
-+	reg = <0x40>;
-+	compatible = "silead,gsl1680";
-+	avdd-supply = <&reg_ldo_io1>;
-+	touchscreen-size-x = <1024>;
-+	touchscreen-size-y = <600>;
-+	status = "okay";
-+};
-+
-+&uart1 {
-+	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+
-+	bluetooth {
-+		compatible = "realtek,rtl8723cs-bt";
-+		device-wake-gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
-+		enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-+		host-wake-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
-+	};
-+};

package/boot/uboot-d1/patches/0002-riscv-cpu-Add-skeleton-for-T-HEAD-CPUs.patch

@@ -0,0 +1,74 @@
+From ddbe65963dec1e261c23d027602b89d18d90ae63 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 4 Feb 2023 13:58:20 -0600
+Subject: [PATCH 02/68] riscv: cpu: Add skeleton for T-HEAD CPUs
+
+This is a direct copy of the existing generic CPU code.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/riscv/cpu/thead/Makefile |  4 ++++
+ arch/riscv/cpu/thead/cpu.c    | 22 ++++++++++++++++++++++
+ arch/riscv/cpu/thead/dram.c   | 22 ++++++++++++++++++++++
+ 3 files changed, 48 insertions(+)
+ create mode 100644 arch/riscv/cpu/thead/Makefile
+ create mode 100644 arch/riscv/cpu/thead/cpu.c
+ create mode 100644 arch/riscv/cpu/thead/dram.c
+
+--- /dev/null
++++ b/arch/riscv/cpu/thead/Makefile
+@@ -0,0 +1,4 @@
++# SPDX-License-Identifier: GPL-2.0+
++
++obj-y += cpu.o
++obj-y += dram.o
+--- /dev/null
++++ b/arch/riscv/cpu/thead/cpu.c
+@@ -0,0 +1,22 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
++ */
++
++#include <irq_func.h>
++#include <asm/cache.h>
++
++/*
++ * cleanup_before_linux() is called just before we call linux
++ * it prepares the processor for linux
++ *
++ * we disable interrupt and caches.
++ */
++int cleanup_before_linux(void)
++{
++	disable_interrupts();
++
++	cache_flush();
++
++	return 0;
++}
+--- /dev/null
++++ b/arch/riscv/cpu/thead/dram.c
+@@ -0,0 +1,22 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
++ */
++
++#include <common.h>
++#include <fdtdec.h>
++#include <init.h>
++#include <asm/global_data.h>
++#include <linux/sizes.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++int dram_init(void)
++{
++	return fdtdec_setup_mem_size_base();
++}
++
++int dram_init_banksize(void)
++{
++	return fdtdec_setup_memory_banksize();
++}

package/boot/uboot-d1/patches/0002-sunxi-Add-iNet_U70B_rev1_defconfig.patch

@@ -1,46 +0,0 @@
-From ddb1f06d1c7758c538e286c0c7a9c8545d2af6b1 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 20 Nov 2021 13:26:36 -0600
-Subject: [PATCH 02/90] sunxi: Add iNet_U70B_rev1_defconfig
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- configs/iNet_U70B_rev1_defconfig | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
- create mode 100644 configs/iNet_U70B_rev1_defconfig
-
---- /dev/null
-+++ b/configs/iNet_U70B_rev1_defconfig
-@@ -0,0 +1,32 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-u70b-rev1"
-+# CONFIG_SPL_SERIAL is not set
-+CONFIG_SPL=y
-+CONFIG_MACH_SUN8I_A33=y
-+CONFIG_DRAM_CLK=480
-+CONFIG_DRAM_ZQ=31675
-+CONFIG_DRAM_ODT_EN=y
-+CONFIG_MMC0_CD_PIN="PB4"
-+CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:158,ri:162,up:25,lo:10,hs:20,vs:3,sync:3,vmode:0"
-+CONFIG_VIDEO_LCD_DCLK_PHASE=0
-+CONFIG_VIDEO_LCD_POWER="PH7"
-+CONFIG_VIDEO_LCD_BL_EN="PH6"
-+CONFIG_VIDEO_LCD_BL_PWM="PH0"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_CMD_BIND=y
-+CONFIG_CMD_CLK=y
-+CONFIG_CMD_PWM=y
-+CONFIG_CMD_I2C=y
-+CONFIG_CMD_WDT=y
-+CONFIG_CMD_PMIC=y
-+CONFIG_CMD_REGULATOR=y
-+# CONFIG_NET is not set
-+CONFIG_AXP_GPIO=y
-+CONFIG_REGULATOR_AXP=y
-+CONFIG_REGULATOR_AXP_USB_POWER=y
-+CONFIG_AXP_DLDO1_VOLT=3300
-+CONFIG_DM_PWM=y
-+CONFIG_PWM_SUNXI=y
-+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
-+CONFIG_USB_MUSB_HOST=y

package/boot/uboot-d1/patches/0003-Adapt-iNet-U70B-REV01-for-development-FEL-serial.patch

@@ -1,85 +0,0 @@
-From ef808412055d1ef6fe77ff130d3f5a9432fef2d7 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Tue, 3 May 2022 22:35:12 -0500
-Subject: [PATCH 03/90] Adapt iNet U70B REV01 for development (FEL + serial)
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts | 11 +++++++++++
- configs/iNet_U70B_rev1_defconfig          | 14 +++++---------
- 2 files changed, 16 insertions(+), 9 deletions(-)
-
---- a/arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts
-+++ b/arch/arm/dts/sun8i-a33-inet-u70b-rev1.dts
-@@ -11,6 +11,7 @@
- 
- 	aliases {
- 		ethernet0 = &rtl8723cs;
-+		serial0 = &uart0;
- 	};
- 
- 	panel: panel {
-@@ -76,6 +77,10 @@
- 	};
- };
- 
-+&mmc0 {
-+	status = "disabled";
-+};
-+
- &mmc1 {
- 	pinctrl-0 = <&mmc1_pg_pins>;
- 	pinctrl-names = "default";
-@@ -158,6 +163,12 @@
- 	status = "okay";
- };
- 
-+&uart0 {
-+	pinctrl-0 = <&uart0_pf_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
-+
- &uart1 {
- 	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>;
- 	pinctrl-names = "default";
---- a/configs/iNet_U70B_rev1_defconfig
-+++ b/configs/iNet_U70B_rev1_defconfig
-@@ -1,12 +1,12 @@
- CONFIG_ARM=y
- CONFIG_ARCH_SUNXI=y
- CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-u70b-rev1"
--# CONFIG_SPL_SERIAL is not set
- CONFIG_SPL=y
- CONFIG_MACH_SUN8I_A33=y
- CONFIG_DRAM_CLK=480
- CONFIG_DRAM_ZQ=31675
- CONFIG_DRAM_ODT_EN=y
-+CONFIG_UART0_PORT_F=y
- CONFIG_MMC0_CD_PIN="PB4"
- CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:158,ri:162,up:25,lo:10,hs:20,vs:3,sync:3,vmode:0"
- CONFIG_VIDEO_LCD_DCLK_PHASE=0
-@@ -14,19 +14,15 @@ CONFIG_VIDEO_LCD_POWER="PH7"
- CONFIG_VIDEO_LCD_BL_EN="PH6"
- CONFIG_VIDEO_LCD_BL_PWM="PH0"
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
--CONFIG_CMD_BIND=y
--CONFIG_CMD_CLK=y
--CONFIG_CMD_PWM=y
--CONFIG_CMD_I2C=y
--CONFIG_CMD_WDT=y
-+CONFIG_PREBOOT="fastboot usb 0"
- CONFIG_CMD_PMIC=y
- CONFIG_CMD_REGULATOR=y
--# CONFIG_NET is not set
- CONFIG_AXP_GPIO=y
- CONFIG_REGULATOR_AXP=y
- CONFIG_REGULATOR_AXP_USB_POWER=y
- CONFIG_AXP_DLDO1_VOLT=3300
- CONFIG_DM_PWM=y
- CONFIG_PWM_SUNXI=y
--# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
--CONFIG_USB_MUSB_HOST=y
-+CONFIG_REMOTEPROC_SUN6I_AR100=y
-+CONFIG_USB_MUSB_GADGET=y
-+CONFIG_WATCHDOG_AUTOSTART=y

package/boot/uboot-d1/patches/0003-riscv-cpu-thead-Add-extension-CSR-definitions.patch

@@ -0,0 +1,53 @@
+From 63ba3ddfaddeb963a959e709aac249d61f51bb3f Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 5 Feb 2023 09:56:34 -0600
+Subject: [PATCH 03/68] riscv: cpu: thead: Add extension CSR definitions
+
+T-HEAD C9xx and E9xx CPUs contain some extra CSRs which control the
+branch predictor and cache-related functionality.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/riscv/cpu/thead/thead_csr.h | 36 ++++++++++++++++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+ create mode 100644 arch/riscv/cpu/thead/thead_csr.h
+
+--- /dev/null
++++ b/arch/riscv/cpu/thead/thead_csr.h
+@@ -0,0 +1,36 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++
++#ifndef _THEAD_CSR_H_
++#define _THEAD_CSR_H_
++
++#define CSR_MXSTATUS		0x7c0
++#define CSR_MHCR		0x7c1
++#define CSR_MHINT		0x7c5
++
++#define MXSTATUS_THEADISAEE	BIT(22) /* T-HEAD ISA extensions enable */
++#define MXSTATUS_MM		BIT(15) /* misaligned access enable */
++
++#define MHCR_IE			BIT(0)	/* icache enable */
++#define MHCR_DE			BIT(1)	/* dcache enable */
++#define MHCR_WA			BIT(2)	/* dcache write allocate */
++#define MHCR_WB			BIT(3)	/* dcache write back */
++#define MHCR_RS			BIT(4)	/* return stack enable */
++#define MHCR_BPE		BIT(5)	/* branch prediction enable */
++#define MHCR_BTB_C906		BIT(6)	/* branch target prediction enable */
++#define MHCR_WBR		BIT(8)	/* write burst enable */
++#define MHCR_BTB_E906		BIT(12) /* branch target prediction enable */
++
++#define MHINT_DPLD		BIT(2)	/* dcache prefetch enable */
++#define MHINT_AMR_PAGE		(0x0 << 3)
++#define MHINT_AMR_LIMIT_3	(0x1 << 3)
++#define MHINT_AMR_LIMIT_64	(0x2 << 3)
++#define MHINT_AMR_LIMIT_128	(0x3 << 3)
++#define MHINT_IPLD		BIT(8)	/* icache prefetch enable */
++#define MHINT_IWPE		BIT(9)	/* icache way prediction enable */
++#define MHINT_D_DIS_PREFETCH_2	(0x0 << 13)
++#define MHINT_D_DIS_PREFETCH_4	(0x1 << 13)
++#define MHINT_D_DIS_PREFETCH_8	(0x2 << 13)
++#define MHINT_D_DIS_PREFETCH_16	(0x3 << 13)
++#define MHINT_AEE		BIT(20) /* accurate exception enable */
++
++#endif /* _THEAD_CSR_H_ */

package/boot/uboot-d1/patches/0004-ARM-dts-sun6i-mixtile-loftq-Add-USB1-VBUS-regulator.patch

@@ -1,54 +0,0 @@
-From 40a0ec0fdb6a110d69151de5480148772877f267 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Thu, 26 Aug 2021 20:39:33 -0500
-Subject: [PATCH 04/90] ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator
-
-This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
-regulator exists in its device tree. Add the regulator, so USB will
-continue to work when the PHY driver switches to using the regulator
-uclass instead of a GPIO.
-
-Update the device tree here because it does not exist in Linux.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/dts/sun6i-a31-mixtile-loftq.dts | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
---- a/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
-+++ b/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
-@@ -6,6 +6,9 @@
-  */
- 
- /dts-v1/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+
- #include "sun6i-a31.dtsi"
- 
- / {
-@@ -19,6 +22,15 @@
- 	chosen {
- 		stdout-path = "serial0:115200n8";
- 	};
-+
-+	reg_usb1_vbus: usb1-vbus {
-+		compatible = "regulator-fixed";
-+		regulator-name = "usb1-vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		enable-active-high;
-+		gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */
-+	};
- };
- 
- &ehci0 {
-@@ -56,3 +68,8 @@
- 	pinctrl-0 = <&uart0_ph_pins>;
- 	status = "okay";
- };
-+
-+&usbphy {
-+	usb1_vbus-supply = <&reg_usb1_vbus>;
-+	status = "okay";
-+};

package/boot/uboot-d1/patches/0004-riscv-cpu-thead-Initialize-extension-CSRs.patch

@@ -0,0 +1,72 @@
+From 5159250118c6f58a469fc9185ea4227f852e51d0 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 5 Feb 2023 09:44:05 -0600
+Subject: [PATCH 04/68] riscv: cpu: thead: Initialize extension CSRs
+
+Enable the T-HEAD ISA extensions, as these are required to use the cache
+maintenance instructions. Enable the branch predictor and BTB to improve
+performance. Some bits are only available on specific CPU models, so
+provide Kconfig symbols for selecting the right model.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/riscv/Kconfig           |  1 +
+ arch/riscv/cpu/thead/Kconfig |  7 +++++++
+ arch/riscv/cpu/thead/cpu.c   | 21 +++++++++++++++++++++
+ 3 files changed, 29 insertions(+)
+ create mode 100644 arch/riscv/cpu/thead/Kconfig
+
+--- a/arch/riscv/Kconfig
++++ b/arch/riscv/Kconfig
+@@ -89,6 +89,7 @@ source "arch/riscv/cpu/fu540/Kconfig"
+ source "arch/riscv/cpu/fu740/Kconfig"
+ source "arch/riscv/cpu/generic/Kconfig"
+ source "arch/riscv/cpu/jh7110/Kconfig"
++source "arch/riscv/cpu/thead/Kconfig"
+ 
+ # architecture-specific options below
+ 
+--- /dev/null
++++ b/arch/riscv/cpu/thead/Kconfig
+@@ -0,0 +1,7 @@
++# SPDX-License-Identifier: GPL-2.0+
++
++config THEAD_C906
++	bool
++
++config THEAD_E906
++	bool
+--- a/arch/riscv/cpu/thead/cpu.c
++++ b/arch/riscv/cpu/thead/cpu.c
+@@ -5,6 +5,10 @@
+ 
+ #include <irq_func.h>
+ #include <asm/cache.h>
++#include <asm/csr.h>
++#include <linux/bitops.h>
++
++#include "thead_csr.h"
+ 
+ /*
+  * cleanup_before_linux() is called just before we call linux
+@@ -20,3 +24,20 @@ int cleanup_before_linux(void)
+ 
+ 	return 0;
+ }
++
++void harts_early_init(void)
++{
++	if (!CONFIG_IS_ENABLED(RISCV_MMODE))
++		return;
++
++	csr_set(CSR_MXSTATUS, MXSTATUS_THEADISAEE | MXSTATUS_MM);
++	if (IS_ENABLED(THEAD_C906)) {
++		csr_set(CSR_MHCR,
++			MHCR_BTB_C906 | MHCR_BPE | MHCR_RS | MHCR_WB | MHCR_WA);
++		csr_set(CSR_MHINT, MHINT_IWPE | MHINT_IPLD | MHINT_IPLD);
++	}
++	if (IS_ENABLED(THEAD_E906)) {
++		csr_set(CSR_MHCR,
++			MHCR_BTB_E906 | MHCR_BPE | MHCR_RS | MHCR_WB | MHCR_WA);
++	}
++}

package/boot/uboot-d1/patches/0005-power-regulator-Add-a-driver-for-the-AXP-USB-power-s.patch

@@ -1,97 +0,0 @@
-From e07c1d516c1a7842510d22a7cf88666d500a9a9a Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 22 Aug 2021 21:35:45 -0500
-Subject: [PATCH 05/90] power: regulator: Add a driver for the AXP USB power
- supply
-
-This driver reports the presence/absence of voltage on the PMIC's USB
-VBUS pin. This information is used by the USB PHY driver. The
-corresponding Linux driver uses the power supply class, which does not
-exist in U-Boot. UCLASS_REGULATOR seems to be the closest match.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/power/regulator/Kconfig         |  7 ++++
- drivers/power/regulator/Makefile        |  1 +
- drivers/power/regulator/axp_usb_power.c | 49 +++++++++++++++++++++++++
- 3 files changed, 57 insertions(+)
- create mode 100644 drivers/power/regulator/axp_usb_power.c
-
---- a/drivers/power/regulator/Kconfig
-+++ b/drivers/power/regulator/Kconfig
-@@ -43,6 +43,13 @@ config REGULATOR_AS3722
- 	  but does not yet support change voltages. Currently this must be
- 	  done using direct register writes to the PMIC.
- 
-+config REGULATOR_AXP_USB_POWER
-+	bool "Enable driver for X-Powers AXP PMIC USB power supply"
-+	depends on DM_REGULATOR && PMIC_AXP
-+	help
-+	  Enable support for reading the USB power supply status from
-+	  X-Powers AXP2xx and AXP8xx PMICs.
-+
- config DM_REGULATOR_BD71837
- 	bool "Enable Driver Model for ROHM BD71837/BD71847 regulators"
- 	depends on DM_REGULATOR && DM_PMIC_BD71837
---- a/drivers/power/regulator/Makefile
-+++ b/drivers/power/regulator/Makefile
-@@ -7,6 +7,7 @@
- obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
- obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
- obj-$(CONFIG_REGULATOR_AS3722)	+= as3722_regulator.o
-+obj-$(CONFIG_$(SPL_)REGULATOR_AXP_USB_POWER) += axp_usb_power.o
- obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o
- obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
- obj-$(CONFIG_DM_REGULATOR_NPCM8XX) += npcm8xx_regulator.o
---- /dev/null
-+++ b/drivers/power/regulator/axp_usb_power.c
-@@ -0,0 +1,49 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+
-+#include <dm/device.h>
-+#include <errno.h>
-+#include <power/pmic.h>
-+#include <power/regulator.h>
-+
-+#define AXP_POWER_STATUS		0x00
-+#define AXP_POWER_STATUS_VBUS_PRESENT		BIT(5)
-+
-+static int axp_usb_power_get_enable(struct udevice *dev)
-+{
-+	int ret;
-+
-+	ret = pmic_reg_read(dev->parent, AXP_POWER_STATUS);
-+	if (ret < 0)
-+		return ret;
-+
-+	return !!(ret & AXP_POWER_STATUS_VBUS_PRESENT);
-+}
-+
-+static const struct dm_regulator_ops axp_usb_power_ops = {
-+	.get_enable		= axp_usb_power_get_enable,
-+};
-+
-+static int axp_usb_power_probe(struct udevice *dev)
-+{
-+	struct dm_regulator_uclass_plat *uc_plat = dev_get_uclass_plat(dev);
-+
-+	uc_plat->type = REGULATOR_TYPE_FIXED;
-+
-+	return 0;
-+}
-+
-+static const struct udevice_id axp_usb_power_ids[] = {
-+	{ .compatible = "x-powers,axp202-usb-power-supply" },
-+	{ .compatible = "x-powers,axp221-usb-power-supply" },
-+	{ .compatible = "x-powers,axp223-usb-power-supply" },
-+	{ .compatible = "x-powers,axp813-usb-power-supply" },
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(axp_usb_power) = {
-+	.name		= "axp_usb_power",
-+	.id		= UCLASS_REGULATOR,
-+	.of_match	= axp_usb_power_ids,
-+	.probe		= axp_usb_power_probe,
-+	.ops		= &axp_usb_power_ops,
-+};

package/boot/uboot-d1/patches/0005-riscv-cpu-thead-Add-CPU-specific-cache-operations.patch

@@ -0,0 +1,134 @@
+From a2615b3b161929df1ae151585d4638cc4ab09bf9 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 4 Feb 2023 14:29:20 -0600
+Subject: [PATCH 05/68] riscv: cpu: thead: Add CPU-specific cache operations
+
+Use the vendor CSRs for enabling/disabling the caches, and the ISA
+extension for cache maintenance.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/riscv/cpu/thead/Kconfig  |  2 +
+ arch/riscv/cpu/thead/Makefile |  1 +
+ arch/riscv/cpu/thead/cache.c  | 96 +++++++++++++++++++++++++++++++++++
+ 3 files changed, 99 insertions(+)
+ create mode 100644 arch/riscv/cpu/thead/cache.c
+
+--- a/arch/riscv/cpu/thead/Kconfig
++++ b/arch/riscv/cpu/thead/Kconfig
+@@ -2,6 +2,8 @@
+ 
+ config THEAD_C906
+ 	bool
++	select SYS_CACHE_SHIFT_6
+ 
+ config THEAD_E906
+ 	bool
++	select SYS_CACHE_SHIFT_5
+--- a/arch/riscv/cpu/thead/Makefile
++++ b/arch/riscv/cpu/thead/Makefile
+@@ -1,4 +1,5 @@
+ # SPDX-License-Identifier: GPL-2.0+
+ 
++obj-y += cache.o
+ obj-y += cpu.o
+ obj-y += dram.o
+--- /dev/null
++++ b/arch/riscv/cpu/thead/cache.c
+@@ -0,0 +1,96 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include <cpu_func.h>
++#include <asm/cache.h>
++#include <asm/csr.h>
++#include <linux/bitops.h>
++
++#include "thead_csr.h"
++
++#define THEAD_SYNC_I		".long 0x01a0000b"
++#define THEAD_DCACHE_CIALL	".long 0x0030000b"
++#define THEAD_DCACHE_CIPA_A0	".long 0x02b5000b"
++#define THEAD_DCACHE_IALL	".long 0x0020000b"
++#define THEAD_DCACHE_IPA_A0	".long 0x02a5000b"
++#define THEAD_ICACHE_IPA_A0	".long 0x0385000b"
++
++static inline void sync_i(void)
++{
++	asm volatile (THEAD_SYNC_I ::: "memory");
++}
++
++void flush_dcache_all(void)
++{
++	asm volatile (THEAD_DCACHE_CIALL ::: "memory");
++	sync_i();
++}
++
++void flush_dcache_range(unsigned long start, unsigned long end)
++{
++	register ulong addr asm ("a0") = start & -CONFIG_SYS_CACHELINE_SIZE;
++
++	for (; addr < end; addr += CONFIG_SYS_CACHELINE_SIZE)
++		asm volatile (THEAD_DCACHE_CIPA_A0 :: "r" (addr) : "memory");
++	sync_i();
++}
++
++void invalidate_dcache_all(void)
++{
++	asm volatile (THEAD_DCACHE_IALL ::: "memory");
++	sync_i();
++}
++
++void invalidate_dcache_range(unsigned long start, unsigned long end)
++{
++	register ulong addr asm ("a0") = start & -CONFIG_SYS_CACHELINE_SIZE;
++
++	for (; addr < end; addr += CONFIG_SYS_CACHELINE_SIZE)
++		asm volatile (THEAD_DCACHE_IPA_A0 :: "r" (addr) : "memory");
++	sync_i();
++}
++
++void invalidate_icache_range(unsigned long start, unsigned long end)
++{
++	register ulong addr asm ("a0") = start & -CONFIG_SYS_CACHELINE_SIZE;
++
++	for (; addr < end; addr += CONFIG_SYS_CACHELINE_SIZE)
++		asm volatile (THEAD_ICACHE_IPA_A0 :: "r" (addr) : "memory");
++	sync_i();
++}
++
++#if CONFIG_IS_ENABLED(RISCV_MMODE)
++
++void icache_enable(void)
++{
++	invalidate_icache_all();
++	csr_set(CSR_MHCR, MHCR_IE);
++}
++
++void icache_disable(void)
++{
++	csr_clear(CSR_MHCR, MHCR_IE);
++}
++
++int icache_status(void)
++{
++	return csr_read(CSR_MHCR) & MHCR_IE;
++}
++
++void dcache_enable(void)
++{
++	invalidate_dcache_all();
++	csr_set(CSR_MHCR, MHCR_DE);
++}
++
++void dcache_disable(void)
++{
++	flush_dcache_all();
++	csr_clear(CSR_MHCR, MHCR_DE);
++}
++
++int dcache_status(void)
++{
++	return csr_read(CSR_MHCR) & MHCR_DE;
++}
++
++#endif

package/boot/uboot-d1/patches/0006-gpio-axp-sunxi-Remove-virtual-VBUS-detection-GPIO.patch

@@ -1,122 +0,0 @@
-From c750151e1107a8d46ca0f9bd30c1da276b142ec1 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Thu, 26 Aug 2021 18:02:54 -0500
-Subject: [PATCH 06/90] gpio: axp/sunxi: Remove virtual VBUS detection GPIO
-
-Now that this functionality is modeled using the device tree and
-regulator uclass, the named GPIO is not referenced anywhere. Remove it.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/include/asm/arch-sunxi/gpio.h |  1 -
- drivers/gpio/axp_gpio.c                | 21 ++++-----------------
- drivers/gpio/sunxi_gpio.c              |  6 +-----
- include/axp209.h                       |  1 -
- include/axp221.h                       |  1 -
- include/axp809.h                       |  1 -
- include/axp818.h                       |  1 -
- 7 files changed, 5 insertions(+), 27 deletions(-)
-
---- a/arch/arm/include/asm/arch-sunxi/gpio.h
-+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
-@@ -209,7 +209,6 @@ enum sunxi_gpio_number {
- 
- /* Virtual AXP0 GPIOs */
- #define SUNXI_GPIO_AXP0_PREFIX "AXP0-"
--#define SUNXI_GPIO_AXP0_VBUS_DETECT	4
- #define SUNXI_GPIO_AXP0_VBUS_ENABLE	5
- #define SUNXI_GPIO_AXP0_GPIO_COUNT	6
- 
---- a/drivers/gpio/axp_gpio.c
-+++ b/drivers/gpio/axp_gpio.c
-@@ -36,18 +36,11 @@ static int axp_gpio_direction_input(stru
- {
- 	u8 reg;
- 
--	switch (pin) {
--#ifndef CONFIG_AXP152_POWER /* NA on axp152 */
--	case SUNXI_GPIO_AXP0_VBUS_DETECT:
--		return 0;
--#endif
--	default:
--		reg = axp_get_gpio_ctrl_reg(pin);
--		if (reg == 0)
--			return -EINVAL;
-+	reg = axp_get_gpio_ctrl_reg(pin);
-+	if (reg == 0)
-+		return -EINVAL;
- 
--		return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT);
--	}
-+	return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT);
- }
- 
- static int axp_gpio_direction_output(struct udevice *dev, unsigned pin,
-@@ -83,12 +76,6 @@ static int axp_gpio_get_value(struct ude
- 	int ret;
- 
- 	switch (pin) {
--#ifndef CONFIG_AXP152_POWER /* NA on axp152 */
--	case SUNXI_GPIO_AXP0_VBUS_DETECT:
--		ret = pmic_bus_read(AXP_POWER_STATUS, &val);
--		mask = AXP_POWER_STATUS_VBUS_PRESENT;
--		break;
--#endif
- #ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC
- 	/* Only available on later PMICs */
- 	case SUNXI_GPIO_AXP0_VBUS_ENABLE:
---- a/drivers/gpio/sunxi_gpio.c
-+++ b/drivers/gpio/sunxi_gpio.c
-@@ -117,11 +117,7 @@ int sunxi_name_to_gpio(const char *name)
- #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
- 	char lookup[8];
- 
--	if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
--		sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
--			SUNXI_GPIO_AXP0_VBUS_DETECT);
--		name = lookup;
--	} else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
-+	if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
- 		sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
- 			SUNXI_GPIO_AXP0_VBUS_ENABLE);
- 		name = lookup;
---- a/include/axp209.h
-+++ b/include/axp209.h
-@@ -77,7 +77,6 @@ enum axp209_reg {
- #ifdef CONFIG_AXP209_POWER
- #define AXP_POWER_STATUS		0x00
- #define AXP_POWER_STATUS_ALDO_IN		BIT(0)
--#define AXP_POWER_STATUS_VBUS_PRESENT		BIT(5)
- #define AXP_GPIO0_CTRL			0x90
- #define AXP_GPIO1_CTRL			0x92
- #define AXP_GPIO2_CTRL			0x93
---- a/include/axp221.h
-+++ b/include/axp221.h
-@@ -53,7 +53,6 @@
- #ifdef CONFIG_AXP221_POWER
- #define AXP_POWER_STATUS		0x00
- #define AXP_POWER_STATUS_ALDO_IN		BIT(0)
--#define AXP_POWER_STATUS_VBUS_PRESENT		BIT(5)
- #define AXP_VBUS_IPSOUT			0x30
- #define AXP_VBUS_IPSOUT_DRIVEBUS		(1 << 2)
- #define AXP_MISC_CTRL			0x8f
---- a/include/axp809.h
-+++ b/include/axp809.h
-@@ -47,7 +47,6 @@
- #ifdef CONFIG_AXP809_POWER
- #define AXP_POWER_STATUS		0x00
- #define AXP_POWER_STATUS_ALDO_IN		BIT(0)
--#define AXP_POWER_STATUS_VBUS_PRESENT		BIT(5)
- #define AXP_VBUS_IPSOUT			0x30
- #define AXP_VBUS_IPSOUT_DRIVEBUS		(1 << 2)
- #define AXP_MISC_CTRL			0x8f
---- a/include/axp818.h
-+++ b/include/axp818.h
-@@ -61,7 +61,6 @@
- #ifdef CONFIG_AXP818_POWER
- #define AXP_POWER_STATUS		0x00
- #define AXP_POWER_STATUS_ALDO_IN		BIT(0)
--#define AXP_POWER_STATUS_VBUS_PRESENT		BIT(5)
- #define AXP_VBUS_IPSOUT			0x30
- #define AXP_VBUS_IPSOUT_DRIVEBUS		(1 << 2)
- #define AXP_MISC_CTRL			0x8f

package/boot/uboot-d1/patches/0007-fdt-Fix-bounds-check-in-devfdt_get_addr_index.patch

@@ -1,7 +1,7 @@
-From 0e4edc3a01f179337bb0bd0d31855dbce338a23e Mon Sep 17 00:00:00 2001
+From 8d12d6e5730c80503840e3c18fafb9bed4133dc9 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sun, 30 Oct 2022 14:53:45 -0500
-Subject: [PATCH 22/90] fdt: Fix bounds check in devfdt_get_addr_index
+Subject: [PATCH 07/68] fdt: Fix bounds check in devfdt_get_addr_index
 
 reg must contain enough cells for the entire next address/size pair
 after skipping `index` pairs. The previous code allows an out-of-bounds
@@ -17,7 +17,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/drivers/core/fdtaddr.c
 +++ b/drivers/core/fdtaddr.c
-@@ -43,7 +43,7 @@ fdt_addr_t devfdt_get_addr_index(const s
+@@ -44,7 +44,7 @@ fdt_addr_t devfdt_get_addr_index(const s
  		}
  
  		reg = fdt_getprop(gd->fdt_blob, offset, "reg", &len);

package/boot/uboot-d1/patches/0008-fdt-Use-correct-parent-in-devfdt_get_addr_index.patch

@@ -0,0 +1,21 @@
+From 1c5558f39481911fdb730fd686e710c7f696f17f Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Thu, 17 Nov 2022 22:08:39 -0600
+Subject: [PATCH 08/68] fdt: Use correct parent in devfdt_get_addr_index
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/core/fdtaddr.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/core/fdtaddr.c
++++ b/drivers/core/fdtaddr.c
+@@ -23,7 +23,7 @@ fdt_addr_t devfdt_get_addr_index(const s
+ {
+ #if CONFIG_IS_ENABLED(OF_REAL)
+ 	int offset = dev_of_offset(dev);
+-	int parent = dev_of_offset(dev->parent);
++	int parent = fdt_parent_offset(gd->fdt_blob, offset);
+ 	fdt_addr_t addr;
+ 
+ 	if (CONFIG_IS_ENABLED(OF_TRANSLATE)) {

package/boot/uboot-d1/patches/0008-power-pmic-axp-Probe-the-drivevbus-regulator-from-th.patch

@@ -1,41 +0,0 @@
-From a588c97f146b67bae47099bc419cf10c02eca169 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Thu, 26 Aug 2021 21:34:33 -0500
-Subject: [PATCH 08/90] power: pmic: axp: Probe the drivevbus regulator from
- the DT
-
-Now that some regulator driver exists for this PMIC, add support for
-probing regulator drivers from the device tree subnodes.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/power/pmic/axp.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/power/pmic/axp.c
-+++ b/drivers/power/pmic/axp.c
-@@ -45,14 +45,24 @@ static struct dm_pmic_ops axp_pmic_ops =
- 	.write		= dm_i2c_write,
- };
- 
-+static const struct pmic_child_info axp_pmic_child_info[] = {
-+	{ "drivevbus",	"axp_drivevbus"	},
-+	{ }
-+};
-+
- static int axp_pmic_bind(struct udevice *dev)
- {
-+	ofnode regulators_node;
- 	int ret;
- 
- 	ret = dm_scan_fdt_dev(dev);
- 	if (ret)
- 		return ret;
- 
-+	regulators_node = dev_read_subnode(dev, "regulators");
-+	if (ofnode_valid(regulators_node))
-+		pmic_bind_children(dev, regulators_node, axp_pmic_child_info);
-+
- 	if (CONFIG_IS_ENABLED(SYSRESET)) {
- 		ret = device_bind_driver_to_node(dev, "axp_sysreset", "axp_sysreset",
- 						 dev_ofnode(dev), NULL);

package/boot/uboot-d1/patches/0009-sunxi-Fix-default-enablement-of-USB-host-drivers.patch

@@ -1,7 +1,7 @@
-From 64de4fd71d35c6154a0f7b4c7c02cb24e978a4ce Mon Sep 17 00:00:00 2001
+From 621a4aa15b1b3afbbb364cd6dddeab5a84e68d32 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 23:45:19 -0500
-Subject: [PATCH 54/90] sunxi: Fix default-enablement of USB host drivers
+Subject: [PATCH 09/68] sunxi: Fix default-enablement of USB host drivers
 
 We tried to enable USB_EHCI_GENERIC and USB_OHCI_GENERIC by default.
 This did not work because those symbols depend on USB_EHCI_HCD and
@@ -15,7 +15,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1142,7 +1142,11 @@ config ARCH_SUNXI
+@@ -1173,7 +1173,11 @@ config ARCH_SUNXI
  	imply SYSRESET
  	imply SYSRESET_WATCHDOG
  	imply SYSRESET_WATCHDOG_AUTO
@@ -29,7 +29,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  config ARCH_U8500
 --- a/drivers/usb/host/Kconfig
 +++ b/drivers/usb/host/Kconfig
-@@ -281,7 +281,6 @@ config USB_EHCI_ZYNQ
+@@ -293,7 +293,6 @@ config USB_EHCI_ZYNQ
  config USB_EHCI_GENERIC
  	bool "Support for generic EHCI USB controller"
  	depends on DM_USB
@@ -37,7 +37,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	---help---
  	  Enables support for generic EHCI controller.
  
-@@ -343,7 +342,6 @@ config USB_OHCI_PCI
+@@ -355,7 +354,6 @@ config USB_OHCI_PCI
  
  config USB_OHCI_GENERIC
  	bool "Support for generic OHCI USB controller"

package/boot/uboot-d1/patches/0010-sunxi-Remove-obsolete-USBx_VBUS_PIN-Kconfig-symbols.patch

@@ -1,58 +0,0 @@
-From 649bb7845e30805c66f62fc5725c4dbf350f21cb Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Thu, 26 Aug 2021 22:26:40 -0500
-Subject: [PATCH 10/90] sunxi: Remove obsolete USBx_VBUS_PIN Kconfig symbols
-
-Now that the USB PHY driver uses the device tree to get VBUS supply
-regulators, these Kconfig symbols are unused. Remove them.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/mach-sunxi/Kconfig | 29 -----------------------------
- 1 file changed, 29 deletions(-)
-
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -693,13 +693,6 @@ config MMC_SUNXI_SLOT_EXTRA
- 	slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
- 	support for this.
- 
--config USB0_VBUS_PIN
--	string "Vbus enable pin for usb0 (otg)"
--	default ""
--	---help---
--	Set the Vbus enable pin for usb0 (otg). This takes a string in the
--	format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
--
- config USB0_VBUS_DET
- 	string "Vbus detect pin for usb0 (otg)"
- 	default ""
-@@ -714,28 +707,6 @@ config USB0_ID_DET
- 	Set the ID detect pin for usb0 (otg). This takes a string in the
- 	format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
- 
--config USB1_VBUS_PIN
--	string "Vbus enable pin for usb1 (ehci0)"
--	default "PH6" if MACH_SUN4I || MACH_SUN7I
--	default "PH27" if MACH_SUN6I
--	---help---
--	Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
--	a string in the format understood by sunxi_name_to_gpio, e.g.
--	PH1 for pin 1 of port H.
--
--config USB2_VBUS_PIN
--	string "Vbus enable pin for usb2 (ehci1)"
--	default "PH3" if MACH_SUN4I || MACH_SUN7I
--	default "PH24" if MACH_SUN6I
--	---help---
--	See USB1_VBUS_PIN help text.
--
--config USB3_VBUS_PIN
--	string "Vbus enable pin for usb3 (ehci2)"
--	default ""
--	---help---
--	See USB1_VBUS_PIN help text.
--
- config I2C0_ENABLE
- 	bool "Enable I2C/TWI controller 0"
- 	default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40

package/boot/uboot-d1/patches/0010-sunxi-Remove-unnecessary-Kconfig-selections.patch

@@ -1,7 +1,7 @@
-From 891fef47500dbf4aecb16e08c1d8ade3fbc8caec Mon Sep 17 00:00:00 2001
+From 5cde123b1d04da567899fe29e78cb98d6d66b54b Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Thu, 4 Aug 2022 23:22:05 -0500
-Subject: [PATCH 55/90] sunxi: Remove unnecessary Kconfig selections
+Subject: [PATCH 10/68] sunxi: Remove unnecessary Kconfig selections
 
 Two of these selections are redundant and have no effect:
  - DM_KEYBOARD is selected by USB_KEYBOARD
@@ -17,7 +17,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1100,8 +1100,6 @@ config ARCH_SUNXI
+@@ -1131,8 +1131,6 @@ config ARCH_SUNXI
  	select DM_I2C if I2C
  	select DM_SPI if SPI
  	select DM_SPI_FLASH if SPI
@@ -25,8 +25,8 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 -	select DM_MMC if MMC
  	select DM_SCSI if SCSI
  	select DM_SERIAL
- 	select GPIO_EXTRA_HEADER
-@@ -1119,7 +1117,6 @@ config ARCH_SUNXI
+ 	select OF_BOARD_SETUP
+@@ -1149,7 +1147,6 @@ config ARCH_SUNXI
  	select SYS_THUMB_BUILD if !ARM64
  	select USB if DISTRO_DEFAULTS
  	select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST

package/boot/uboot-d1/patches/0011-clk-sunxi-Add-support-for-the-D1-CCU.patch

@@ -1,393 +0,0 @@
-From 73d6c82e34e89cfde880d1948b3e0dc714adead8 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 30 Apr 2022 22:34:19 -0500
-Subject: [PATCH 11/90] clk: sunxi: Add support for the D1 CCU
-
-Since the D1 CCU binding is defined, we can add support for its
-gates/resets, following the pattern of the existing drivers.
-
-Series-to: sunxi
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/clk/sunxi/Kconfig                 |   6 +
- drivers/clk/sunxi/Makefile                |   1 +
- drivers/clk/sunxi/clk_d1.c                |  82 ++++++++++++
- drivers/clk/sunxi/clk_sunxi.c             |   5 +
- include/dt-bindings/clock/sun20i-d1-ccu.h | 156 ++++++++++++++++++++++
- include/dt-bindings/reset/sun20i-d1-ccu.h |  77 +++++++++++
- 6 files changed, 327 insertions(+)
- create mode 100644 drivers/clk/sunxi/clk_d1.c
- create mode 100644 include/dt-bindings/clock/sun20i-d1-ccu.h
- create mode 100644 include/dt-bindings/reset/sun20i-d1-ccu.h
-
---- a/drivers/clk/sunxi/Kconfig
-+++ b/drivers/clk/sunxi/Kconfig
-@@ -87,6 +87,12 @@ config CLK_SUN8I_H3
- 	  This enables common clock driver support for platforms based
- 	  on Allwinner H3/H5 SoC.
- 
-+config CLK_SUN20I_D1
-+	bool "Clock driver for Allwinner D1"
-+	help
-+	  This enables common clock driver support for platforms based
-+	  on Allwinner D1 SoC.
-+
- config CLK_SUN50I_H6
- 	bool "Clock driver for Allwinner H6"
- 	default MACH_SUN50I_H6
---- a/drivers/clk/sunxi/Makefile
-+++ b/drivers/clk/sunxi/Makefile
-@@ -19,6 +19,7 @@ obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
- obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
- obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
- obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
-+obj-$(CONFIG_CLK_SUN20I_D1) += clk_d1.o
- obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
- obj-$(CONFIG_CLK_SUN50I_H6_R) += clk_h6_r.o
- obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
---- /dev/null
-+++ b/drivers/clk/sunxi/clk_d1.c
-@@ -0,0 +1,82 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
-+ */
-+
-+#include <common.h>
-+#include <clk-uclass.h>
-+#include <dm.h>
-+#include <errno.h>
-+#include <clk/sunxi.h>
-+#include <dt-bindings/clock/sun20i-d1-ccu.h>
-+#include <dt-bindings/reset/sun20i-d1-ccu.h>
-+#include <linux/bitops.h>
-+
-+static struct ccu_clk_gate d1_gates[] = {
-+	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
-+	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
-+	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
-+	[CLK_BUS_UART0]		= GATE(0x90c, BIT(0)),
-+	[CLK_BUS_UART1]		= GATE(0x90c, BIT(1)),
-+	[CLK_BUS_UART2]		= GATE(0x90c, BIT(2)),
-+	[CLK_BUS_UART3]		= GATE(0x90c, BIT(3)),
-+	[CLK_BUS_UART4]		= GATE(0x90c, BIT(4)),
-+	[CLK_BUS_UART5]		= GATE(0x90c, BIT(5)),
-+	[CLK_BUS_I2C0]		= GATE(0x91c, BIT(0)),
-+	[CLK_BUS_I2C1]		= GATE(0x91c, BIT(1)),
-+	[CLK_BUS_I2C2]		= GATE(0x91c, BIT(2)),
-+	[CLK_BUS_I2C3]		= GATE(0x91c, BIT(3)),
-+	[CLK_SPI0]		= GATE(0x940, BIT(31)),
-+	[CLK_SPI1]		= GATE(0x944, BIT(31)),
-+	[CLK_BUS_SPI0]		= GATE(0x96c, BIT(0)),
-+	[CLK_BUS_SPI1]		= GATE(0x96c, BIT(1)),
-+
-+	[CLK_BUS_EMAC]		= GATE(0x97c, BIT(0)),
-+
-+	[CLK_USB_OHCI0]		= GATE(0xa70, BIT(31)),
-+	[CLK_USB_OHCI1]		= GATE(0xa74, BIT(31)),
-+	[CLK_BUS_OHCI0]		= GATE(0xa8c, BIT(0)),
-+	[CLK_BUS_OHCI1]		= GATE(0xa8c, BIT(1)),
-+	[CLK_BUS_EHCI0]		= GATE(0xa8c, BIT(4)),
-+	[CLK_BUS_EHCI1]		= GATE(0xa8c, BIT(5)),
-+	[CLK_BUS_OTG]		= GATE(0xa8c, BIT(8)),
-+	[CLK_BUS_LRADC]		= GATE(0xa9c, BIT(0)),
-+
-+	[CLK_RISCV]		= GATE(0xd04, BIT(31)),
-+};
-+
-+static struct ccu_reset d1_resets[] = {
-+	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
-+	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
-+	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
-+	[RST_BUS_UART0]		= RESET(0x90c, BIT(16)),
-+	[RST_BUS_UART1]		= RESET(0x90c, BIT(17)),
-+	[RST_BUS_UART2]		= RESET(0x90c, BIT(18)),
-+	[RST_BUS_UART3]		= RESET(0x90c, BIT(19)),
-+	[RST_BUS_UART4]		= RESET(0x90c, BIT(20)),
-+	[RST_BUS_UART5]		= RESET(0x90c, BIT(21)),
-+	[RST_BUS_I2C0]		= RESET(0x91c, BIT(16)),
-+	[RST_BUS_I2C1]		= RESET(0x91c, BIT(17)),
-+	[RST_BUS_I2C2]		= RESET(0x91c, BIT(18)),
-+	[RST_BUS_I2C3]		= RESET(0x91c, BIT(19)),
-+	[RST_BUS_SPI0]		= RESET(0x96c, BIT(16)),
-+	[RST_BUS_SPI1]		= RESET(0x96c, BIT(17)),
-+
-+	[RST_BUS_EMAC]		= RESET(0x97c, BIT(16)),
-+
-+	[RST_USB_PHY0]		= RESET(0xa70, BIT(30)),
-+	[RST_USB_PHY1]		= RESET(0xa74, BIT(30)),
-+	[RST_BUS_OHCI0]		= RESET(0xa8c, BIT(16)),
-+	[RST_BUS_OHCI1]		= RESET(0xa8c, BIT(17)),
-+	[RST_BUS_EHCI0]		= RESET(0xa8c, BIT(20)),
-+	[RST_BUS_EHCI1]		= RESET(0xa8c, BIT(21)),
-+	[RST_BUS_OTG]		= RESET(0xa8c, BIT(24)),
-+	[RST_BUS_LRADC]		= RESET(0xa9c, BIT(16)),
-+};
-+
-+const struct ccu_desc d1_ccu_desc = {
-+	.gates	= d1_gates,
-+	.resets	= d1_resets,
-+	.num_gates = ARRAY_SIZE(d1_gates),
-+	.num_resets = ARRAY_SIZE(d1_resets),
-+};
---- a/drivers/clk/sunxi/clk_sunxi.c
-+++ b/drivers/clk/sunxi/clk_sunxi.c
-@@ -118,6 +118,7 @@ extern const struct ccu_desc a64_ccu_des
- extern const struct ccu_desc a80_ccu_desc;
- extern const struct ccu_desc a80_mmc_clk_desc;
- extern const struct ccu_desc a83t_ccu_desc;
-+extern const struct ccu_desc d1_ccu_desc;
- extern const struct ccu_desc f1c100s_ccu_desc;
- extern const struct ccu_desc h3_ccu_desc;
- extern const struct ccu_desc h6_ccu_desc;
-@@ -183,6 +184,10 @@ static const struct udevice_id sunxi_clk
- 	{ .compatible = "allwinner,sun9i-a80-mmc-config-clk",
- 	  .data = (ulong)&a80_mmc_clk_desc },
- #endif
-+#ifdef CONFIG_CLK_SUN20I_D1
-+	{ .compatible = "allwinner,sun20i-d1-ccu",
-+	  .data = (ulong)&d1_ccu_desc },
-+#endif
- #ifdef CONFIG_CLK_SUN50I_A64
- 	{ .compatible = "allwinner,sun50i-a64-ccu",
- 	  .data = (ulong)&a64_ccu_desc },
---- /dev/null
-+++ b/include/dt-bindings/clock/sun20i-d1-ccu.h
-@@ -0,0 +1,156 @@
-+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-+/*
-+ * Copyright (C) 2020 huangzhenwei@allwinnertech.com
-+ * Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
-+ */
-+
-+#ifndef _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_
-+#define _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_
-+
-+#define CLK_PLL_CPUX		0
-+#define CLK_PLL_DDR0		1
-+#define CLK_PLL_PERIPH0_4X	2
-+#define CLK_PLL_PERIPH0_2X	3
-+#define CLK_PLL_PERIPH0_800M	4
-+#define CLK_PLL_PERIPH0		5
-+#define CLK_PLL_PERIPH0_DIV3	6
-+#define CLK_PLL_VIDEO0_4X	7
-+#define CLK_PLL_VIDEO0_2X	8
-+#define CLK_PLL_VIDEO0		9
-+#define CLK_PLL_VIDEO1_4X	10
-+#define CLK_PLL_VIDEO1_2X	11
-+#define CLK_PLL_VIDEO1		12
-+#define CLK_PLL_VE		13
-+#define CLK_PLL_AUDIO0_4X	14
-+#define CLK_PLL_AUDIO0_2X	15
-+#define CLK_PLL_AUDIO0		16
-+#define CLK_PLL_AUDIO1		17
-+#define CLK_PLL_AUDIO1_DIV2	18
-+#define CLK_PLL_AUDIO1_DIV5	19
-+#define CLK_CPUX		20
-+#define CLK_CPUX_AXI		21
-+#define CLK_CPUX_APB		22
-+#define CLK_PSI_AHB		23
-+#define CLK_APB0		24
-+#define CLK_APB1		25
-+#define CLK_MBUS		26
-+#define CLK_DE			27
-+#define CLK_BUS_DE		28
-+#define CLK_DI			29
-+#define CLK_BUS_DI		30
-+#define CLK_G2D			31
-+#define CLK_BUS_G2D		32
-+#define CLK_CE			33
-+#define CLK_BUS_CE		34
-+#define CLK_VE			35
-+#define CLK_BUS_VE		36
-+#define CLK_BUS_DMA		37
-+#define CLK_BUS_MSGBOX0		38
-+#define CLK_BUS_MSGBOX1		39
-+#define CLK_BUS_MSGBOX2		40
-+#define CLK_BUS_SPINLOCK	41
-+#define CLK_BUS_HSTIMER		42
-+#define CLK_AVS			43
-+#define CLK_BUS_DBG		44
-+#define CLK_BUS_PWM		45
-+#define CLK_BUS_IOMMU		46
-+#define CLK_DRAM		47
-+#define CLK_MBUS_DMA		48
-+#define CLK_MBUS_VE		49
-+#define CLK_MBUS_CE		50
-+#define CLK_MBUS_TVIN		51
-+#define CLK_MBUS_CSI		52
-+#define CLK_MBUS_G2D		53
-+#define CLK_MBUS_RISCV		54
-+#define CLK_BUS_DRAM		55
-+#define CLK_MMC0		56
-+#define CLK_MMC1		57
-+#define CLK_MMC2		58
-+#define CLK_BUS_MMC0		59
-+#define CLK_BUS_MMC1		60
-+#define CLK_BUS_MMC2		61
-+#define CLK_BUS_UART0		62
-+#define CLK_BUS_UART1		63
-+#define CLK_BUS_UART2		64
-+#define CLK_BUS_UART3		65
-+#define CLK_BUS_UART4		66
-+#define CLK_BUS_UART5		67
-+#define CLK_BUS_I2C0		68
-+#define CLK_BUS_I2C1		69
-+#define CLK_BUS_I2C2		70
-+#define CLK_BUS_I2C3		71
-+#define CLK_SPI0		72
-+#define CLK_SPI1		73
-+#define CLK_BUS_SPI0		74
-+#define CLK_BUS_SPI1		75
-+#define CLK_EMAC_25M		76
-+#define CLK_BUS_EMAC		77
-+#define CLK_IR_TX		78
-+#define CLK_BUS_IR_TX		79
-+#define CLK_BUS_GPADC		80
-+#define CLK_BUS_THS		81
-+#define CLK_I2S0		82
-+#define CLK_I2S1		83
-+#define CLK_I2S2		84
-+#define CLK_I2S2_ASRC		85
-+#define CLK_BUS_I2S0		86
-+#define CLK_BUS_I2S1		87
-+#define CLK_BUS_I2S2		88
-+#define CLK_SPDIF_TX		89
-+#define CLK_SPDIF_RX		90
-+#define CLK_BUS_SPDIF		91
-+#define CLK_DMIC		92
-+#define CLK_BUS_DMIC		93
-+#define CLK_AUDIO_DAC		94
-+#define CLK_AUDIO_ADC		95
-+#define CLK_BUS_AUDIO		96
-+#define CLK_USB_OHCI0		97
-+#define CLK_USB_OHCI1		98
-+#define CLK_BUS_OHCI0		99
-+#define CLK_BUS_OHCI1		100
-+#define CLK_BUS_EHCI0		101
-+#define CLK_BUS_EHCI1		102
-+#define CLK_BUS_OTG		103
-+#define CLK_BUS_LRADC		104
-+#define CLK_BUS_DPSS_TOP	105
-+#define CLK_HDMI_24M		106
-+#define CLK_HDMI_CEC_32K	107
-+#define CLK_HDMI_CEC		108
-+#define CLK_BUS_HDMI		109
-+#define CLK_MIPI_DSI		110
-+#define CLK_BUS_MIPI_DSI	111
-+#define CLK_TCON_LCD0		112
-+#define CLK_BUS_TCON_LCD0	113
-+#define CLK_TCON_TV		114
-+#define CLK_BUS_TCON_TV		115
-+#define CLK_TVE			116
-+#define CLK_BUS_TVE_TOP		117
-+#define CLK_BUS_TVE		118
-+#define CLK_TVD			119
-+#define CLK_BUS_TVD_TOP		120
-+#define CLK_BUS_TVD		121
-+#define CLK_LEDC		122
-+#define CLK_BUS_LEDC		123
-+#define CLK_CSI_TOP		124
-+#define CLK_CSI_MCLK		125
-+#define CLK_BUS_CSI		126
-+#define CLK_TPADC		127
-+#define CLK_BUS_TPADC		128
-+#define CLK_BUS_TZMA		129
-+#define CLK_DSP			130
-+#define CLK_BUS_DSP_CFG		131
-+#define CLK_RISCV		132
-+#define CLK_RISCV_AXI		133
-+#define CLK_BUS_RISCV_CFG	134
-+#define CLK_FANOUT_24M		135
-+#define CLK_FANOUT_12M		136
-+#define CLK_FANOUT_16M		137
-+#define CLK_FANOUT_25M		138
-+#define CLK_FANOUT_32K		139
-+#define CLK_FANOUT_27M		140
-+#define CLK_FANOUT_PCLK		141
-+#define CLK_FANOUT0		142
-+#define CLK_FANOUT1		143
-+#define CLK_FANOUT2		144
-+
-+#endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */
---- /dev/null
-+++ b/include/dt-bindings/reset/sun20i-d1-ccu.h
-@@ -0,0 +1,77 @@
-+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-+/*
-+ * Copyright (c) 2020 huangzhenwei@allwinnertech.com
-+ * Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
-+ */
-+
-+#ifndef _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
-+#define _DT_BINDINGS_RST_SUN20I_D1_CCU_H_
-+
-+#define RST_MBUS		0
-+#define RST_BUS_DE		1
-+#define RST_BUS_DI		2
-+#define RST_BUS_G2D		3
-+#define RST_BUS_CE		4
-+#define RST_BUS_VE		5
-+#define RST_BUS_DMA		6
-+#define RST_BUS_MSGBOX0		7
-+#define RST_BUS_MSGBOX1		8
-+#define RST_BUS_MSGBOX2		9
-+#define RST_BUS_SPINLOCK	10
-+#define RST_BUS_HSTIMER		11
-+#define RST_BUS_DBG		12
-+#define RST_BUS_PWM		13
-+#define RST_BUS_DRAM		14
-+#define RST_BUS_MMC0		15
-+#define RST_BUS_MMC1		16
-+#define RST_BUS_MMC2		17
-+#define RST_BUS_UART0		18
-+#define RST_BUS_UART1		19
-+#define RST_BUS_UART2		20
-+#define RST_BUS_UART3		21
-+#define RST_BUS_UART4		22
-+#define RST_BUS_UART5		23
-+#define RST_BUS_I2C0		24
-+#define RST_BUS_I2C1		25
-+#define RST_BUS_I2C2		26
-+#define RST_BUS_I2C3		27
-+#define RST_BUS_SPI0		28
-+#define RST_BUS_SPI1		29
-+#define RST_BUS_EMAC		30
-+#define RST_BUS_IR_TX		31
-+#define RST_BUS_GPADC		32
-+#define RST_BUS_THS		33
-+#define RST_BUS_I2S0		34
-+#define RST_BUS_I2S1		35
-+#define RST_BUS_I2S2		36
-+#define RST_BUS_SPDIF		37
-+#define RST_BUS_DMIC		38
-+#define RST_BUS_AUDIO		39
-+#define RST_USB_PHY0		40
-+#define RST_USB_PHY1		41
-+#define RST_BUS_OHCI0		42
-+#define RST_BUS_OHCI1		43
-+#define RST_BUS_EHCI0		44
-+#define RST_BUS_EHCI1		45
-+#define RST_BUS_OTG		46
-+#define RST_BUS_LRADC		47
-+#define RST_BUS_DPSS_TOP	48
-+#define RST_BUS_HDMI_SUB	49
-+#define RST_BUS_HDMI_MAIN	50
-+#define RST_BUS_MIPI_DSI	51
-+#define RST_BUS_TCON_LCD0	52
-+#define RST_BUS_TCON_TV		53
-+#define RST_BUS_LVDS0		54
-+#define RST_BUS_TVE		55
-+#define RST_BUS_TVE_TOP		56
-+#define RST_BUS_TVD		57
-+#define RST_BUS_TVD_TOP		58
-+#define RST_BUS_LEDC		59
-+#define RST_BUS_CSI		60
-+#define RST_BUS_TPADC		61
-+#define RST_DSP			62
-+#define RST_BUS_DSP_CFG		63
-+#define RST_BUS_DSP_DBG		64
-+#define RST_BUS_RISCV_CFG	65
-+
-+#endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */

package/boot/uboot-d1/patches/0011-sunxi-Add-missing-dependencies-to-Kconfig-selections.patch

@@ -1,7 +1,7 @@
-From 9e12a7fd80276092da3a43b7dbaf572bad294419 Mon Sep 17 00:00:00 2001
+From cfe45b43247eca1f3ca82c76a114dd0201b23b40 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Thu, 4 Aug 2022 23:29:13 -0500
-Subject: [PATCH 56/90] sunxi: Add missing dependencies to Kconfig selections
+Subject: [PATCH 11/68] sunxi: Add missing dependencies to Kconfig selections
 
 Some of the selected symbols have a user-visible dependency. Make the
 selections conditional on that dependency to avoid creating invalid
@@ -9,12 +9,12 @@ configurations.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
- arch/arm/Kconfig | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
+ arch/arm/Kconfig | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1090,30 +1090,30 @@ config ARCH_SOCFPGA
+@@ -1122,28 +1122,28 @@ config ARCH_SOCFPGA
  config ARCH_SUNXI
  	bool "Support sunxi (Allwinner) SoCs"
  	select BINMAN
@@ -24,18 +24,15 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	select CMD_USB if DISTRO_DEFAULTS && USB_HOST
  	select CLK
  	select DM
--	select DM_ETH
 -	select DM_GPIO
-+	select DM_ETH if NET
 +	select DM_GPIO if GPIO
  	select DM_I2C if I2C
-+	select DM_SCSI if BLK && SCSI
++	select DM_SCSI if SCSI
 +	select DM_SERIAL if SERIAL
  	select DM_SPI if SPI
  	select DM_SPI_FLASH if SPI
 -	select DM_SCSI if SCSI
 -	select DM_SERIAL
- 	select GPIO_EXTRA_HEADER
  	select OF_BOARD_SETUP
  	select OF_CONTROL
  	select OF_SEPARATE

package/boot/uboot-d1/patches/0012-sunxi-Hide-image-type-selection-if-SPL-is-disabled.patch

@@ -1,7 +1,7 @@
-From 2ba626d36e622f29528ce953618dde9a01bdacd6 Mon Sep 17 00:00:00 2001
+From a80637f9492a79c6e1b6d7a5f1a48aae08a0f004 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 21:56:43 -0500
-Subject: [PATCH 57/90] sunxi: Hide image type selection if SPL is disabled
+Subject: [PATCH 12/68] sunxi: Hide image type selection if SPL is disabled
 
 This choice is meaningless when SPL is disabled. Hide it to avoid any
 possible confusion.

package/boot/uboot-d1/patches/0013-clk-sunxi-Add-a-driver-for-the-legacy-A31-A23-A33-PR.patch

@@ -1,160 +0,0 @@
-From 5a909f4d4d10f3a7a59b3b75eee502937e166891 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Mon, 2 May 2022 22:00:05 -0500
-Subject: [PATCH 13/90] clk: sunxi: Add a driver for the legacy A31/A23/A33
- PRCM
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/clk/sunxi/Kconfig        | 13 ++++-
- drivers/clk/sunxi/Makefile       |  1 +
- drivers/clk/sunxi/clk_a31_apb0.c | 97 ++++++++++++++++++++++++++++++++
- include/clk/sunxi.h              |  1 +
- 4 files changed, 110 insertions(+), 2 deletions(-)
- create mode 100644 drivers/clk/sunxi/clk_a31_apb0.c
-
---- a/drivers/clk/sunxi/Kconfig
-+++ b/drivers/clk/sunxi/Kconfig
-@@ -38,12 +38,21 @@ config CLK_SUN6I_A31
- 	  This enables common clock driver support for platforms based
- 	  on Allwinner A31/A31s SoC.
- 
-+config CLK_SUN6I_A31_APB0
-+	bool "Clock driver for Allwinner A31 generation PRCM (legacy)"
-+	default MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33
-+	help
-+	  This enables common clock driver support for the PRCM
-+	  in Allwinner A31/A31s/A23/A33 SoCs using the legacy PRCM
-+	  MFD binding.
-+
- config CLK_SUN6I_A31_R
--	bool "Clock driver for Allwinner A31 generation PRCM"
-+	bool "Clock driver for Allwinner A31 generation PRCM (CCU)"
- 	default SUNXI_GEN_SUN6I
- 	help
- 	  This enables common clock driver support for the PRCM
--	  in Allwinner A31/A31s/A23/A33/A83T/H3/A64/H5 SoCs.
-+	  in Allwinner A31/A31s/A23/A33/A83T/H3/A64/H5 SoCs using
-+	  the new CCU binding.
- 
- config CLK_SUN8I_A23
- 	bool "Clock driver for Allwinner A23/A33"
---- a/drivers/clk/sunxi/Makefile
-+++ b/drivers/clk/sunxi/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_CLK_SUNIV_F1C100S) += clk_f
- obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
- obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
- obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
-+obj-$(CONFIG_CLK_SUN6I_A31_APB0) += clk_a31_apb0.o
- obj-$(CONFIG_CLK_SUN6I_A31_R) += clk_a31_r.o
- obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
- obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
---- /dev/null
-+++ b/drivers/clk/sunxi/clk_a31_apb0.c
-@@ -0,0 +1,97 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (C) Samuel Holland <samuel@sholland.org>
-+ */
-+
-+#include <clk-uclass.h>
-+#include <dm.h>
-+#include <clk/sunxi.h>
-+#include <linux/bitops.h>
-+
-+static struct ccu_clk_gate sun6i_apb0_gates[] = {
-+	[0]	= GATE(0x028, BIT(0)),
-+	[1]	= GATE(0x028, BIT(1)),
-+	[2]	= GATE(0x028, BIT(2)),
-+	[3]	= GATE(0x028, BIT(3)),
-+	[4]	= GATE(0x028, BIT(4)),
-+	[5]	= GATE(0x028, BIT(5)),
-+	[6]	= GATE(0x028, BIT(6)),
-+	[7]	= GATE(0x028, BIT(7)),
-+};
-+
-+static struct ccu_reset sun6i_apb0_resets[] = {
-+	[0]	= RESET(0x0b0, BIT(0)),
-+	[1]	= RESET(0x0b0, BIT(1)),
-+	[2]	= RESET(0x0b0, BIT(2)),
-+	[3]	= RESET(0x0b0, BIT(3)),
-+	[4]	= RESET(0x0b0, BIT(4)),
-+	[5]	= RESET(0x0b0, BIT(5)),
-+	[6]	= RESET(0x0b0, BIT(6)),
-+	[7]	= RESET(0x0b0, BIT(7)),
-+};
-+
-+const struct ccu_desc sun6i_apb0_clk_desc = {
-+	.gates = sun6i_apb0_gates,
-+	.resets = sun6i_apb0_resets,
-+	.num_gates = ARRAY_SIZE(sun6i_apb0_gates),
-+	.num_resets = ARRAY_SIZE(sun6i_apb0_resets),
-+};
-+
-+static int sun6i_apb0_of_to_plat(struct udevice *dev)
-+{
-+	struct ccu_plat *plat = dev_get_plat(dev);
-+
-+	plat->base = dev_read_addr_ptr(dev->parent);
-+	if (!plat->base)
-+		return -ENOMEM;
-+
-+	plat->desc = (const struct ccu_desc *)dev_get_driver_data(dev);
-+	if (!plat->desc)
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static const struct udevice_id sun6i_apb0_clk_ids[] = {
-+	{ .compatible = "allwinner,sun6i-a31-apb0-gates-clk",
-+	  .data = (ulong)&sun6i_apb0_clk_desc },
-+	{ .compatible = "allwinner,sun8i-a23-apb0-gates-clk",
-+	  .data = (ulong)&sun6i_apb0_clk_desc },
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(sun6i_apb0_clk) = {
-+	.name		= "sun6i_apb0_clk",
-+	.id		= UCLASS_CLK,
-+	.of_match	= sun6i_apb0_clk_ids,
-+	.of_to_plat	= sun6i_apb0_of_to_plat,
-+	.plat_auto	= sizeof(struct ccu_plat),
-+	.ops		= &sunxi_clk_ops,
-+};
-+
-+static const struct udevice_id sun6i_apb0_reset_ids[] = {
-+	{ .compatible = "allwinner,sun6i-a31-clock-reset",
-+	  .data = (ulong)&sun6i_apb0_clk_desc },
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(sun6i_apb0_reset) = {
-+	.name		= "sun6i_apb0_reset",
-+	.id		= UCLASS_RESET,
-+	.of_match	= sun6i_apb0_reset_ids,
-+	.of_to_plat	= sun6i_apb0_of_to_plat,
-+	.plat_auto	= sizeof(struct ccu_plat),
-+	.ops		= &sunxi_reset_ops,
-+};
-+
-+static const struct udevice_id sun6i_prcm_mfd_ids[] = {
-+	{ .compatible = "allwinner,sun6i-a31-prcm" },
-+	{ .compatible = "allwinner,sun8i-a23-prcm" },
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(sun6i_prcm_mfd) = {
-+	.name		= "sun6i_prcm_mfd",
-+	.id		= UCLASS_SIMPLE_BUS,
-+	.of_match	= sun6i_prcm_mfd_ids,
-+};
---- a/include/clk/sunxi.h
-+++ b/include/clk/sunxi.h
-@@ -86,5 +86,6 @@ struct ccu_plat {
- };
- 
- extern struct clk_ops sunxi_clk_ops;
-+extern struct reset_ops sunxi_reset_ops;
- 
- #endif /* _CLK_SUNXI_H */

package/boot/uboot-d1/patches/0013-sunxi-Share-the-board-Kconfig-across-architectures.patch

@@ -1,7 +1,7 @@
-From 5d197433cd54085306e369ac260e09fe6077bfbb Mon Sep 17 00:00:00 2001
+From 64c72d292e8ed6c2aa183d966a5c2a844f76be96 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Thu, 4 Aug 2022 21:30:57 -0500
-Subject: [PATCH 58/90] sunxi: Share the board Kconfig across architectures
+Subject: [PATCH 13/68] sunxi: Share the board Kconfig across architectures
 
 With the introduction of the Allwinner D1, the sunxi board family now
 spans multiple architectures (ARM and RISC-V). Since ARCH_SUNXI depends
@@ -23,7 +23,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/arch/Kconfig
 +++ b/arch/Kconfig
-@@ -482,6 +482,7 @@ source "arch/Kconfig.nxp"
+@@ -494,6 +494,7 @@ source "arch/Kconfig.nxp"
  endif
  
  source "board/keymile/Kconfig"
@@ -33,7 +33,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1090,6 +1090,7 @@ config ARCH_SOCFPGA
+@@ -1122,6 +1122,7 @@ config ARCH_SOCFPGA
  config ARCH_SUNXI
  	bool "Support sunxi (Allwinner) SoCs"
  	select BINMAN
@@ -43,7 +43,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	select CMD_USB if DISTRO_DEFAULTS && USB_HOST
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -959,8 +959,6 @@ config BLUETOOTH_DT_DEVICE_FIXUP
+@@ -1095,8 +1095,6 @@ config BLUETOOTH_DT_DEVICE_FIXUP
  	  The used address is "bdaddr" if set, and "ethaddr" with the LSB
  	  flipped elsewise.
  

package/boot/uboot-d1/patches/0014-clk-sunxi-Use-the-right-symbol-in-the-Makefile.patch

@@ -1,21 +0,0 @@
-From 3d97f99cb173422ee8a15b7ec1df83ff61e68204 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 30 Oct 2022 14:28:23 -0500
-Subject: [PATCH 14/90] clk: sunxi: Use the right symbol in the Makefile
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/clk/Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/Makefile
-+++ b/drivers/clk/Makefile
-@@ -25,7 +25,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
- obj-$(CONFIG_ARCH_SOCFPGA) += altera/
- obj-$(CONFIG_ARCH_STM32) += stm32/
- obj-$(CONFIG_ARCH_STM32MP) += stm32/
--obj-$(CONFIG_ARCH_SUNXI) += sunxi/
-+obj-$(CONFIG_CLK_SUNXI) += sunxi/
- obj-$(CONFIG_CLK_AT91) += at91/
- obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
- obj-$(CONFIG_CLK_BOSTON) += clk_boston.o

package/boot/uboot-d1/patches/0014-sunxi-Move-most-Kconfig-selections-to-the-board-Kcon.patch

@@ -1,7 +1,7 @@
-From 963331be1cc924ad7c928f88b3ee46bc20a41bcd Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Tue, 6 Jun 2023 18:06:20 +0000
-Subject: [PATCH 59/90] sunxi: Move most Kconfig selections to the board
+From 957c017647a8bcd9908fc67dc106c438d79fd6c6 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Thu, 4 Aug 2022 22:42:29 -0500
+Subject: [PATCH 14/68] sunxi: Move most Kconfig selections to the board
  Kconfig
 
 To maintain consistent behavior across architectures, most of the
@@ -11,16 +11,14 @@ well. To accomplish this, select them from BOARD_SUNXI instead.
 No functional change here. Lines are only moved and alphabetized.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
-
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 ---
  arch/arm/Kconfig    | 47 ---------------------------------------------
- board/sunxi/Kconfig | 46 ++++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 46 insertions(+), 47 deletions(-)
+ board/sunxi/Kconfig | 47 +++++++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 47 insertions(+), 47 deletions(-)
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1089,63 +1089,16 @@ config ARCH_SOCFPGA
+@@ -1121,62 +1121,15 @@ config ARCH_SOCFPGA
  
  config ARCH_SUNXI
  	bool "Support sunxi (Allwinner) SoCs"
@@ -31,14 +29,12 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 -	select CMD_USB if DISTRO_DEFAULTS && USB_HOST
 -	select CLK
 -	select DM
--	select DM_ETH if NET
 -	select DM_GPIO if GPIO
 -	select DM_I2C if I2C
--	select DM_SCSI if BLK && SCSI
+-	select DM_SCSI if SCSI
 -	select DM_SERIAL if SERIAL
 -	select DM_SPI if SPI
 -	select DM_SPI_FLASH if SPI
- 	select GPIO_EXTRA_HEADER
 -	select OF_BOARD_SETUP
  	select OF_CONTROL
  	select OF_SEPARATE
@@ -61,6 +57,8 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 -	imply CMD_GPT
 -	imply CMD_UBI if MTD_RAW_NAND
 -	imply DISTRO_DEFAULTS
+-	imply DM_REGULATOR
+-	imply DM_REGULATOR_FIXED
 -	imply FAT_WRITE
 -	imply FIT
 -	imply OF_LIBFDT_OVERLAY
@@ -68,7 +66,6 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 -	imply SPL_GPIO
 -	imply SPL_LIBCOMMON_SUPPORT
 -	imply SPL_LIBGENERIC_SUPPORT
--	imply SPL_LOAD_FIT
 -	imply SPL_MMC if MMC
 -	imply SPL_POWER
 -	imply SPL_SERIAL
@@ -86,7 +83,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	bool "ST-Ericsson U8500 Series"
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -1,5 +1,51 @@
+@@ -1,5 +1,52 @@
  config BOARD_SUNXI
  	bool
 +	select BINMAN
@@ -95,10 +92,9 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 +	select CMD_MMC if MMC
 +	select CMD_USB if DISTRO_DEFAULTS && USB_HOST
 +	select DM
-+	select DM_ETH if NET
 +	select DM_GPIO if GPIO
 +	select DM_I2C if I2C
-+	select DM_SCSI if BLK && SCSI
++	select DM_SCSI if SCSI
 +	select DM_SERIAL if SERIAL
 +	select DM_SPI if SPI
 +	select DM_SPI_FLASH if SPI
@@ -116,6 +112,8 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 +	imply CMD_GPT
 +	imply CMD_UBI if MTD_RAW_NAND
 +	imply DISTRO_DEFAULTS
++	imply DM_REGULATOR
++	imply DM_REGULATOR_FIXED
 +	imply FAT_WRITE
 +	imply FIT
 +	imply OF_LIBFDT_OVERLAY

package/boot/uboot-d1/patches/0015-net-sun8i-emac-Use-common-syscon-setup-for-R40.patch

@@ -1,100 +0,0 @@
-From 9766169812418aee10dbc8d40aca27c1c576f521 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Thu, 14 Jul 2022 23:39:46 -0500
-Subject: [PATCH 15/90] net: sun8i-emac: Use common syscon setup for R40
-
-While R40 puts the EMAC syscon register at a different address from
-other variants, the relevant portion of the register's layout is the
-same. Factor out the register offset so the same code can be shared
-by all variants. This matches what the Linux driver does.
-
-This change provides two benefits beyond the simplification:
- - R40 boards now respect the RX delays from the devicetree
- - This resolves a warning on architectures where readl/writel
-   expect the address to have a pointer type, not phys_addr_t.
-
-Series-to: sunxi
-
-Cover-letter:
-net: sun8i-emac: Allwinner D1 Support
-D1 is a RISC-V SoC containing an EMAC compatible with the A64 EMAC.
-However, there are a couple of issues with the driver preventing it
-being built for RISC-V. These are resolved by patches 2-3. Patch 1 is
-a general cleanup.
-END
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/net/sun8i_emac.c | 29 ++++++++++++-----------------
- 1 file changed, 12 insertions(+), 17 deletions(-)
-
---- a/drivers/net/sun8i_emac.c
-+++ b/drivers/net/sun8i_emac.c
-@@ -162,7 +162,7 @@ struct emac_eth_dev {
- 
- 	enum emac_variant variant;
- 	void *mac_reg;
--	phys_addr_t sysctl_reg;
-+	void *sysctl_reg;
- 	struct phy_device *phydev;
- 	struct mii_dev *bus;
- 	struct clk tx_clk;
-@@ -317,18 +317,7 @@ static int sun8i_emac_set_syscon(struct
- {
- 	u32 reg;
- 
--	if (priv->variant == R40_GMAC) {
--		/* Select RGMII for R40 */
--		reg = readl(priv->sysctl_reg + 0x164);
--		reg |= SC_ETCS_INT_GMII |
--		       SC_EPIT |
--		       (CONFIG_GMAC_TX_DELAY << SC_ETXDC_OFFSET);
--
--		writel(reg, priv->sysctl_reg + 0x164);
--		return 0;
--	}
--
--	reg = readl(priv->sysctl_reg + 0x30);
-+	reg = readl(priv->sysctl_reg);
- 
- 	reg = sun8i_emac_set_syscon_ephy(priv, reg);
- 
-@@ -369,7 +358,7 @@ static int sun8i_emac_set_syscon(struct
- 		reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)
- 			 & SC_ERXDC_MASK;
- 
--	writel(reg, priv->sysctl_reg + 0x30);
-+	writel(reg, priv->sysctl_reg);
- 
- 	return 0;
- }
-@@ -792,6 +781,7 @@ static int sun8i_emac_eth_of_to_plat(str
- 	struct sun8i_eth_pdata *sun8i_pdata = dev_get_plat(dev);
- 	struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
- 	struct emac_eth_dev *priv = dev_get_priv(dev);
-+	phys_addr_t syscon_base;
- 	const fdt32_t *reg;
- 	int node = dev_of_offset(dev);
- 	int offset = 0;
-@@ -837,13 +827,18 @@ static int sun8i_emac_eth_of_to_plat(str
- 		      __func__);
- 		return -EINVAL;
- 	}
--	priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
--						 offset, reg);
--	if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
-+
-+	syscon_base = fdt_translate_address((void *)gd->fdt_blob, offset, reg);
-+	if (syscon_base == FDT_ADDR_T_NONE) {
- 		debug("%s: Cannot find syscon base address\n", __func__);
- 		return -EINVAL;
- 	}
- 
-+	if (priv->variant == R40_GMAC)
-+		priv->sysctl_reg = (void *)syscon_base + 0x164;
-+	else
-+		priv->sysctl_reg = (void *)syscon_base + 0x30;
-+
- 	pdata->phy_interface = -1;
- 	priv->phyaddr = -1;
- 	priv->use_internal_phy = false;

package/boot/uboot-d1/patches/0015-sunxi-Globally-enable-SUPPORT_SPL.patch

@@ -1,13 +1,12 @@
-From 5838fd3a53e613312d46ab4cb6015a502c4c45d0 Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Tue, 6 Jun 2023 18:07:24 +0000
-Subject: [PATCH 60/90] sunxi: Globally enable SUPPORT_SPL
+From 0c6f608a682d2ba1e28e7d0f54186e78a44916f4 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Fri, 5 Aug 2022 23:31:04 -0500
+Subject: [PATCH 15/68] sunxi: Globally enable SUPPORT_SPL
 
 This was already supported by every machine type. It is unlikely that
 any new SoC support will be added without SPL support.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 ---
  arch/arm/mach-sunxi/Kconfig | 14 --------------
  board/sunxi/Kconfig         |  2 ++
@@ -15,7 +14,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -133,7 +133,6 @@ config SUN50I_GEN_H6
+@@ -184,7 +184,6 @@ config SUN50I_GEN_H6
  	select FIT
  	select SPL_LOAD_FIT
  	select MMC_SUNXI_HAS_NEW_MODE
@@ -23,7 +22,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	---help---
  	Select this for sunxi SoCs which have H6 like peripherals, clocks
  	and memory map.
-@@ -166,7 +165,6 @@ config MACH_SUNXI_H3_H5
+@@ -225,7 +224,6 @@ config MACH_SUNXI_H3_H5
  	select SUNXI_DRAM_DW
  	select SUNXI_DRAM_DW_32BIT
  	select SUNXI_GEN_SUN6I
@@ -31,7 +30,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  
  # TODO: try out A80's 8GiB DRAM space
  config SUNXI_DRAM_MAX_SIZE
-@@ -183,7 +181,6 @@ config MACH_SUNIV
+@@ -242,7 +240,6 @@ config MACH_SUNIV
  	bool "suniv (Allwinner F1C100s/F1C200s/F1C600/R6)"
  	select CPU_ARM926EJS
  	select SUNXI_GEN_SUN6I
@@ -39,7 +38,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SKIP_LOWLEVEL_INIT_ONLY
  	select SPL_SKIP_LOWLEVEL_INIT_ONLY
  
-@@ -192,7 +189,6 @@ config MACH_SUN4I
+@@ -251,7 +248,6 @@ config MACH_SUN4I
  	select CPU_V7A
  	select DRAM_SUN4I
  	select SUNXI_GEN_SUN4I
@@ -47,7 +46,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	imply SPL_SYS_I2C_LEGACY
  	imply SYS_I2C_LEGACY
  
-@@ -201,7 +197,6 @@ config MACH_SUN5I
+@@ -260,7 +256,6 @@ config MACH_SUN5I
  	select CPU_V7A
  	select DRAM_SUN4I
  	select SUNXI_GEN_SUN4I
@@ -55,7 +54,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	imply SPL_SYS_I2C_LEGACY
  	imply SYS_I2C_LEGACY
  
-@@ -216,7 +211,6 @@ config MACH_SUN6I
+@@ -275,7 +270,6 @@ config MACH_SUN6I
  	select SPL_I2C
  	select SUN6I_PRCM
  	select SUNXI_GEN_SUN6I
@@ -63,7 +62,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SYS_I2C_SUN6I_P2WI
  	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  
-@@ -229,7 +223,6 @@ config MACH_SUN7I
+@@ -288,7 +282,6 @@ config MACH_SUN7I
  	select SPL_ARMV7_SET_CORTEX_SMPEN
  	select DRAM_SUN4I
  	select SUNXI_GEN_SUN4I
@@ -71,7 +70,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  	imply SPL_SYS_I2C_LEGACY
  	imply SYS_I2C_LEGACY
-@@ -243,7 +236,6 @@ config MACH_SUN8I_A23
+@@ -302,7 +295,6 @@ config MACH_SUN8I_A23
  	select DRAM_SUN8I_A23
  	select SPL_I2C
  	select SUNXI_GEN_SUN6I
@@ -79,7 +78,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SYS_I2C_SUN8I_RSB
  	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  
-@@ -256,7 +248,6 @@ config MACH_SUN8I_A33
+@@ -315,7 +307,6 @@ config MACH_SUN8I_A33
  	select DRAM_SUN8I_A33
  	select SPL_I2C
  	select SUNXI_GEN_SUN6I
@@ -87,7 +86,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SYS_I2C_SUN8I_RSB
  	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  
-@@ -268,7 +259,6 @@ config MACH_SUN8I_A83T
+@@ -327,7 +318,6 @@ config MACH_SUN8I_A83T
  	select SUNXI_GEN_SUN6I
  	select MMC_SUNXI_HAS_NEW_MODE
  	select MMC_SUNXI_HAS_MODE_SWITCH
@@ -95,7 +94,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SYS_I2C_SUN8I_RSB
  
  config MACH_SUN8I_H3
-@@ -288,7 +278,6 @@ config MACH_SUN8I_R40
+@@ -347,7 +337,6 @@ config MACH_SUN8I_R40
  	select ARCH_SUPPORT_PSCI
  	select SUNXI_GEN_SUN6I
  	select MMC_SUNXI_HAS_NEW_MODE
@@ -103,7 +102,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SUNXI_DRAM_DW
  	select SUNXI_DRAM_DW_32BIT
  	imply SPL_SYS_I2C_LEGACY
-@@ -302,7 +291,6 @@ config MACH_SUN8I_V3S
+@@ -374,7 +363,6 @@ config MACH_SUN8I_V3S
  	select SUNXI_GEN_SUN6I
  	select SUNXI_DRAM_DW
  	select SUNXI_DRAM_DW_16BIT
@@ -111,7 +110,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  
  config MACH_SUN9I
-@@ -313,7 +301,6 @@ config MACH_SUN9I
+@@ -385,7 +373,6 @@ config MACH_SUN9I
  	select SPL_I2C
  	select SUN6I_PRCM
  	select SUNXI_GEN_SUN6I
@@ -119,7 +118,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  
  config MACH_SUN50I
  	bool "sun50i (Allwinner A64)"
-@@ -322,7 +309,6 @@ config MACH_SUN50I
+@@ -394,7 +381,6 @@ config MACH_SUN50I
  	select SUNXI_DE2
  	select SUNXI_GEN_SUN6I
  	select MMC_SUNXI_HAS_NEW_MODE
@@ -129,7 +128,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select FIT
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -18,6 +18,7 @@ config BOARD_SUNXI
+@@ -17,6 +17,7 @@ config BOARD_SUNXI
  	select SPL_SEPARATE_BSS if SPL
  	select SUNXI_GPIO if GPIO
  	select SYS_NS16550 if SERIAL
@@ -137,7 +136,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select SYS_RELOC_GD_ENV_ADDR
  	select USB if DISTRO_DEFAULTS
  	select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
-@@ -31,6 +32,7 @@ config BOARD_SUNXI
+@@ -32,6 +33,7 @@ config BOARD_SUNXI
  	imply FIT
  	imply OF_LIBFDT_OVERLAY
  	imply PRE_CONSOLE_BUFFER

package/boot/uboot-d1/patches/0016-sunxi-Downgrade-driver-selections-to-implications.patch

@@ -1,7 +1,7 @@
-From 6c8707fcd3372015829a1e8b8d5e8030c5806382 Mon Sep 17 00:00:00 2001
+From 3e5ec1535312a3d413ba8300227e5601841d3f6b Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 6 Aug 2022 00:10:46 -0500
-Subject: [PATCH 61/90] sunxi: Downgrade driver selections to implications
+Subject: [PATCH 16/68] sunxi: Downgrade driver selections to implications
 
 While not especially likely, it is plausible that someone wants to build
 U-Boot without GPIO or UART support. Don't force building these drivers.
@@ -13,7 +13,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -16,8 +16,6 @@ config BOARD_SUNXI
+@@ -15,8 +15,6 @@ config BOARD_SUNXI
  	select OF_BOARD_SETUP
  	select PINCTRL
  	select SPL_SEPARATE_BSS if SPL
@@ -22,7 +22,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	select SUPPORT_SPL
  	select SYS_RELOC_GD_ENV_ADDR
  	select USB if DISTRO_DEFAULTS
-@@ -39,6 +37,8 @@ config BOARD_SUNXI
+@@ -40,6 +38,8 @@ config BOARD_SUNXI
  	imply SPL_MMC if MMC
  	imply SPL_POWER
  	imply SPL_SERIAL

package/boot/uboot-d1/patches/0016-sunxi-mmc-ignore-card-detect-in-SPL.patch

@@ -1,92 +0,0 @@
-From 2cde6c8a7c41c13137298c19b4e104e4f5d6851c Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Wed, 13 Jul 2022 17:21:43 +0100
-Subject: [PATCH 16/90] sunxi: mmc: ignore card detect in SPL
-
-The sunxi MMC code does not use the DM in the SPL, as we don't have a
-device tree available that early, also no space for it.
-This also means we cannot access the card-detect GPIO information from
-there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each
-board has to define. This is a burden, also requires extra GPIO code in
-the SPL.
-As the SPL is the natural successor of the BootROM (from which we are
-loaded), we can actually ignore the CD pin completely, as this is what
-the BootROM does as well: CD GPIOs are board specific, but the BootROM
-is not, so accesses the MMC devices anyway.
-
-Remove the card detect code from the non-DM implementation of the sunxi
-MMC driver, to get rid of this unneeded code.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
----
- drivers/mmc/sunxi_mmc.c | 37 ++-----------------------------------
- 1 file changed, 2 insertions(+), 35 deletions(-)
-
---- a/drivers/mmc/sunxi_mmc.c
-+++ b/drivers/mmc/sunxi_mmc.c
-@@ -44,22 +44,10 @@ struct sunxi_mmc_priv {
- /* support 4 mmc hosts */
- struct sunxi_mmc_priv mmc_host[4];
- 
--static int sunxi_mmc_getcd_gpio(int sdc_no)
--{
--	switch (sdc_no) {
--	case 0: return sunxi_name_to_gpio(CONFIG_MMC0_CD_PIN);
--	case 1: return sunxi_name_to_gpio(CONFIG_MMC1_CD_PIN);
--	case 2: return sunxi_name_to_gpio(CONFIG_MMC2_CD_PIN);
--	case 3: return sunxi_name_to_gpio(CONFIG_MMC3_CD_PIN);
--	}
--	return -EINVAL;
--}
--
- static int mmc_resource_init(int sdc_no)
- {
- 	struct sunxi_mmc_priv *priv = &mmc_host[sdc_no];
- 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
--	int cd_pin, ret = 0;
- 
- 	debug("init mmc %d resource\n", sdc_no);
- 
-@@ -90,16 +78,7 @@ static int mmc_resource_init(int sdc_no)
- 	}
- 	priv->mmc_no = sdc_no;
- 
--	cd_pin = sunxi_mmc_getcd_gpio(sdc_no);
--	if (cd_pin >= 0) {
--		ret = gpio_request(cd_pin, "mmc_cd");
--		if (!ret) {
--			sunxi_gpio_set_pull(cd_pin, SUNXI_GPIO_PULL_UP);
--			ret = gpio_direction_input(cd_pin);
--		}
--	}
--
--	return ret;
-+	return 0;
- }
- #endif
- 
-@@ -523,23 +502,11 @@ static int sunxi_mmc_send_cmd_legacy(str
- 	return sunxi_mmc_send_cmd_common(priv, mmc, cmd, data);
- }
- 
--static int sunxi_mmc_getcd_legacy(struct mmc *mmc)
--{
--	struct sunxi_mmc_priv *priv = mmc->priv;
--	int cd_pin;
--
--	cd_pin = sunxi_mmc_getcd_gpio(priv->mmc_no);
--	if (cd_pin < 0)
--		return 1;
--
--	return !gpio_get_value(cd_pin);
--}
--
-+/* .get_cd is not needed by the SPL */
- static const struct mmc_ops sunxi_mmc_ops = {
- 	.send_cmd	= sunxi_mmc_send_cmd_legacy,
- 	.set_ios	= sunxi_mmc_set_ios_legacy,
- 	.init		= sunxi_mmc_core_init,
--	.getcd		= sunxi_mmc_getcd_legacy,
- };
- 
- struct mmc *sunxi_mmc_init(int sdc_no)

package/boot/uboot-d1/patches/0017-sunxi-Enable-the-I2C-driver-by-default.patch

@@ -1,7 +1,7 @@
-From ad619478827b825d7b88dce22eb9b5e1c6ea7eb0 Mon Sep 17 00:00:00 2001
+From 0289892858b876c5a11cce944c006ed0fd41e011 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 6 Aug 2022 00:11:54 -0500
-Subject: [PATCH 62/90] sunxi: Enable the I2C driver by default
+Subject: [PATCH 17/68] sunxi: Enable the I2C driver by default
 
 This is used by quite a large number of boards, for PMIC/regulator or
 LCD panel control.
@@ -13,7 +13,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -38,6 +38,7 @@ config BOARD_SUNXI
+@@ -39,6 +39,7 @@ config BOARD_SUNXI
  	imply SPL_POWER
  	imply SPL_SERIAL
  	imply SUNXI_GPIO

package/boot/uboot-d1/patches/0017-sunxi-mmc-group-non-DM-specific-functions.patch

@@ -1,177 +0,0 @@
-From 74afc3a4e0ff780eddd859a25de7142e4baeeed5 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Wed, 13 Jul 2022 17:21:44 +0100
-Subject: [PATCH 17/90] sunxi: mmc: group non-DM specific functions
-
-As the SPL code for sunxi boards does not use the driver model, we have
-two mmc_ops structures, one for DM, one for non-DM. The actual hardware
-access code is shared, with the respective callback functions using that
-common code.
-
-To make this more obvious and easier to read, reorder the functions to
-group them: we first have the common code, then the non-DM bits, and
-the proper DM implementation at the end.
-Also document this structure in the comment at the beginning of the file.
-
-No functional change intended.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
----
- drivers/mmc/sunxi_mmc.c | 117 +++++++++++++++++++++-------------------
- 1 file changed, 61 insertions(+), 56 deletions(-)
-
---- a/drivers/mmc/sunxi_mmc.c
-+++ b/drivers/mmc/sunxi_mmc.c
-@@ -5,6 +5,12 @@
-  * Aaron <leafy.myeh@allwinnertech.com>
-  *
-  * MMC driver for allwinner sunxi platform.
-+ *
-+ * This driver is used by the (ARM) SPL with the legacy MMC interface, and
-+ * by U-Boot proper using the full DM interface. The actual hardware access
-+ * code is common, and comes first in this file.
-+ * The legacy MMC interface implementation comes next, followed by the
-+ * proper DM_MMC implementation at the end.
-  */
- 
- #include <common.h>
-@@ -40,48 +46,6 @@ struct sunxi_mmc_priv {
- 	struct mmc_config cfg;
- };
- 
--#if !CONFIG_IS_ENABLED(DM_MMC)
--/* support 4 mmc hosts */
--struct sunxi_mmc_priv mmc_host[4];
--
--static int mmc_resource_init(int sdc_no)
--{
--	struct sunxi_mmc_priv *priv = &mmc_host[sdc_no];
--	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
--
--	debug("init mmc %d resource\n", sdc_no);
--
--	switch (sdc_no) {
--	case 0:
--		priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE;
--		priv->mclkreg = &ccm->sd0_clk_cfg;
--		break;
--	case 1:
--		priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE;
--		priv->mclkreg = &ccm->sd1_clk_cfg;
--		break;
--#ifdef SUNXI_MMC2_BASE
--	case 2:
--		priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE;
--		priv->mclkreg = &ccm->sd2_clk_cfg;
--		break;
--#endif
--#ifdef SUNXI_MMC3_BASE
--	case 3:
--		priv->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE;
--		priv->mclkreg = &ccm->sd3_clk_cfg;
--		break;
--#endif
--	default:
--		printf("Wrong mmc number %d\n", sdc_no);
--		return -1;
--	}
--	priv->mmc_no = sdc_no;
--
--	return 0;
--}
--#endif
--
- /*
-  * All A64 and later MMC controllers feature auto-calibration. This would
-  * normally be detected via the compatible string, but we need something
-@@ -269,19 +233,6 @@ static int sunxi_mmc_set_ios_common(stru
- 	return 0;
- }
- 
--#if !CONFIG_IS_ENABLED(DM_MMC)
--static int sunxi_mmc_core_init(struct mmc *mmc)
--{
--	struct sunxi_mmc_priv *priv = mmc->priv;
--
--	/* Reset controller */
--	writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
--	udelay(1000);
--
--	return 0;
--}
--#endif
--
- static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc,
- 				 struct mmc_data *data)
- {
-@@ -486,7 +437,60 @@ out:
- 	return error;
- }
- 
-+/* non-DM code here is used by the (ARM) SPL only */
-+
- #if !CONFIG_IS_ENABLED(DM_MMC)
-+/* support 4 mmc hosts */
-+struct sunxi_mmc_priv mmc_host[4];
-+
-+static int mmc_resource_init(int sdc_no)
-+{
-+	struct sunxi_mmc_priv *priv = &mmc_host[sdc_no];
-+	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-+
-+	debug("init mmc %d resource\n", sdc_no);
-+
-+	switch (sdc_no) {
-+	case 0:
-+		priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE;
-+		priv->mclkreg = &ccm->sd0_clk_cfg;
-+		break;
-+	case 1:
-+		priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE;
-+		priv->mclkreg = &ccm->sd1_clk_cfg;
-+		break;
-+#ifdef SUNXI_MMC2_BASE
-+	case 2:
-+		priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE;
-+		priv->mclkreg = &ccm->sd2_clk_cfg;
-+		break;
-+#endif
-+#ifdef SUNXI_MMC3_BASE
-+	case 3:
-+		priv->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE;
-+		priv->mclkreg = &ccm->sd3_clk_cfg;
-+		break;
-+#endif
-+	default:
-+		printf("Wrong mmc number %d\n", sdc_no);
-+		return -1;
-+	}
-+	priv->mmc_no = sdc_no;
-+
-+	return 0;
-+}
-+
-+static int sunxi_mmc_core_init(struct mmc *mmc)
-+{
-+	struct sunxi_mmc_priv *priv = mmc->priv;
-+
-+	/* Reset controller */
-+	writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
-+	udelay(1000);
-+
-+	return 0;
-+}
-+
- static int sunxi_mmc_set_ios_legacy(struct mmc *mmc)
- {
- 	struct sunxi_mmc_priv *priv = mmc->priv;
-@@ -562,7 +566,8 @@ struct mmc *sunxi_mmc_init(int sdc_no)
- 
- 	return mmc_create(cfg, priv);
- }
--#else
-+
-+#else /* CONFIG_DM_MMC code below, as used by U-Boot proper */
- 
- static int sunxi_mmc_set_ios(struct udevice *dev)
- {

package/boot/uboot-d1/patches/0018-sunxi-Move-default-values-to-the-board-Kconfig.patch

@@ -1,7 +1,7 @@
-From fde804c2ece090eb7802a218781e38c7c6d6f00d Mon Sep 17 00:00:00 2001
+From 1cc94e4599cd4ab31afe58cb5e6438b30a4e6a24 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 23:10:11 -0500
-Subject: [PATCH 63/90] sunxi: Move default values to the board Kconfig
+Subject: [PATCH 18/68] sunxi: Move default values to the board Kconfig
 
 This keeps all of the defaults for sunxi platforms in one place. Most of
 these only depend on architecture-independent features of the SoC (clock
@@ -11,9 +11,9 @@ No functional change; just some minor help text cleanup.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
- arch/arm/mach-sunxi/Kconfig | 67 ------------------------------------
- board/sunxi/Kconfig         | 68 +++++++++++++++++++++++++++++++++++++
- 2 files changed, 68 insertions(+), 67 deletions(-)
+ arch/arm/mach-sunxi/Kconfig | 70 ------------------------------------
+ board/sunxi/Kconfig         | 71 +++++++++++++++++++++++++++++++++++++
+ 2 files changed, 71 insertions(+), 70 deletions(-)
 
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
@@ -26,14 +26,14 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  config DRAM_SUN4I
  	bool
  	help
-@@ -99,17 +96,6 @@ config AXP_PMIC_BUS
+@@ -124,17 +121,6 @@ config AXP_PMIC_BUS
  	  Select this PMIC bus access helpers for Sunxi platform PRCM or other
  	  AXP family PMIC devices.
  
 -config SUNXI_SRAM_ADDRESS
 -	hex
 -	default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
--	default 0x20000 if SUN50I_GEN_H6
+-	default 0x20000 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
 -	default 0x0
 -	---help---
 -	Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
@@ -41,10 +41,10 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 -	Some newer SoCs map the boot ROM at address 0 instead and move the
 -	SRAM to a different address.
 -
- config SUNXI_A64_TIMER_ERRATUM
- 	bool
- 
-@@ -562,48 +548,6 @@ config DRAM_ODT_CORRECTION
+ config SUNXI_RVBAR_ADDRESS
+ 	hex
+ 	depends on ARM64
+@@ -661,50 +647,6 @@ config DRAM_ODT_CORRECTION
  	then the correction is negative. Usually the value for this is 0.
  endif
  
@@ -59,6 +59,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 -	default 1008000000 if MACH_SUN9I
 -	default 888000000 if MACH_SUN50I_H6
 -	default 1008000000 if MACH_SUN50I_H616
+-	default 1008000000 if MACH_SUN8I_R528
 -
 -config SYS_CONFIG_NAME
 -	default "suniv" if MACH_SUNIV
@@ -67,6 +68,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 -	default "sun6i" if MACH_SUN6I
 -	default "sun7i" if MACH_SUN7I
 -	default "sun8i" if MACH_SUN8I
+-	default "sun8i" if MACH_SUN8I_R528
 -	default "sun9i" if MACH_SUN9I
 -	default "sun50i" if MACH_SUN50I
 -	default "sun50i" if MACH_SUN50I_H6
@@ -93,7 +95,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  config UART0_PORT_F
  	bool "UART0 on MicroSD breakout board"
  	---help---
-@@ -898,17 +842,6 @@ config GMAC_TX_DELAY
+@@ -1033,18 +975,6 @@ config GMAC_TX_DELAY
  	---help---
  	Set the GMAC Transmit Clock Delay Chain value.
  
@@ -107,13 +109,14 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 -	default 0x2fe00000 if MACH_SUN9I
 -	default 0x4fe00000 if MACH_SUN50I
 -	default 0x4fe00000 if SUN50I_GEN_H6
+-	default 0x4fe00000 if SUNXI_GEN_NCAT2
 -
  config SPL_SPI_SUNXI
  	bool "Support for SPI Flash on Allwinner SoCs in SPL"
  	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -52,6 +52,74 @@ config BOARD_SUNXI
+@@ -53,6 +53,77 @@ config BOARD_SUNXI
  
  if BOARD_SUNXI
  
@@ -130,6 +133,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 +	default 0x2fe00000 if MACH_SUN9I
 +	default 0x4fe00000 if MACH_SUN50I
 +	default 0x4fe00000 if SUN50I_GEN_H6
++	default 0x4fe00000 if SUNXI_GEN_NCAT2
 +
 +config SUNXI_MINIMUM_DRAM_MB
 +	int "minimum DRAM size"
@@ -147,7 +151,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 +config SUNXI_SRAM_ADDRESS
 +	hex
 +	default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
-+	default 0x20000 if SUN50I_GEN_H6
++	default 0x20000 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
 +	default 0x0
 +	help
 +	  Older Allwinner SoCs have their boot mask ROM mapped just
@@ -165,6 +169,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 +	default 1008000000 if MACH_SUN6I
 +	default  912000000 if MACH_SUN7I
 +	default 1008000000 if MACH_SUN8I
++	default 1008000000 if MACH_SUN8I_R528
 +	default 1008000000 if MACH_SUN9I
 +	default  816000000 if MACH_SUN50I || MACH_SUN50I_H5
 +	default  888000000 if MACH_SUN50I_H6
@@ -177,6 +182,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 +	default "sun6i"  if MACH_SUN6I
 +	default "sun7i"  if MACH_SUN7I
 +	default "sun8i"  if MACH_SUN8I
++	default "sun8i"  if MACH_SUN8I_R528
 +	default "sun9i"  if MACH_SUN9I
 +	default "sun50i" if MACH_SUN50I
 +	default "sun50i" if MACH_SUN50I_H6

package/boot/uboot-d1/patches/0018-sunxi-remove-CONFIG_MMC-_CD_PIN.patch

@@ -1,509 +0,0 @@
-From bcc2e01668041c146d964ed5f77b819dcc35b3e2 Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Tue, 6 Jun 2023 15:07:47 +0000
-Subject: [PATCH 18/90] sunxi: remove CONFIG_MMC?_CD_PIN
-
-For legacy reasons we were defining the card detect GPIO for all sunxi
-boards in each board's defconfig.
-There is actually no need for a card-detect check in the SPL code (which
-consequently has been removed already), and also in U-Boot proper we
-have DM code to query the CD GPIO name from the device tree.
-
-That means we don't have any user of that information left, so can
-remove the definitions from the defconfigs.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
----
- arch/arm/mach-sunxi/Kconfig                  | 27 --------------------
- configs/A10-OLinuXino-Lime_defconfig         |  1 -
- configs/A10s-OLinuXino-M_defconfig           |  2 --
- configs/A13-OLinuXino_defconfig              |  1 -
- configs/A20-OLinuXino-Lime2-eMMC_defconfig   |  1 -
- configs/A20-OLinuXino-Lime_defconfig         |  1 -
- configs/A20-OLinuXino_MICRO-eMMC_defconfig   |  1 -
- configs/A20-OLinuXino_MICRO_defconfig        |  2 --
- configs/A20-Olimex-SOM-EVB_defconfig         |  2 --
- configs/A20-Olimex-SOM204-EVB-eMMC_defconfig |  1 -
- configs/Bananapi_M2_Ultra_defconfig          |  1 -
- configs/Bananapi_m2m_defconfig               |  1 -
- configs/Cubieboard2_defconfig                |  1 -
- configs/Cubieboard4_defconfig                |  1 -
- configs/Cubieboard_defconfig                 |  1 -
- configs/Itead_Ibox_A20_defconfig             |  1 -
- configs/Lamobo_R1_defconfig                  |  1 -
- configs/Mele_M3_defconfig                    |  1 -
- configs/Mele_M5_defconfig                    |  1 -
- configs/Merrii_A80_Optimus_defconfig         |  1 -
- configs/Orangepi_mini_defconfig              |  2 --
- configs/Sinlinx_SinA31s_defconfig            |  1 -
- configs/Sinlinx_SinA33_defconfig             |  1 -
- configs/Sunchip_CX-A99_defconfig             |  1 -
- configs/UTOO_P66_defconfig                   |  1 -
- configs/Yones_Toptech_BD1078_defconfig       |  2 --
- configs/bananapi_m2_zero_defconfig           |  1 -
- configs/bananapi_m64_defconfig               |  1 -
- configs/beelink_gs1_defconfig                |  1 -
- configs/nanopi_m1_plus_defconfig             |  1 -
- configs/oceanic_5205_5inmfd_defconfig        |  1 -
- configs/orangepi_3_defconfig                 |  1 -
- configs/orangepi_lite2_defconfig             |  1 -
- configs/orangepi_one_plus_defconfig          |  1 -
- configs/orangepi_zero2_defconfig             |  1 -
- configs/orangepi_zero_plus2_defconfig        |  1 -
- configs/orangepi_zero_plus2_h3_defconfig     |  1 -
- configs/parrot_r16_defconfig                 |  1 -
- configs/pine64-lts_defconfig                 |  1 -
- configs/pine_h64_defconfig                   |  1 -
- configs/sopine_baseboard_defconfig           |  1 -
- configs/tanix_tx6_defconfig                  |  1 -
- 42 files changed, 73 deletions(-)
-
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -652,33 +652,6 @@ config MACPWR
- 	  Set the pin used to power the MAC. This takes a string in the format
- 	  understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
- 
--config MMC0_CD_PIN
--	string "Card detect pin for mmc0"
--	default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
--	default ""
--	---help---
--	Set the card detect pin for mmc0, leave empty to not use cd. This
--	takes a string in the format understood by sunxi_name_to_gpio, e.g.
--	PH1 for pin 1 of port H.
--
--config MMC1_CD_PIN
--	string "Card detect pin for mmc1"
--	default ""
--	---help---
--	See MMC0_CD_PIN help text.
--
--config MMC2_CD_PIN
--	string "Card detect pin for mmc2"
--	default ""
--	---help---
--	See MMC0_CD_PIN help text.
--
--config MMC3_CD_PIN
--	string "Card detect pin for mmc3"
--	default ""
--	---help---
--	See MMC0_CD_PIN help text.
--
- config MMC1_PINS_PH
- 	bool "Pins for mmc1 are on Port H"
- 	depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40
---- a/configs/A10-OLinuXino-Lime_defconfig
-+++ b/configs/A10-OLinuXino-Lime_defconfig
-@@ -6,7 +6,6 @@ CONFIG_MACH_SUN4I=y
- CONFIG_DRAM_CLK=480
- CONFIG_DRAM_EMR1=4
- CONFIG_SYS_CLK_FREQ=912000000
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_I2C1_ENABLE=y
- CONFIG_SATAPWR="PC3"
- CONFIG_AHCI=y
---- a/configs/A10s-OLinuXino-M_defconfig
-+++ b/configs/A10s-OLinuXino-M_defconfig
-@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-o
- CONFIG_SPL=y
- CONFIG_MACH_SUN5I=y
- CONFIG_DRAM_CLK=432
--CONFIG_MMC0_CD_PIN="PG1"
--CONFIG_MMC1_CD_PIN="PG13"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=1
- CONFIG_USB1_VBUS_PIN="PB10"
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/A13-OLinuXino_defconfig
-+++ b/configs/A13-OLinuXino_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN5I=y
- CONFIG_DRAM_CLK=408
- CONFIG_DRAM_EMR1=0
--CONFIG_MMC0_CD_PIN="PG0"
- CONFIG_USB0_VBUS_DET="PG1"
- CONFIG_USB1_VBUS_PIN="PG11"
- CONFIG_AXP_GPIO=y
---- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
-+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="PC17"
- CONFIG_USB0_VBUS_DET="PH5"
---- a/configs/A20-OLinuXino-Lime_defconfig
-+++ b/configs/A20-OLinuXino-Lime_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_I2C1_ENABLE=y
- CONFIG_SATAPWR="PC3"
- CONFIG_AHCI=y
---- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig
-+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_I2C1_ENABLE=y
- CONFIG_VIDEO_VGA=y
---- a/configs/A20-OLinuXino_MICRO_defconfig
-+++ b/configs/A20-OLinuXino_MICRO_defconfig
-@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
--CONFIG_MMC3_CD_PIN="PH11"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=3
- CONFIG_I2C1_ENABLE=y
- CONFIG_VIDEO_VGA=y
---- a/configs/A20-Olimex-SOM-EVB_defconfig
-+++ b/configs/A20-Olimex-SOM-EVB_defconfig
-@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
--CONFIG_MMC3_CD_PIN="PH0"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=3
- CONFIG_USB0_VBUS_PIN="PB9"
- CONFIG_USB0_VBUS_DET="PH5"
---- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
-+++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ol
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="PC17"
- CONFIG_USB0_VBUS_DET="PH5"
---- a/configs/Bananapi_M2_Ultra_defconfig
-+++ b/configs/Bananapi_M2_Ultra_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN8I_R40=y
- CONFIG_DRAM_CLK=576
- CONFIG_MACPWR="PA17"
--CONFIG_MMC0_CD_PIN="PH13"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB1_VBUS_PIN="PH23"
- CONFIG_USB2_VBUS_PIN="PH23"
---- a/configs/Bananapi_m2m_defconfig
-+++ b/configs/Bananapi_m2m_defconfig
-@@ -6,7 +6,6 @@ CONFIG_MACH_SUN8I_A33=y
- CONFIG_DRAM_CLK=600
- CONFIG_DRAM_ZQ=15291
- CONFIG_DRAM_ODT_EN=y
--CONFIG_MMC0_CD_PIN="PB4"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_ID_DET="PH8"
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/Cubieboard2_defconfig
-+++ b/configs/Cubieboard2_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cu
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=480
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_SATAPWR="PB8"
- CONFIG_AHCI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/Cubieboard4_defconfig
-+++ b/configs/Cubieboard4_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cu
- CONFIG_SPL=y
- CONFIG_MACH_SUN9I=y
- CONFIG_DRAM_CLK=672
--CONFIG_MMC0_CD_PIN="PH18"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
- CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
---- a/configs/Cubieboard_defconfig
-+++ b/configs/Cubieboard_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cu
- CONFIG_SPL=y
- CONFIG_MACH_SUN4I=y
- CONFIG_DRAM_CLK=480
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_SATAPWR="PB8"
- CONFIG_AHCI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/Itead_Ibox_A20_defconfig
-+++ b/configs/Itead_Ibox_A20_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-it
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=480
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_SATAPWR="PB8"
- CONFIG_AHCI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/Lamobo_R1_defconfig
-+++ b/configs/Lamobo_R1_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=432
- CONFIG_MACPWR="PH23"
--CONFIG_MMC0_CD_PIN="PH10"
- CONFIG_SATAPWR="PB3"
- CONFIG_GMAC_TX_DELAY=4
- CONFIG_AHCI=y
---- a/configs/Mele_M3_defconfig
-+++ b/configs/Mele_M3_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=384
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_VIDEO_VGA=y
- CONFIG_VIDEO_COMPOSITE=y
---- a/configs/Mele_M5_defconfig
-+++ b/configs/Mele_M5_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=432
- CONFIG_DRAM_ZQ=122
--CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_VIDEO_COMPOSITE=y
- CONFIG_AHCI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/Merrii_A80_Optimus_defconfig
-+++ b/configs/Merrii_A80_Optimus_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-op
- CONFIG_SPL=y
- CONFIG_MACH_SUN9I=y
- CONFIG_DRAM_CLK=672
--CONFIG_MMC0_CD_PIN="PH18"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
- CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
---- a/configs/Orangepi_mini_defconfig
-+++ b/configs/Orangepi_mini_defconfig
-@@ -5,8 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=432
- CONFIG_MACPWR="PH23"
--CONFIG_MMC0_CD_PIN="PH10"
--CONFIG_MMC3_CD_PIN="PH11"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=3
- CONFIG_USB1_VBUS_PIN="PH26"
- CONFIG_USB2_VBUS_PIN="PH22"
---- a/configs/Sinlinx_SinA31s_defconfig
-+++ b/configs/Sinlinx_SinA31s_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN6I=y
- CONFIG_DRAM_CLK=432
- CONFIG_DRAM_ZQ=251
--CONFIG_MMC0_CD_PIN="PA4"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=3
- CONFIG_USB1_VBUS_PIN=""
- CONFIG_USB2_VBUS_PIN=""
---- a/configs/Sinlinx_SinA33_defconfig
-+++ b/configs/Sinlinx_SinA33_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN8I_A33=y
- CONFIG_DRAM_CLK=552
- CONFIG_DRAM_ZQ=15291
--CONFIG_MMC0_CD_PIN="PB4"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_ID_DET="PH8"
- CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo:127,hs:70,vs:20,sync:3,vmode:0"
---- a/configs/Sunchip_CX-A99_defconfig
-+++ b/configs/Sunchip_CX-A99_defconfig
-@@ -6,7 +6,6 @@ CONFIG_MACH_SUN9I=y
- CONFIG_DRAM_CLK=600
- CONFIG_DRAM_ZQ=3881915
- CONFIG_DRAM_ODT_EN=y
--CONFIG_MMC0_CD_PIN="PH17"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="PH15"
- CONFIG_USB1_VBUS_PIN="PL7"
---- a/configs/UTOO_P66_defconfig
-+++ b/configs/UTOO_P66_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN5I=y
- CONFIG_DRAM_CLK=432
- CONFIG_DRAM_EMR1=0
--CONFIG_MMC0_CD_PIN="PG0"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="PB04"
- CONFIG_USB0_VBUS_DET="PG01"
---- a/configs/Yones_Toptech_BD1078_defconfig
-+++ b/configs/Yones_Toptech_BD1078_defconfig
-@@ -4,8 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yo
- CONFIG_SPL=y
- CONFIG_MACH_SUN7I=y
- CONFIG_DRAM_CLK=408
--CONFIG_MMC0_CD_PIN="PH1"
--CONFIG_MMC1_CD_PIN="PH2"
- CONFIG_MMC1_PINS_PH=y
- CONFIG_MMC_SUNXI_SLOT_EXTRA=1
- CONFIG_USB0_VBUS_PIN="PB9"
---- a/configs/bananapi_m2_zero_defconfig
-+++ b/configs/bananapi_m2_zero_defconfig
-@@ -4,5 +4,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plu
- CONFIG_SPL=y
- CONFIG_MACH_SUN8I_H3=y
- CONFIG_DRAM_CLK=408
--CONFIG_MMC0_CD_PIN=""
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/bananapi_m64_defconfig
-+++ b/configs/bananapi_m64_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-b
- CONFIG_SPL=y
- CONFIG_MACH_SUN50I=y
- CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
--CONFIG_MMC0_CD_PIN="PH13"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_SUPPORT_EMMC_BOOT=y
---- a/configs/beelink_gs1_defconfig
-+++ b/configs/beelink_gs1_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-be
- CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H6=y
- CONFIG_SUNXI_DRAM_H6_LPDDR3=y
--CONFIG_MMC0_CD_PIN="PF6"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- # CONFIG_PSCI_RESET is not set
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/nanopi_m1_plus_defconfig
-+++ b/configs/nanopi_m1_plus_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN8I_H3=y
- CONFIG_DRAM_CLK=408
- CONFIG_MACPWR="PD6"
--CONFIG_MMC0_CD_PIN="PH13"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_SUN8I_EMAC=y
---- a/configs/oceanic_5205_5inmfd_defconfig
-+++ b/configs/oceanic_5205_5inmfd_defconfig
-@@ -7,7 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
- CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
- CONFIG_DRAM_CLK=552
- CONFIG_DRAM_ZQ=3881949
--CONFIG_MMC0_CD_PIN=""
- CONFIG_SPL_SPI_SUNXI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_SUN8I_EMAC=y
---- a/configs/orangepi_3_defconfig
-+++ b/configs/orangepi_3_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-or
- CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H6=y
- CONFIG_SUNXI_DRAM_H6_LPDDR3=y
--CONFIG_MMC0_CD_PIN="PF6"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5"
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/orangepi_lite2_defconfig
-+++ b/configs/orangepi_lite2_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-or
- CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H6=y
- CONFIG_SUNXI_DRAM_H6_LPDDR3=y
--CONFIG_MMC0_CD_PIN="PF6"
- # CONFIG_PSCI_RESET is not set
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_USB_EHCI_HCD=y
---- a/configs/orangepi_one_plus_defconfig
-+++ b/configs/orangepi_one_plus_defconfig
-@@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-or
- CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H6=y
- CONFIG_SUNXI_DRAM_H6_LPDDR3=y
--CONFIG_MMC0_CD_PIN="PF6"
- # CONFIG_PSCI_RESET is not set
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_USB_EHCI_HCD=y
---- a/configs/orangepi_zero2_defconfig
-+++ b/configs/orangepi_zero2_defconfig
-@@ -7,7 +7,6 @@ CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION
- CONFIG_DRAM_SUN50I_H616_READ_TRAINING=y
- CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y
- CONFIG_MACH_SUN50I_H616=y
--CONFIG_MMC0_CD_PIN="PF6"
- CONFIG_R_I2C_ENABLE=y
- CONFIG_SPL_SPI_SUNXI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/orangepi_zero_plus2_defconfig
-+++ b/configs/orangepi_zero_plus2_defconfig
-@@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I_H5=y
- CONFIG_DRAM_CLK=672
- CONFIG_DRAM_ZQ=3881977
- # CONFIG_DRAM_ODT_EN is not set
--CONFIG_MMC0_CD_PIN="PH13"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_SUN8I_EMAC=y
---- a/configs/orangepi_zero_plus2_h3_defconfig
-+++ b/configs/orangepi_zero_plus2_h3_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN8I_H3=y
- CONFIG_DRAM_CLK=672
- # CONFIG_DRAM_ODT_EN is not set
--CONFIG_MMC0_CD_PIN="PH13"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
- CONFIG_SUN8I_EMAC=y
---- a/configs/parrot_r16_defconfig
-+++ b/configs/parrot_r16_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN8I_A33=y
- CONFIG_DRAM_CLK=600
- CONFIG_DRAM_ZQ=15291
--CONFIG_MMC0_CD_PIN="PD14"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_ID_DET="PD10"
- CONFIG_USB1_VBUS_PIN="PD12"
---- a/configs/pine64-lts_defconfig
-+++ b/configs/pine64-lts_defconfig
-@@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I=y
- CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
- CONFIG_DRAM_CLK=552
- CONFIG_DRAM_ZQ=3881949
--CONFIG_MMC0_CD_PIN=""
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_SPL_SPI_SUNXI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/pine_h64_defconfig
-+++ b/configs/pine_h64_defconfig
-@@ -5,7 +5,6 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H6=y
- CONFIG_SUNXI_DRAM_H6_LPDDR3=y
- CONFIG_MACPWR="PC16"
--CONFIG_MMC0_CD_PIN="PF6"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB3_VBUS_PIN="PL5"
- CONFIG_SPL_SPI_SUNXI=y
---- a/configs/sopine_baseboard_defconfig
-+++ b/configs/sopine_baseboard_defconfig
-@@ -7,7 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
- CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
- CONFIG_DRAM_CLK=552
- CONFIG_DRAM_ZQ=3881949
--CONFIG_MMC0_CD_PIN=""
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_SPL_SPI_SUNXI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/configs/tanix_tx6_defconfig
-+++ b/configs/tanix_tx6_defconfig
-@@ -5,6 +5,5 @@ CONFIG_SPL=y
- CONFIG_MACH_SUN50I_H6=y
- CONFIG_SUNXI_DRAM_H6_DDR3_1333=y
- CONFIG_DRAM_CLK=648
--CONFIG_MMC0_CD_PIN="PF6"
- CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set

package/boot/uboot-d1/patches/0019-sunxi-Hide-the-SUNXI_MINIMUM_DRAM_MB-symbol.patch

@@ -1,7 +1,7 @@
-From 8377aa2162d0a7fda76597eae59725a298dda5e6 Mon Sep 17 00:00:00 2001
+From f79f14a2b777f20150d4ffa9bb0ec1cf77f786f0 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Mon, 31 Oct 2022 22:14:36 -0500
-Subject: [PATCH 64/90] sunxi: Hide the SUNXI_MINIMUM_DRAM_MB symbol
+Subject: [PATCH 19/68] sunxi: Hide the SUNXI_MINIMUM_DRAM_MB symbol
 
 This option affects the ABI between SPL/U-Boot and U-Boot/scripts, so it
 should not normally be changed by the user.
@@ -13,8 +13,8 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -67,7 +67,7 @@ config SPL_STACK_R_ADDR
- 	default 0x4fe00000 if SUN50I_GEN_H6
+@@ -69,7 +69,7 @@ config SPL_STACK_R_ADDR
+ 	default 0x4fe00000 if SUNXI_GEN_NCAT2
  
  config SUNXI_MINIMUM_DRAM_MB
 -	int "minimum DRAM size"

package/boot/uboot-d1/patches/0019-sunxi-mmc-Move-header-to-the-driver-directory.patch

@@ -1,323 +0,0 @@
-From 4c0c00e7131baf410702555342337c178dd0de98 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 30 Oct 2022 16:04:47 -0500
-Subject: [PATCH 19/90] sunxi: mmc: Move header to the driver directory
-
-The MMC controller driver is (and ought to be) the only user of these
-register definitions. Put them in a header next to the driver to remove
-the dependency on a specific ARM platform's headers.
-
-Due to the sunxi_mmc_init() prototype, the file was not renamed. None of
-the register definitions were changed.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/include/asm/arch-sunxi/mmc.h | 139 +-------------------------
- drivers/mmc/sunxi_mmc.c               |   4 +
- drivers/mmc/sunxi_mmc.h               | 138 +++++++++++++++++++++++++
- 3 files changed, 146 insertions(+), 135 deletions(-)
- create mode 100644 drivers/mmc/sunxi_mmc.h
-
---- a/arch/arm/include/asm/arch-sunxi/mmc.h
-+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
-@@ -1,139 +1,8 @@
- /* SPDX-License-Identifier: GPL-2.0+ */
--/*
-- * (C) Copyright 2007-2011
-- * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
-- * Aaron <leafy.myeh@allwinnertech.com>
-- *
-- * MMC register definition for allwinner sunxi platform.
-- */
- 
--#ifndef _SUNXI_MMC_H
--#define _SUNXI_MMC_H
--
--#include <linux/types.h>
--
--struct sunxi_mmc {
--	u32 gctrl;		/* 0x00 global control */
--	u32 clkcr;		/* 0x04 clock control */
--	u32 timeout;		/* 0x08 time out */
--	u32 width;		/* 0x0c bus width */
--	u32 blksz;		/* 0x10 block size */
--	u32 bytecnt;		/* 0x14 byte count */
--	u32 cmd;		/* 0x18 command */
--	u32 arg;		/* 0x1c argument */
--	u32 resp0;		/* 0x20 response 0 */
--	u32 resp1;		/* 0x24 response 1 */
--	u32 resp2;		/* 0x28 response 2 */
--	u32 resp3;		/* 0x2c response 3 */
--	u32 imask;		/* 0x30 interrupt mask */
--	u32 mint;		/* 0x34 masked interrupt status */
--	u32 rint;		/* 0x38 raw interrupt status */
--	u32 status;		/* 0x3c status */
--	u32 ftrglevel;		/* 0x40 FIFO threshold watermark*/
--	u32 funcsel;		/* 0x44 function select */
--	u32 cbcr;		/* 0x48 CIU byte count */
--	u32 bbcr;		/* 0x4c BIU byte count */
--	u32 dbgc;		/* 0x50 debug enable */
--	u32 res0;		/* 0x54 reserved */
--	u32 a12a;		/* 0x58 Auto command 12 argument */
--	u32 ntsr;		/* 0x5c	New timing set register */
--	u32 res1[8];
--	u32 dmac;		/* 0x80 internal DMA control */
--	u32 dlba;		/* 0x84 internal DMA descr list base address */
--	u32 idst;		/* 0x88 internal DMA status */
--	u32 idie;		/* 0x8c internal DMA interrupt enable */
--	u32 chda;		/* 0x90 */
--	u32 cbda;		/* 0x94 */
--	u32 res2[26];
--#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
--	u32 res3[17];
--	u32 samp_dl;
--	u32 res4[46];
--#endif
--	u32 fifo;		/* 0x100 / 0x200 FIFO access address */
--};
--
--#define SUNXI_MMC_CLK_POWERSAVE		(0x1 << 17)
--#define SUNXI_MMC_CLK_ENABLE		(0x1 << 16)
--#define SUNXI_MMC_CLK_DIVIDER_MASK	(0xff)
--
--#define SUNXI_MMC_GCTRL_SOFT_RESET	(0x1 << 0)
--#define SUNXI_MMC_GCTRL_FIFO_RESET	(0x1 << 1)
--#define SUNXI_MMC_GCTRL_DMA_RESET	(0x1 << 2)
--#define SUNXI_MMC_GCTRL_RESET		(SUNXI_MMC_GCTRL_SOFT_RESET|\
--					 SUNXI_MMC_GCTRL_FIFO_RESET|\
--					 SUNXI_MMC_GCTRL_DMA_RESET)
--#define SUNXI_MMC_GCTRL_DMA_ENABLE	(0x1 << 5)
--#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB   (0x1 << 31)
--
--#define SUNXI_MMC_CMD_RESP_EXPIRE	(0x1 << 6)
--#define SUNXI_MMC_CMD_LONG_RESPONSE	(0x1 << 7)
--#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC	(0x1 << 8)
--#define SUNXI_MMC_CMD_DATA_EXPIRE	(0x1 << 9)
--#define SUNXI_MMC_CMD_WRITE		(0x1 << 10)
--#define SUNXI_MMC_CMD_AUTO_STOP		(0x1 << 12)
--#define SUNXI_MMC_CMD_WAIT_PRE_OVER	(0x1 << 13)
--#define SUNXI_MMC_CMD_SEND_INIT_SEQ	(0x1 << 15)
--#define SUNXI_MMC_CMD_UPCLK_ONLY	(0x1 << 21)
--#define SUNXI_MMC_CMD_START		(0x1 << 31)
--
--#define SUNXI_MMC_RINT_RESP_ERROR		(0x1 << 1)
--#define SUNXI_MMC_RINT_COMMAND_DONE		(0x1 << 2)
--#define SUNXI_MMC_RINT_DATA_OVER		(0x1 << 3)
--#define SUNXI_MMC_RINT_TX_DATA_REQUEST		(0x1 << 4)
--#define SUNXI_MMC_RINT_RX_DATA_REQUEST		(0x1 << 5)
--#define SUNXI_MMC_RINT_RESP_CRC_ERROR		(0x1 << 6)
--#define SUNXI_MMC_RINT_DATA_CRC_ERROR		(0x1 << 7)
--#define SUNXI_MMC_RINT_RESP_TIMEOUT		(0x1 << 8)
--#define SUNXI_MMC_RINT_DATA_TIMEOUT		(0x1 << 9)
--#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	(0x1 << 10)
--#define SUNXI_MMC_RINT_FIFO_RUN_ERROR		(0x1 << 11)
--#define SUNXI_MMC_RINT_HARD_WARE_LOCKED		(0x1 << 12)
--#define SUNXI_MMC_RINT_START_BIT_ERROR		(0x1 << 13)
--#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE	(0x1 << 14)
--#define SUNXI_MMC_RINT_END_BIT_ERROR		(0x1 << 15)
--#define SUNXI_MMC_RINT_SDIO_INTERRUPT		(0x1 << 16)
--#define SUNXI_MMC_RINT_CARD_INSERT		(0x1 << 30)
--#define SUNXI_MMC_RINT_CARD_REMOVE		(0x1 << 31)
--#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT      \
--	(SUNXI_MMC_RINT_RESP_ERROR |		\
--	 SUNXI_MMC_RINT_RESP_CRC_ERROR |	\
--	 SUNXI_MMC_RINT_DATA_CRC_ERROR |	\
--	 SUNXI_MMC_RINT_RESP_TIMEOUT |		\
--	 SUNXI_MMC_RINT_DATA_TIMEOUT |		\
--	 SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE |	\
--	 SUNXI_MMC_RINT_FIFO_RUN_ERROR |	\
--	 SUNXI_MMC_RINT_HARD_WARE_LOCKED |	\
--	 SUNXI_MMC_RINT_START_BIT_ERROR |	\
--	 SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */
--#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	\
--	(SUNXI_MMC_RINT_AUTO_COMMAND_DONE |	\
--	 SUNXI_MMC_RINT_DATA_OVER |		\
--	 SUNXI_MMC_RINT_COMMAND_DONE |		\
--	 SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE)
--
--#define SUNXI_MMC_STATUS_RXWL_FLAG		(0x1 << 0)
--#define SUNXI_MMC_STATUS_TXWL_FLAG		(0x1 << 1)
--#define SUNXI_MMC_STATUS_FIFO_EMPTY		(0x1 << 2)
--#define SUNXI_MMC_STATUS_FIFO_FULL		(0x1 << 3)
--#define SUNXI_MMC_STATUS_CARD_PRESENT		(0x1 << 8)
--#define SUNXI_MMC_STATUS_CARD_DATA_BUSY		(0x1 << 9)
--#define SUNXI_MMC_STATUS_DATA_FSM_BUSY		(0x1 << 10)
--#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg)	(((reg) >> 17) & 0x3fff)
--
--#define SUNXI_MMC_NTSR_MODE_SEL_NEW		(0x1 << 31)
--
--#define SUNXI_MMC_IDMAC_RESET		(0x1 << 0)
--#define SUNXI_MMC_IDMAC_FIXBURST	(0x1 << 1)
--#define SUNXI_MMC_IDMAC_ENABLE		(0x1 << 7)
--
--#define SUNXI_MMC_IDIE_TXIRQ		(0x1 << 0)
--#define SUNXI_MMC_IDIE_RXIRQ		(0x1 << 1)
--
--#define SUNXI_MMC_COMMON_CLK_GATE		(1 << 16)
--#define SUNXI_MMC_COMMON_RESET			(1 << 18)
--
--#define SUNXI_MMC_CAL_DL_SW_EN		(0x1 << 7)
-+#ifndef _ASM_ARCH_MMC_H_
-+#define _ASM_ARCH_MMC_H_
- 
- struct mmc *sunxi_mmc_init(int sdc_no);
--#endif /* _SUNXI_MMC_H */
-+
-+#endif /* _ASM_ARCH_MMC_H_ */
---- a/drivers/mmc/sunxi_mmc.c
-+++ b/drivers/mmc/sunxi_mmc.c
-@@ -25,9 +25,13 @@
- #include <asm/io.h>
- #include <asm/arch/clock.h>
- #include <asm/arch/cpu.h>
-+#if !CONFIG_IS_ENABLED(DM_MMC)
- #include <asm/arch/mmc.h>
-+#endif
- #include <linux/delay.h>
- 
-+#include "sunxi_mmc.h"
-+
- #ifndef CCM_MMC_CTRL_MODE_SEL_NEW
- #define CCM_MMC_CTRL_MODE_SEL_NEW	0
- #endif
---- /dev/null
-+++ b/drivers/mmc/sunxi_mmc.h
-@@ -0,0 +1,138 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * (C) Copyright 2007-2011
-+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
-+ * Aaron <leafy.myeh@allwinnertech.com>
-+ *
-+ * MMC register definition for allwinner sunxi platform.
-+ */
-+
-+#ifndef _SUNXI_MMC_H
-+#define _SUNXI_MMC_H
-+
-+#include <linux/types.h>
-+
-+struct sunxi_mmc {
-+	u32 gctrl;		/* 0x00 global control */
-+	u32 clkcr;		/* 0x04 clock control */
-+	u32 timeout;		/* 0x08 time out */
-+	u32 width;		/* 0x0c bus width */
-+	u32 blksz;		/* 0x10 block size */
-+	u32 bytecnt;		/* 0x14 byte count */
-+	u32 cmd;		/* 0x18 command */
-+	u32 arg;		/* 0x1c argument */
-+	u32 resp0;		/* 0x20 response 0 */
-+	u32 resp1;		/* 0x24 response 1 */
-+	u32 resp2;		/* 0x28 response 2 */
-+	u32 resp3;		/* 0x2c response 3 */
-+	u32 imask;		/* 0x30 interrupt mask */
-+	u32 mint;		/* 0x34 masked interrupt status */
-+	u32 rint;		/* 0x38 raw interrupt status */
-+	u32 status;		/* 0x3c status */
-+	u32 ftrglevel;		/* 0x40 FIFO threshold watermark*/
-+	u32 funcsel;		/* 0x44 function select */
-+	u32 cbcr;		/* 0x48 CIU byte count */
-+	u32 bbcr;		/* 0x4c BIU byte count */
-+	u32 dbgc;		/* 0x50 debug enable */
-+	u32 res0;		/* 0x54 reserved */
-+	u32 a12a;		/* 0x58 Auto command 12 argument */
-+	u32 ntsr;		/* 0x5c	New timing set register */
-+	u32 res1[8];
-+	u32 dmac;		/* 0x80 internal DMA control */
-+	u32 dlba;		/* 0x84 internal DMA descr list base address */
-+	u32 idst;		/* 0x88 internal DMA status */
-+	u32 idie;		/* 0x8c internal DMA interrupt enable */
-+	u32 chda;		/* 0x90 */
-+	u32 cbda;		/* 0x94 */
-+	u32 res2[26];
-+#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
-+	u32 res3[17];
-+	u32 samp_dl;
-+	u32 res4[46];
-+#endif
-+	u32 fifo;		/* 0x100 / 0x200 FIFO access address */
-+};
-+
-+#define SUNXI_MMC_CLK_POWERSAVE		(0x1 << 17)
-+#define SUNXI_MMC_CLK_ENABLE		(0x1 << 16)
-+#define SUNXI_MMC_CLK_DIVIDER_MASK	(0xff)
-+
-+#define SUNXI_MMC_GCTRL_SOFT_RESET	(0x1 << 0)
-+#define SUNXI_MMC_GCTRL_FIFO_RESET	(0x1 << 1)
-+#define SUNXI_MMC_GCTRL_DMA_RESET	(0x1 << 2)
-+#define SUNXI_MMC_GCTRL_RESET		(SUNXI_MMC_GCTRL_SOFT_RESET|\
-+					 SUNXI_MMC_GCTRL_FIFO_RESET|\
-+					 SUNXI_MMC_GCTRL_DMA_RESET)
-+#define SUNXI_MMC_GCTRL_DMA_ENABLE	(0x1 << 5)
-+#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB   (0x1 << 31)
-+
-+#define SUNXI_MMC_CMD_RESP_EXPIRE	(0x1 << 6)
-+#define SUNXI_MMC_CMD_LONG_RESPONSE	(0x1 << 7)
-+#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC	(0x1 << 8)
-+#define SUNXI_MMC_CMD_DATA_EXPIRE	(0x1 << 9)
-+#define SUNXI_MMC_CMD_WRITE		(0x1 << 10)
-+#define SUNXI_MMC_CMD_AUTO_STOP		(0x1 << 12)
-+#define SUNXI_MMC_CMD_WAIT_PRE_OVER	(0x1 << 13)
-+#define SUNXI_MMC_CMD_SEND_INIT_SEQ	(0x1 << 15)
-+#define SUNXI_MMC_CMD_UPCLK_ONLY	(0x1 << 21)
-+#define SUNXI_MMC_CMD_START		(0x1 << 31)
-+
-+#define SUNXI_MMC_RINT_RESP_ERROR		(0x1 << 1)
-+#define SUNXI_MMC_RINT_COMMAND_DONE		(0x1 << 2)
-+#define SUNXI_MMC_RINT_DATA_OVER		(0x1 << 3)
-+#define SUNXI_MMC_RINT_TX_DATA_REQUEST		(0x1 << 4)
-+#define SUNXI_MMC_RINT_RX_DATA_REQUEST		(0x1 << 5)
-+#define SUNXI_MMC_RINT_RESP_CRC_ERROR		(0x1 << 6)
-+#define SUNXI_MMC_RINT_DATA_CRC_ERROR		(0x1 << 7)
-+#define SUNXI_MMC_RINT_RESP_TIMEOUT		(0x1 << 8)
-+#define SUNXI_MMC_RINT_DATA_TIMEOUT		(0x1 << 9)
-+#define SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE	(0x1 << 10)
-+#define SUNXI_MMC_RINT_FIFO_RUN_ERROR		(0x1 << 11)
-+#define SUNXI_MMC_RINT_HARD_WARE_LOCKED		(0x1 << 12)
-+#define SUNXI_MMC_RINT_START_BIT_ERROR		(0x1 << 13)
-+#define SUNXI_MMC_RINT_AUTO_COMMAND_DONE	(0x1 << 14)
-+#define SUNXI_MMC_RINT_END_BIT_ERROR		(0x1 << 15)
-+#define SUNXI_MMC_RINT_SDIO_INTERRUPT		(0x1 << 16)
-+#define SUNXI_MMC_RINT_CARD_INSERT		(0x1 << 30)
-+#define SUNXI_MMC_RINT_CARD_REMOVE		(0x1 << 31)
-+#define SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT      \
-+	(SUNXI_MMC_RINT_RESP_ERROR |		\
-+	 SUNXI_MMC_RINT_RESP_CRC_ERROR |	\
-+	 SUNXI_MMC_RINT_DATA_CRC_ERROR |	\
-+	 SUNXI_MMC_RINT_RESP_TIMEOUT |		\
-+	 SUNXI_MMC_RINT_DATA_TIMEOUT |		\
-+	 SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE |	\
-+	 SUNXI_MMC_RINT_FIFO_RUN_ERROR |	\
-+	 SUNXI_MMC_RINT_HARD_WARE_LOCKED |	\
-+	 SUNXI_MMC_RINT_START_BIT_ERROR |	\
-+	 SUNXI_MMC_RINT_END_BIT_ERROR) /* 0xbfc2 */
-+#define SUNXI_MMC_RINT_INTERRUPT_DONE_BIT	\
-+	(SUNXI_MMC_RINT_AUTO_COMMAND_DONE |	\
-+	 SUNXI_MMC_RINT_DATA_OVER |		\
-+	 SUNXI_MMC_RINT_COMMAND_DONE |		\
-+	 SUNXI_MMC_RINT_VOLTAGE_CHANGE_DONE)
-+
-+#define SUNXI_MMC_STATUS_RXWL_FLAG		(0x1 << 0)
-+#define SUNXI_MMC_STATUS_TXWL_FLAG		(0x1 << 1)
-+#define SUNXI_MMC_STATUS_FIFO_EMPTY		(0x1 << 2)
-+#define SUNXI_MMC_STATUS_FIFO_FULL		(0x1 << 3)
-+#define SUNXI_MMC_STATUS_CARD_PRESENT		(0x1 << 8)
-+#define SUNXI_MMC_STATUS_CARD_DATA_BUSY		(0x1 << 9)
-+#define SUNXI_MMC_STATUS_DATA_FSM_BUSY		(0x1 << 10)
-+#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg)	(((reg) >> 17) & 0x3fff)
-+
-+#define SUNXI_MMC_NTSR_MODE_SEL_NEW		(0x1 << 31)
-+
-+#define SUNXI_MMC_IDMAC_RESET		(0x1 << 0)
-+#define SUNXI_MMC_IDMAC_FIXBURST	(0x1 << 1)
-+#define SUNXI_MMC_IDMAC_ENABLE		(0x1 << 7)
-+
-+#define SUNXI_MMC_IDIE_TXIRQ		(0x1 << 0)
-+#define SUNXI_MMC_IDIE_RXIRQ		(0x1 << 1)
-+
-+#define SUNXI_MMC_COMMON_CLK_GATE		(1 << 16)
-+#define SUNXI_MMC_COMMON_RESET			(1 << 18)
-+
-+#define SUNXI_MMC_CAL_DL_SW_EN		(0x1 << 7)
-+
-+#endif /* _SUNXI_MMC_H */

package/boot/uboot-d1/patches/0020-pinctrl-sunxi-Add-support-for-the-D1.patch

@@ -1,72 +0,0 @@
-From fdf871a6089ee2f56439880b69d33a7d0d707d15 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 28 Aug 2021 22:24:28 -0500
-Subject: [PATCH 20/90] pinctrl: sunxi: Add support for the D1
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/pinctrl/sunxi/Kconfig         |  5 +++++
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 31 +++++++++++++++++++++++++++
- 2 files changed, 36 insertions(+)
-
---- a/drivers/pinctrl/sunxi/Kconfig
-+++ b/drivers/pinctrl/sunxi/Kconfig
-@@ -89,6 +89,11 @@ config PINCTRL_SUN9I_A80_R
- 	default MACH_SUN9I
- 	select PINCTRL_SUNXI
- 
-+config PINCTRL_SUN20I_D1
-+	bool "Support for the Allwinner D1 PIO"
-+	default TARGET_SUN20I_D1
-+	select PINCTRL_SUNXI
-+
- config PINCTRL_SUN50I_A64
- 	bool "Support for the Allwinner A64 PIO"
- 	default MACH_SUN50I
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -588,6 +588,31 @@ static const struct sunxi_pinctrl_desc _
- 	.num_banks	= 3,
- };
- 
-+static const struct sunxi_pinctrl_function sun20i_d1_pinctrl_functions[] = {
-+	{ "emac",	8 },	/* PE0-PE15 */
-+	{ "gpio_in",	0 },
-+	{ "gpio_out",	1 },
-+	{ "i2c0",	4 },	/* PB10-PB11 */
-+	{ "mmc0",	2 },	/* PF0-PF5 */
-+	{ "mmc1",	2 },	/* PG0-PG5 */
-+	{ "mmc2",	3 },	/* PC2-PC7 */
-+	{ "spi0",	2 },	/* PC2-PC7 */
-+#if IS_ENABLED(CONFIG_UART0_PORT_F)
-+	{ "uart0",	3 },	/* PF2-PF4 */
-+#else
-+	{ "uart0",	6 },	/* PB8-PB9 */
-+#endif
-+	{ "uart1",	2 },	/* PG6-PG7 */
-+	{ "uart2",	7 },	/* PB0-PB1 */
-+};
-+
-+static const struct sunxi_pinctrl_desc __maybe_unused sun20i_d1_pinctrl_desc = {
-+	.functions	= sun20i_d1_pinctrl_functions,
-+	.num_functions	= ARRAY_SIZE(sun20i_d1_pinctrl_functions),
-+	.first_bank	= SUNXI_GPIO_A,
-+	.num_banks	= 7,
-+};
-+
- static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
- 	{ "emac",	4 },	/* PD8-PD23 */
- 	{ "gpio_in",	0 },
-@@ -849,6 +874,12 @@ static const struct udevice_id sunxi_pin
- 		.data = (ulong)&sun9i_a80_r_pinctrl_desc,
- 	},
- #endif
-+#ifdef CONFIG_PINCTRL_SUN20I_D1
-+	{
-+		.compatible = "allwinner,sun20i-d1-pinctrl",
-+		.data = (ulong)&sun20i_d1_pinctrl_desc,
-+	},
-+#endif
- #ifdef CONFIG_PINCTRL_SUN50I_A64
- 	{
- 		.compatible = "allwinner,sun50i-a64-pinctrl",

package/boot/uboot-d1/patches/0020-sunxi-Clean-up-the-SPL_STACK_R_ADDR-defaults.patch

@@ -1,7 +1,7 @@
-From 41e5a94533e9744b8eac718dd2c359eca57573f8 Mon Sep 17 00:00:00 2001
+From b9b70c8a9e9a9bf4971279ec93dac945d415d44a Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 23:25:26 -0500
-Subject: [PATCH 65/90] sunxi: Clean up the SPL_STACK_R_ADDR defaults
+Subject: [PATCH 20/68] sunxi: Clean up the SPL_STACK_R_ADDR defaults
 
 Update this option to be based on SUNXI_MINIMUM_DRAM_MB. This corrects
 the value used on V3s, which previously was the MACH_SUN8I default, and
@@ -9,12 +9,12 @@ so relied on addresses wrapping modulo the DRAM size.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
- board/sunxi/Kconfig | 9 ++-------
- 1 file changed, 2 insertions(+), 7 deletions(-)
+ board/sunxi/Kconfig | 10 ++--------
+ 1 file changed, 2 insertions(+), 8 deletions(-)
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -57,14 +57,9 @@ config IDENT_STRING
+@@ -58,15 +58,9 @@ config IDENT_STRING
  
  config SPL_STACK_R_ADDR
  	default 0x81e00000 if MACH_SUNIV
@@ -26,6 +26,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x2fe00000 if MACH_SUN9I
 -	default 0x4fe00000 if MACH_SUN50I
 -	default 0x4fe00000 if SUN50I_GEN_H6
+-	default 0x4fe00000 if SUNXI_GEN_NCAT2
 +	default 0x4fe00000 if SUNXI_MINIMUM_DRAM_MB >= 256
 +	default 0x43e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
  

package/boot/uboot-d1/patches/0021-sunxi-Move-PRE_CON_BUF_ADDR-to-the-board-Kconfig.patch

@@ -1,7 +1,7 @@
-From e947c7377b90897e4c638dad6e64201361dc8a9e Mon Sep 17 00:00:00 2001
+From 6ab5eb744647c9af3204756d2c2ce4180d7a4248 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 6 Aug 2022 00:45:10 -0500
-Subject: [PATCH 66/90] sunxi: Move PRE_CON_BUF_ADDR to the board Kconfig
+Subject: [PATCH 21/68] sunxi: Move PRE_CON_BUF_ADDR to the board Kconfig
 
 This provides a default value for RISC-V when that is added, and it
 makes sense to put this option next to the other DRAM layout options.
@@ -16,7 +16,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -55,6 +55,12 @@ if BOARD_SUNXI
+@@ -56,6 +56,12 @@ if BOARD_SUNXI
  config IDENT_STRING
  	default " Allwinner Technology"
  
@@ -31,7 +31,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x2fe00000 if MACH_SUN9I
 --- a/common/Kconfig
 +++ b/common/Kconfig
-@@ -195,8 +195,6 @@ config PRE_CON_BUF_SZ
+@@ -205,8 +205,6 @@ config PRE_CON_BUF_SZ
  config PRE_CON_BUF_ADDR
  	hex "Address of the pre-console buffer"
  	depends on PRE_CONSOLE_BUFFER

package/boot/uboot-d1/patches/0022-sunxi-Move-SPL_BSS_START_ADDR-to-the-board-Kconfig.patch

@@ -1,7 +1,7 @@
-From 71796f9d47a6b7e0dd6bb276436950463039c1b8 Mon Sep 17 00:00:00 2001
+From bbb8fa9934270f2a8d63ea4a62612f5f7969dc15 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Mon, 31 Oct 2022 00:08:26 -0500
-Subject: [PATCH 67/90] sunxi: Move SPL_BSS_START_ADDR to the board Kconfig
+Subject: [PATCH 22/68] sunxi: Move SPL_BSS_START_ADDR to the board Kconfig
 
 This provides a default value for RISC-V when that is added, and it
 makes sense to put this option next to the other DRAM layout options.
@@ -16,7 +16,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -61,6 +61,12 @@ config PRE_CON_BUF_ADDR
+@@ -62,6 +62,12 @@ config PRE_CON_BUF_ADDR
  	default 0x4f000000 if SUNXI_MINIMUM_DRAM_MB >= 256
  	default 0x43000000 if SUNXI_MINIMUM_DRAM_MB >= 64
  

package/boot/uboot-d1/patches/0023-Kconfig-Remove-an-impossible-condition.patch

@@ -1,25 +0,0 @@
-From 2d85df851c590b454749ac989a778bb226637bfc Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Tue, 6 Jun 2023 15:08:39 +0000
-Subject: [PATCH 23/90] Kconfig: Remove an impossible condition
-
-ARCH_SUNXI selects BINMAN, so the condition "!BINMAN && ARCH_SUNXI"
-is impossible to satisfy.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
----
- Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/Kconfig
-+++ b/Kconfig
-@@ -459,7 +459,7 @@ config BUILD_TARGET
- 	default "u-boot-with-spl.kwb" if ARCH_MVEBU && SPL
- 	default "u-boot-elf.srec" if RCAR_GEN3
- 	default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
--				ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
-+				RISCV || ARCH_ZYNQMP)
- 	default "u-boot.kwb" if ARCH_KIRKWOOD
- 	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
- 	default "u-boot-with-spl.imx" if ARCH_MX6 && SPL

package/boot/uboot-d1/patches/0023-sunxi-Move-SPL_TEXT_BASE-to-the-board-Kconfig.patch

@@ -1,7 +1,7 @@
-From 5d60490d0f0ca0a5d414ba9a4e41ceea8a98b4d2 Mon Sep 17 00:00:00 2001
+From b36106cc8b53c11c21f4fcc398479756cbdc3b07 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 6 Aug 2022 00:07:47 -0500
-Subject: [PATCH 68/90] sunxi: Move SPL_TEXT_BASE to the board Kconfig
+Subject: [PATCH 23/68] sunxi: Move SPL_TEXT_BASE to the board Kconfig
 
 It makes sense to put this near the definition of SUNXI_SRAM_ADDRESS.
 
@@ -13,13 +13,13 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -73,6 +73,11 @@ config SPL_STACK_R_ADDR
+@@ -74,6 +74,11 @@ config SPL_STACK_R_ADDR
  	default 0x4fe00000 if SUNXI_MINIMUM_DRAM_MB >= 256
  	default 0x43e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
  
 +config SPL_TEXT_BASE
 +	default 0x10060 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
-+	default 0x20060 if SUN50I_GEN_H6
++	default 0x20060 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
 +	default 0x00060
 +
  config SUNXI_MINIMUM_DRAM_MB
@@ -32,7 +32,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x402F0400 if AM33XX
  	default 0x40301350 if OMAP54XX
 -	default 0x10060 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN9I
--	default 0x20060 if SUN50I_GEN_H6
+-	default 0x20060 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
 -	default 0x00060 if ARCH_SUNXI
  	default 0xfffc0000 if ARCH_ZYNQMP
  	default 0x0

package/boot/uboot-d1/patches/0024-binman-Prevent-entries-in-a-section-from-overlapping.patch

@@ -1,33 +0,0 @@
-From b7150f7dd885012868c94b29ac4fe6152c065a95 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 9 Oct 2021 10:43:56 -0500
-Subject: [PATCH 24/90] binman: Prevent entries in a section from overlapping
-
-Currently, if the "offset" property is given for an entry, the section's
-running offset is completely ignored. This causes entries to overlap if
-the provided offset is less than the size of the entries earlier in the
-section. Avoid the overlap by only using the provided offset when it is
-greater than the running offset.
-
-The motivation for this change is the rule used by SPL to find U-Boot on
-sunxi boards: U-Boot starts 32 KiB after the start of SPL, unless SPL is
-larger than 32 KiB, in which case U-Boot immediately follows SPL.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- tools/binman/entry.py | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/tools/binman/entry.py
-+++ b/tools/binman/entry.py
-@@ -483,7 +483,9 @@ class Entry(object):
-             if self.offset_unset:
-                 self.Raise('No offset set with offset-unset: should another '
-                            'entry provide this correct offset?')
--            self.offset = tools.align(offset, self.align)
-+        elif self.offset > offset:
-+            offset = self.offset
-+        self.offset = tools.align(offset, self.align)
-         needed = self.pad_before + self.contents_size + self.pad_after
-         needed = tools.align(needed, self.align_size)
-         size = self.size

package/boot/uboot-d1/patches/0024-sunxi-Move-SYS_LOAD_ADDR-to-the-board-Kconfig.patch

@@ -1,7 +1,7 @@
-From 03f3ba82e9dfb67f1ae0812f72aea6559aa61bb4 Mon Sep 17 00:00:00 2001
+From ee9d6f9ec6d75a9f38323fa0f957825b6dd27b8b Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 23:23:34 -0500
-Subject: [PATCH 69/90] sunxi: Move SYS_LOAD_ADDR to the board Kconfig
+Subject: [PATCH 24/68] sunxi: Move SYS_LOAD_ADDR to the board Kconfig
 
 This will provide a default value for RISC-V when that is added, and it
 makes sense to put this option next to the other DRAM layout options.
@@ -14,7 +14,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/Kconfig
 +++ b/Kconfig
-@@ -508,9 +508,6 @@ config SYS_LOAD_ADDR
+@@ -536,9 +536,6 @@ config SYS_LOAD_ADDR
  	hex "Address in memory to use by default"
  	default 0x01000000 if ARCH_SOCFPGA
  	default 0x02000000 if PPC || X86
@@ -26,7 +26,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL  || MX6SX || MX6UL || MX6ULL)
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -129,6 +129,11 @@ config SYS_CONFIG_NAME
+@@ -132,6 +132,11 @@ config SYS_CONFIG_NAME
  	default "sun50i" if MACH_SUN50I_H6
  	default "sun50i" if MACH_SUN50I_H616
  

package/boot/uboot-d1/patches/0025-sunxi-Move-TEXT_BASE-to-the-board-Kconfig.patch

@@ -1,20 +1,33 @@
-From 08b45a89c7b25eb7828589360cf4ca2d9910cc59 Mon Sep 17 00:00:00 2001
+From 09c73b7633470574f338a005818dd4942dd0139e Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 21:48:53 -0500
-Subject: [PATCH 70/90] sunxi: Move TEXT_BASE to the board Kconfig
+Subject: [PATCH 25/68] sunxi: Move TEXT_BASE to the board Kconfig
 
 This is how the vast majority of platforms provided TEXT_BASE.
 sunxi was the exception here.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
+ Kconfig             | 4 ----
  board/sunxi/Kconfig | 6 ++++++
- boot/Kconfig        | 4 ----
  2 files changed, 6 insertions(+), 4 deletions(-)
 
+--- a/Kconfig
++++ b/Kconfig
+@@ -636,10 +636,6 @@ config TEXT_BASE
+ 	depends on HAVE_TEXT_BASE
+ 	default 0x0 if POSITION_INDEPENDENT
+ 	default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
+-	default 0x81700000 if MACH_SUNIV
+-	default 0x2a000000 if MACH_SUN9I
+-	default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256
+-	default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
+ 	hex "Text Base"
+ 	help
+ 	  The address in memory that U-Boot will be copied and executed from
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -137,6 +137,12 @@ config SYS_LOAD_ADDR
+@@ -140,6 +140,12 @@ config SYS_LOAD_ADDR
  config SYS_SOC
  	default "sunxi"
  
@@ -27,16 +40,3 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  menu "sunxi board options"
  
  choice
---- a/boot/Kconfig
-+++ b/boot/Kconfig
-@@ -633,10 +633,6 @@ config TEXT_BASE
- 	depends on HAVE_TEXT_BASE
- 	default 0x0 if POSITION_INDEPENDENT
- 	default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
--	default 0x81700000 if MACH_SUNIV
--	default 0x2a000000 if MACH_SUN9I
--	default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256
--	default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
- 	hex "Text Base"
- 	help
- 	  The address in memory that U-Boot will be running from, initially.

package/boot/uboot-d1/patches/0025-sunxi-binman-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch

@@ -1,192 +0,0 @@
-From b641ca5f4d272b83ef77ebcf5c75678cf139c69a Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 17 Apr 2021 13:33:54 -0500
-Subject: [PATCH 25/90] sunxi: binman: Enable SPL FIT loading for 32-bit SoCs
-
-Now that Crust (SCP firmware) has support for H3, we need a FIT image to
-load it. H3 also needs to load a SoC-specific eGon blob to support CPU 0
-hotplug. Let's first enable FIT support before adding extra firmware.
-
-Update the binman description to work on either 32-bit or 64-bit SoCs:
- - Make BL31 optional, since it is not used on 32-bit SoCs (though BL32
-   may be used in the future).
- - Explicitly set the minimum offset of the FIT to 32 KiB, since SPL on
-   some boards is still only 24 KiB large even with FIT support enabled.
-   CONFIG_SPL_PAD_TO cannot be used because it is not defined for H616.
-
-FIT unlocks more features (signatures, multiple DTBs, etc.), so enable
-it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs
-SPL_FIT_IMAGE_TINY. For simplicity, enable that option everywhere.
-
-Cover-letter:
-sunxi: SPL FIT support for 32-bit sunxi SoCs
-This series makes the necessary changes so 32-bit sunxi SoCs can load
-additional device trees or firmware from SPL along with U-Boot proper.
-
-There was no existing binman entry property that put the FIT at the
-right offset. The minimum offset is 32k, but this matches neither the
-SPL size (which is no more than 24k on some SoCs) nor the FIT alignment
-(which is 512 bytes in practice due to SPL size constraints). So instead
-of adding a new property, I fixed what is arguably a bug in the offset
-property -- though this strategy will not work if someone is
-intentionally creating overlapping entries.
-END
-Series-to: sunxi
-Series-to: sjg
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/Kconfig               |  1 +
- arch/arm/dts/sunxi-u-boot.dtsi | 46 ++++++++++++++++++++++------------
- common/spl/Kconfig             |  9 +++----
- 3 files changed, 35 insertions(+), 21 deletions(-)
-
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1135,6 +1135,7 @@ config ARCH_SUNXI
- 	imply SPL_GPIO
- 	imply SPL_LIBCOMMON_SUPPORT
- 	imply SPL_LIBGENERIC_SUPPORT
-+	imply SPL_LOAD_FIT
- 	imply SPL_MMC if MMC
- 	imply SPL_POWER
- 	imply SPL_SERIAL
---- a/arch/arm/dts/sunxi-u-boot.dtsi
-+++ b/arch/arm/dts/sunxi-u-boot.dtsi
-@@ -1,13 +1,19 @@
- #include <config.h>
- 
--#ifdef CONFIG_MACH_SUN50I_H6
--#define BL31_ADDR 0x104000
--#define  SCP_ADDR 0x114000
--#elif defined(CONFIG_MACH_SUN50I_H616)
--#define BL31_ADDR 0x40000000
-+#ifdef CONFIG_ARM64
-+#define ARCH "arm64"
- #else
--#define BL31_ADDR  0x44000
--#define  SCP_ADDR  0x50000
-+#define ARCH "arm"
-+#endif
-+
-+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5)
-+#define BL31_ADDR	0x00044000
-+#define SCP_ADDR	0x00050000
-+#elif defined(CONFIG_MACH_SUN50I_H6)
-+#define BL31_ADDR	0x00104000
-+#define SCP_ADDR	0x00114000
-+#elif defined(CONFIG_MACH_SUN50I_H616)
-+#define BL31_ADDR	0x40000000
- #endif
- 
- / {
-@@ -34,30 +40,33 @@
- 			filename = "spl/sunxi-spl.bin";
- 		};
- 
--#ifdef CONFIG_ARM64
-+#ifdef CONFIG_SPL_LOAD_FIT
- 		fit {
--			description = "Configuration to load ATF before U-Boot";
-+			description = "Configuration to load U-Boot and firmware";
-+			offset = <32768>;
- 			#address-cells = <1>;
- 			fit,fdt-list = "of-list";
- 
- 			images {
- 				uboot {
--					description = "U-Boot (64-bit)";
-+					description = "U-Boot";
- 					type = "standalone";
- 					os = "u-boot";
--					arch = "arm64";
-+					arch = ARCH;
- 					compression = "none";
- 					load = <CONFIG_TEXT_BASE>;
-+					entry = <CONFIG_TEXT_BASE>;
- 
- 					u-boot-nodtb {
- 					};
- 				};
- 
-+#ifdef BL31_ADDR
- 				atf {
- 					description = "ARM Trusted Firmware";
- 					type = "firmware";
- 					os = "arm-trusted-firmware";
--					arch = "arm64";
-+					arch = ARCH;
- 					compression = "none";
- 					load = <BL31_ADDR>;
- 					entry = <BL31_ADDR>;
-@@ -67,6 +76,7 @@
- 						missing-msg = "atf-bl31-sunxi";
- 					};
- 				};
-+#endif
- 
- #ifdef SCP_ADDR
- 				scp {
-@@ -95,19 +105,23 @@
- 
- 				@config-SEQ {
- 					description = "NAME";
-+#ifdef BL31_ADDR
- 					firmware = "atf";
--#ifndef SCP_ADDR
--					loadables = "uboot";
- #else
--					loadables = "scp", "uboot";
-+					firmware = "uboot";
-+#endif
-+					loadables =
-+#ifdef SCP_ADDR
-+						    "scp",
- #endif
-+						    "uboot";
- 					fdt = "fdt-SEQ";
- 				};
- 			};
- 		};
- #else
- 		u-boot-img {
--			offset = <CONFIG_SPL_PAD_TO>;
-+			offset = <32768>;
- 		};
- #endif
- 	};
---- a/common/spl/Kconfig
-+++ b/common/spl/Kconfig
-@@ -76,12 +76,12 @@ config SPL_SIZE_LIMIT_PROVIDE_STACK
- 
- config SPL_MAX_SIZE
- 	hex "Maximum size of the SPL image, excluding BSS"
-+	default 0x37fa0 if MACH_SUN50I_H616
- 	default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB
-+	default 0x25fa0 if MACH_SUN50I_H6
- 	default 0x1b000 if AM33XX && !TI_SECURE_DEVICE
- 	default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB
- 	default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000
--	default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616
--	default 0xbfa0 if MACH_SUN50I_H616
- 	default 0x7000 if RCAR_GEN3
- 	default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0
- 	default 0x10000 if ASPEED_AST2600
-@@ -97,7 +97,7 @@ config SPL_PAD_TO
- 	default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
- 	default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
- 	default 0x10000 if ARCH_KEYSTONE
--	default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
-+	default 0x0 if ARCH_SUNXI
- 	default 0x0 if ARCH_MTMIPS
- 	default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
- 	default SPL_MAX_SIZE
-@@ -575,8 +575,7 @@ config SPL_MD5
- config SPL_FIT_IMAGE_TINY
- 	bool "Remove functionality from SPL FIT loading to reduce size"
- 	depends on SPL_FIT
--	default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
--	default y if ARCH_IMX8M || ARCH_IMX9
-+	default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI
- 	help
- 	  Enable this to reduce the size of the FIT image loading code
- 	  in SPL, if space for the SPL binary is very tight.

package/boot/uboot-d1/patches/0026-sunxi-Move-most-board-options-to-the-board-Kconfig.patch

@@ -1,7 +1,7 @@
-From 6a1b660a83b262237b6bebed26e44db923a86a6b Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Tue, 6 Jun 2023 18:09:19 +0000
-Subject: [PATCH 71/90] sunxi: Move most board options to the board Kconfig
+From 7e7430bd742f4474152c37d96d398936bf6d5a49 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Fri, 5 Aug 2022 23:18:11 -0500
+Subject: [PATCH 26/68] sunxi: Move most board options to the board Kconfig
 
 This excludes options that are inherently ARM-specific or are specific
 to legacy non-DM drivers.
@@ -9,15 +9,14 @@ to legacy non-DM drivers.
 Some help text is cleaned up along the way.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 ---
- arch/arm/mach-sunxi/Kconfig | 71 ------------------------------------
+ arch/arm/mach-sunxi/Kconfig | 70 ------------------------------------
  board/sunxi/Kconfig         | 72 +++++++++++++++++++++++++++++++++++++
- 2 files changed, 72 insertions(+), 71 deletions(-)
+ 2 files changed, 72 insertions(+), 70 deletions(-)
 
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -548,16 +548,6 @@ config DRAM_ODT_CORRECTION
+@@ -647,36 +647,12 @@ config DRAM_ODT_CORRECTION
  	then the correction is negative. Usually the value for this is 0.
  endif
  
@@ -34,9 +33,8 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  config OLD_SUNXI_KERNEL_COMPAT
  	bool "Enable workarounds for booting old kernels"
  	---help---
-@@ -571,20 +561,6 @@ config MACPWR
- 	  Set the pin used to power the MAC. This takes a string in the format
- 	  understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+ 	Set this to enable various workarounds for old kernels, this results in
+ 	sub-optimal settings for newer kernels, only enable if needed.
  
 -config MMC1_PINS_PH
 -	bool "Pins for mmc1 are on Port H"
@@ -52,17 +50,16 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 -	slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 -	support for this.
 -
- config I2C0_ENABLE
- 	bool "Enable I2C/TWI controller 0"
- 	default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40
-@@ -612,16 +588,6 @@ config R_I2C_ENABLE
- 	Set this to y to enable the I2C controller which is part of the PRCM.
- endif
+ config USB0_VBUS_PIN
+ 	string "Vbus enable pin for usb0 (otg)"
+ 	default ""
+@@ -753,15 +729,6 @@ config AXP_GPIO
+ 	---help---
+ 	Say Y here to enable support for the gpio pins of the axp PMIC ICs.
  
 -config AXP_DISABLE_BOOT_ON_POWERON
 -	bool "Disable device boot on power plug-in"
 -	depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
--	default n
 -	---help---
 -	  Say Y here to prevent the device from booting up because of a plug-in
 -	  event. When set, the device will boot into the SPL briefly to
@@ -72,7 +69,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  config VIDEO_SUNXI
  	bool "Enable graphical uboot console on HDMI, LCD or VGA"
  	depends on !MACH_SUN8I_A83T
-@@ -850,41 +816,4 @@ config SPL_SPI_SUNXI
+@@ -983,41 +950,4 @@ config SPL_SPI_SUNXI
  	  sunxi SPI Flash. It uses the same method as the boot ROM, so does
  	  not need any extra configuration.
  
@@ -116,7 +113,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 -	select CMD_EXTENSION
 --- a/board/sunxi/Kconfig
 +++ b/board/sunxi/Kconfig
-@@ -171,6 +171,78 @@ config SPL_IMAGE_TYPE
+@@ -174,6 +174,78 @@ config SPL_IMAGE_TYPE
  	default "sunxi_egon" if SPL_IMAGE_TYPE_SUNXI_EGON
  	default "sunxi_toc0" if SPL_IMAGE_TYPE_SUNXI_TOC0
  

package/boot/uboot-d1/patches/0026-sunxi-psci-Avoid-hanging-when-CPU-0-is-hot-unplugged.patch

@@ -1,51 +0,0 @@
-From ca1e6f4491981432c3e88441131c8e25067da95e Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 9 Oct 2021 22:00:22 -0500
-Subject: [PATCH 26/90] sunxi: psci: Avoid hanging when CPU 0 is hot-unplugged
-
-Do not try to send an SGI from CPU 0 to itself. Since FIQs are masked
-when entering monitor mode, this will hang. Plus, CPU 0 cannot fully
-power itself off anyway. Instead, have it turn FIQs back on and continue
-servicing SGIs from other cores.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/cpu/armv7/sunxi/psci.c | 20 +++++++++++++++++---
- 1 file changed, 17 insertions(+), 3 deletions(-)
-
---- a/arch/arm/cpu/armv7/sunxi/psci.c
-+++ b/arch/arm/cpu/armv7/sunxi/psci.c
-@@ -38,6 +38,15 @@
- #define SUN8I_R40_PWR_CLAMP(cpu)		(0x120 + (cpu) * 0x4)
- #define SUN8I_R40_SRAMC_SOFT_ENTRY_REG0		(0xbc)
- 
-+static inline u32 __secure cp15_read_mpidr(void)
-+{
-+	u32 val;
-+
-+	asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (val));
-+
-+	return val;
-+}
-+
- static void __secure cp15_write_cntp_tval(u32 tval)
- {
- 	asm volatile ("mcr p15, 0, %0, c14, c2, 0" : : "r" (tval));
-@@ -281,9 +290,14 @@ s32 __secure psci_cpu_off(void)
- {
- 	psci_cpu_off_common();
- 
--	/* Ask CPU0 via SGI15 to pull the rug... */
--	writel(BIT(16) | 15, GICD_BASE + GICD_SGIR);
--	dsb();
-+	if (cp15_read_mpidr() & 3) {
-+		/* Ask CPU0 via SGI15 to pull the rug... */
-+		writel(BIT(16) | 15, GICD_BASE + GICD_SGIR);
-+		dsb();
-+	} else {
-+		/* Unmask FIQs to service SGI15. */
-+		asm volatile ("cpsie f");
-+	}
- 
- 	/* Wait to be turned off */
- 	while (1)

package/boot/uboot-d1/patches/0027-clk-sunxi-Add-NAND-clocks-and-resets.patch

@@ -1,295 +0,0 @@
-From 2f48dfc23d612f6f1798ff761854fd3141d0671f Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 15 May 2022 21:29:22 -0500
-Subject: [PATCH 27/90] clk: sunxi: Add NAND clocks and resets
-
-Currently NAND clock setup is done in board code, both in SPL and in
-U-Boot proper. Add the NAND clocks/resets here so they can be used by
-the "full" NAND driver once it is converted to the driver model.
-
-The bit locations are copied from the Linux CCU drivers.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/clk/sunxi/clk_a10.c  | 2 ++
- drivers/clk/sunxi/clk_a10s.c | 2 ++
- drivers/clk/sunxi/clk_a23.c  | 3 +++
- drivers/clk/sunxi/clk_a31.c  | 6 ++++++
- drivers/clk/sunxi/clk_a64.c  | 3 +++
- drivers/clk/sunxi/clk_a80.c  | 8 ++++++++
- drivers/clk/sunxi/clk_a83t.c | 3 +++
- drivers/clk/sunxi/clk_h3.c   | 3 +++
- drivers/clk/sunxi/clk_h6.c   | 6 ++++++
- drivers/clk/sunxi/clk_h616.c | 6 ++++++
- drivers/clk/sunxi/clk_r40.c  | 3 +++
- 11 files changed, 45 insertions(+)
-
---- a/drivers/clk/sunxi/clk_a10.c
-+++ b/drivers/clk/sunxi/clk_a10.c
-@@ -23,6 +23,7 @@ static struct ccu_clk_gate a10_gates[] =
- 	[CLK_AHB_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_AHB_MMC2]		= GATE(0x060, BIT(10)),
- 	[CLK_AHB_MMC3]		= GATE(0x060, BIT(11)),
-+	[CLK_AHB_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_AHB_EMAC]		= GATE(0x060, BIT(17)),
- 	[CLK_AHB_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_AHB_SPI1]		= GATE(0x060, BIT(21)),
-@@ -47,6 +48,7 @@ static struct ccu_clk_gate a10_gates[] =
- 	[CLK_APB1_UART6]	= GATE(0x06c, BIT(22)),
- 	[CLK_APB1_UART7]	= GATE(0x06c, BIT(23)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 	[CLK_SPI2]		= GATE(0x0a8, BIT(31)),
---- a/drivers/clk/sunxi/clk_a10s.c
-+++ b/drivers/clk/sunxi/clk_a10s.c
-@@ -20,6 +20,7 @@ static struct ccu_clk_gate a10s_gates[]
- 	[CLK_AHB_MMC0]		= GATE(0x060, BIT(8)),
- 	[CLK_AHB_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_AHB_MMC2]		= GATE(0x060, BIT(10)),
-+	[CLK_AHB_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_AHB_EMAC]		= GATE(0x060, BIT(17)),
- 	[CLK_AHB_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_AHB_SPI1]		= GATE(0x060, BIT(21)),
-@@ -35,6 +36,7 @@ static struct ccu_clk_gate a10s_gates[]
- 	[CLK_APB1_UART2]	= GATE(0x06c, BIT(18)),
- 	[CLK_APB1_UART3]	= GATE(0x06c, BIT(19)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 	[CLK_SPI2]		= GATE(0x0a8, BIT(31)),
---- a/drivers/clk/sunxi/clk_a23.c
-+++ b/drivers/clk/sunxi/clk_a23.c
-@@ -17,6 +17,7 @@ static struct ccu_clk_gate a23_gates[] =
- 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
- 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
-+	[CLK_BUS_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_BUS_SPI1]		= GATE(0x060, BIT(21)),
- 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
-@@ -34,6 +35,7 @@ static struct ccu_clk_gate a23_gates[] =
- 	[CLK_BUS_UART3]		= GATE(0x06c, BIT(19)),
- 	[CLK_BUS_UART4]		= GATE(0x06c, BIT(20)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 
-@@ -52,6 +54,7 @@ static struct ccu_reset a23_resets[] = {
- 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
- 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
- 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
-+	[RST_BUS_NAND]		= RESET(0x2c0, BIT(13)),
- 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
- 	[RST_BUS_SPI1]		= RESET(0x2c0, BIT(21)),
- 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
---- a/drivers/clk/sunxi/clk_a31.c
-+++ b/drivers/clk/sunxi/clk_a31.c
-@@ -18,6 +18,8 @@ static struct ccu_clk_gate a31_gates[] =
- 	[CLK_AHB1_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_AHB1_MMC2]		= GATE(0x060, BIT(10)),
- 	[CLK_AHB1_MMC3]		= GATE(0x060, BIT(11)),
-+	[CLK_AHB1_NAND1]	= GATE(0x060, BIT(12)),
-+	[CLK_AHB1_NAND0]	= GATE(0x060, BIT(13)),
- 	[CLK_AHB1_EMAC]		= GATE(0x060, BIT(17)),
- 	[CLK_AHB1_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_AHB1_SPI1]		= GATE(0x060, BIT(21)),
-@@ -43,6 +45,8 @@ static struct ccu_clk_gate a31_gates[] =
- 	[CLK_APB2_UART4]	= GATE(0x06c, BIT(20)),
- 	[CLK_APB2_UART5]	= GATE(0x06c, BIT(21)),
- 
-+	[CLK_NAND0]		= GATE(0x080, BIT(31)),
-+	[CLK_NAND1]		= GATE(0x084, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 	[CLK_SPI2]		= GATE(0x0a8, BIT(31)),
-@@ -65,6 +69,8 @@ static struct ccu_reset a31_resets[] = {
- 	[RST_AHB1_MMC1]		= RESET(0x2c0, BIT(9)),
- 	[RST_AHB1_MMC2]		= RESET(0x2c0, BIT(10)),
- 	[RST_AHB1_MMC3]		= RESET(0x2c0, BIT(11)),
-+	[RST_AHB1_NAND1]	= RESET(0x2c0, BIT(12)),
-+	[RST_AHB1_NAND0]	= RESET(0x2c0, BIT(13)),
- 	[RST_AHB1_EMAC]		= RESET(0x2c0, BIT(17)),
- 	[RST_AHB1_SPI0]		= RESET(0x2c0, BIT(20)),
- 	[RST_AHB1_SPI1]		= RESET(0x2c0, BIT(21)),
---- a/drivers/clk/sunxi/clk_a64.c
-+++ b/drivers/clk/sunxi/clk_a64.c
-@@ -19,6 +19,7 @@ static const struct ccu_clk_gate a64_gat
- 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
- 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
-+	[CLK_BUS_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_BUS_EMAC]		= GATE(0x060, BIT(17)),
- 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_BUS_SPI1]		= GATE(0x060, BIT(21)),
-@@ -39,6 +40,7 @@ static const struct ccu_clk_gate a64_gat
- 	[CLK_BUS_UART3]		= GATE(0x06c, BIT(19)),
- 	[CLK_BUS_UART4]		= GATE(0x06c, BIT(20)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 
-@@ -58,6 +60,7 @@ static const struct ccu_reset a64_resets
- 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
- 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
- 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
-+	[RST_BUS_NAND]		= RESET(0x2c0, BIT(13)),
- 	[RST_BUS_EMAC]		= RESET(0x2c0, BIT(17)),
- 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
- 	[RST_BUS_SPI1]		= RESET(0x2c0, BIT(21)),
---- a/drivers/clk/sunxi/clk_a80.c
-+++ b/drivers/clk/sunxi/clk_a80.c
-@@ -14,12 +14,18 @@
- #include <linux/bitops.h>
- 
- static const struct ccu_clk_gate a80_gates[] = {
-+	[CLK_NAND0_0]		= GATE(0x400, BIT(31)),
-+	[CLK_NAND0_1]		= GATE(0x404, BIT(31)),
-+	[CLK_NAND1_0]		= GATE(0x408, BIT(31)),
-+	[CLK_NAND1_1]		= GATE(0x40c, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x430, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x434, BIT(31)),
- 	[CLK_SPI2]		= GATE(0x438, BIT(31)),
- 	[CLK_SPI3]		= GATE(0x43c, BIT(31)),
- 
- 	[CLK_BUS_MMC]		= GATE(0x580, BIT(8)),
-+	[CLK_BUS_NAND0]		= GATE(0x580, BIT(12)),
-+	[CLK_BUS_NAND1]		= GATE(0x580, BIT(13)),
- 	[CLK_BUS_SPI0]		= GATE(0x580, BIT(20)),
- 	[CLK_BUS_SPI1]		= GATE(0x580, BIT(21)),
- 	[CLK_BUS_SPI2]		= GATE(0x580, BIT(22)),
-@@ -42,6 +48,8 @@ static const struct ccu_clk_gate a80_gat
- 
- static const struct ccu_reset a80_resets[] = {
- 	[RST_BUS_MMC]		= RESET(0x5a0, BIT(8)),
-+	[RST_BUS_NAND0]		= RESET(0x5a0, BIT(12)),
-+	[RST_BUS_NAND1]		= RESET(0x5a0, BIT(13)),
- 	[RST_BUS_SPI0]		= RESET(0x5a0, BIT(20)),
- 	[RST_BUS_SPI1]		= RESET(0x5a0, BIT(21)),
- 	[RST_BUS_SPI2]		= RESET(0x5a0, BIT(22)),
---- a/drivers/clk/sunxi/clk_a83t.c
-+++ b/drivers/clk/sunxi/clk_a83t.c
-@@ -17,6 +17,7 @@ static struct ccu_clk_gate a83t_gates[]
- 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
- 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
-+	[CLK_BUS_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_BUS_EMAC]		= GATE(0x060, BIT(17)),
- 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_BUS_SPI1]		= GATE(0x060, BIT(21)),
-@@ -36,6 +37,7 @@ static struct ccu_clk_gate a83t_gates[]
- 	[CLK_BUS_UART3]		= GATE(0x06c, BIT(19)),
- 	[CLK_BUS_UART4]		= GATE(0x06c, BIT(20)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 
-@@ -54,6 +56,7 @@ static struct ccu_reset a83t_resets[] =
- 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
- 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
- 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
-+	[RST_BUS_NAND]		= RESET(0x2c0, BIT(13)),
- 	[RST_BUS_EMAC]		= RESET(0x2c0, BIT(17)),
- 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
- 	[RST_BUS_SPI1]		= RESET(0x2c0, BIT(21)),
---- a/drivers/clk/sunxi/clk_h3.c
-+++ b/drivers/clk/sunxi/clk_h3.c
-@@ -19,6 +19,7 @@ static struct ccu_clk_gate h3_gates[] =
- 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
- 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
-+	[CLK_BUS_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_BUS_EMAC]		= GATE(0x060, BIT(17)),
- 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_BUS_SPI1]		= GATE(0x060, BIT(21)),
-@@ -44,6 +45,7 @@ static struct ccu_clk_gate h3_gates[] =
- 
- 	[CLK_BUS_EPHY]		= GATE(0x070, BIT(0)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 
-@@ -66,6 +68,7 @@ static struct ccu_reset h3_resets[] = {
- 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
- 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
- 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
-+	[RST_BUS_NAND]		= RESET(0x2c0, BIT(13)),
- 	[RST_BUS_EMAC]		= RESET(0x2c0, BIT(17)),
- 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
- 	[RST_BUS_SPI1]		= RESET(0x2c0, BIT(21)),
---- a/drivers/clk/sunxi/clk_h6.c
-+++ b/drivers/clk/sunxi/clk_h6.c
-@@ -18,6 +18,10 @@ static struct ccu_clk_gate h6_gates[] =
- 
- 	[CLK_APB1]		= GATE_DUMMY,
- 
-+	[CLK_NAND0]		= GATE(0x810, BIT(31)),
-+	[CLK_NAND1]		= GATE(0x814, BIT(31)),
-+	[CLK_BUS_NAND]		= GATE(0x82c, BIT(0)),
-+
- 	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
- 	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
- 	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
-@@ -58,6 +62,8 @@ static struct ccu_clk_gate h6_gates[] =
- };
- 
- static struct ccu_reset h6_resets[] = {
-+	[RST_BUS_NAND]		= RESET(0x82c, BIT(16)),
-+
- 	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
- 	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
- 	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
---- a/drivers/clk/sunxi/clk_h616.c
-+++ b/drivers/clk/sunxi/clk_h616.c
-@@ -17,6 +17,10 @@ static struct ccu_clk_gate h616_gates[]
- 
- 	[CLK_APB1]		= GATE_DUMMY,
- 
-+	[CLK_NAND0]		= GATE(0x810, BIT(31)),
-+	[CLK_NAND1]		= GATE(0x814, BIT(31)),
-+	[CLK_BUS_NAND]		= GATE(0x82c, BIT(0)),
-+
- 	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
- 	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
- 	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
-@@ -67,6 +71,8 @@ static struct ccu_clk_gate h616_gates[]
- };
- 
- static struct ccu_reset h616_resets[] = {
-+	[RST_BUS_NAND]		= RESET(0x82c, BIT(16)),
-+
- 	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
- 	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
- 	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
---- a/drivers/clk/sunxi/clk_r40.c
-+++ b/drivers/clk/sunxi/clk_r40.c
-@@ -18,6 +18,7 @@ static struct ccu_clk_gate r40_gates[] =
- 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
- 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
- 	[CLK_BUS_MMC3]		= GATE(0x060, BIT(11)),
-+	[CLK_BUS_NAND]		= GATE(0x060, BIT(13)),
- 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
- 	[CLK_BUS_SPI1]		= GATE(0x060, BIT(21)),
- 	[CLK_BUS_SPI2]		= GATE(0x060, BIT(22)),
-@@ -48,6 +49,7 @@ static struct ccu_clk_gate r40_gates[] =
- 	[CLK_BUS_UART6]		= GATE(0x06c, BIT(22)),
- 	[CLK_BUS_UART7]		= GATE(0x06c, BIT(23)),
- 
-+	[CLK_NAND]		= GATE(0x080, BIT(31)),
- 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
- 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
- 	[CLK_SPI2]		= GATE(0x0a8, BIT(31)),
-@@ -70,6 +72,7 @@ static struct ccu_reset r40_resets[] = {
- 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
- 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
- 	[RST_BUS_MMC3]		= RESET(0x2c0, BIT(11)),
-+	[RST_BUS_NAND]		= RESET(0x2c0, BIT(13)),
- 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
- 	[RST_BUS_SPI1]		= RESET(0x2c0, BIT(21)),
- 	[RST_BUS_SPI2]		= RESET(0x2c0, BIT(22)),

package/boot/uboot-d1/patches/0027-env-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch

@@ -1,7 +1,7 @@
-From 27834df51087a005b0330f094492b984cc225f6a Mon Sep 17 00:00:00 2001
+From f82100d7f3b58014b2642be8f9366f7b11b06a73 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Fri, 5 Aug 2022 23:28:54 -0500
-Subject: [PATCH 72/90] env: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
+Subject: [PATCH 27/68] env: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
 
 This ensures the same environment layout will be used across all sunxi
 boards, regardless of CPU architecture.
@@ -13,7 +13,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/env/Kconfig
 +++ b/env/Kconfig
-@@ -92,7 +92,7 @@ config ENV_IS_IN_FAT
+@@ -97,7 +97,7 @@ config ENV_IS_IN_FAT
  	bool "Environment is in a FAT filesystem"
  	depends on !CHAIN_OF_TRUST
  	default y if ARCH_BCM283X
@@ -22,7 +22,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default y if MMC_OMAP_HS && TI_COMMON_CMD_OPTIONS
  	select FS_FAT
  	select FAT_WRITE
-@@ -338,7 +338,7 @@ config ENV_IS_IN_SPI_FLASH
+@@ -350,7 +350,7 @@ config ENV_IS_IN_SPI_FLASH
  	default y if NORTHBRIDGE_INTEL_IVYBRIDGE
  	default y if INTEL_QUARK
  	default y if INTEL_QUEENSBAY
@@ -31,7 +31,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	help
  	  Define this if you have a SPI Flash memory device which you
  	  want to use for the environment.
-@@ -461,7 +461,7 @@ config ENV_FAT_DEVICE_AND_PART
+@@ -473,7 +473,7 @@ config ENV_FAT_DEVICE_AND_PART
  	depends on ENV_IS_IN_FAT
  	default "0:1" if TI_COMMON_CMD_OPTIONS
  	default "0:auto" if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
@@ -40,7 +40,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default "0" if ARCH_AT91
  	help
  	  Define this to a string to specify the partition of the device. It can
-@@ -555,7 +555,7 @@ config ENV_OFFSET
+@@ -567,7 +567,7 @@ config ENV_OFFSET
  		    ENV_IS_IN_SPI_FLASH
  	default 0x3f8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC
  	default 0x140000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH
@@ -49,7 +49,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0xE0000 if ARCH_ZYNQ
  	default 0x1E00000 if ARCH_ZYNQMP
  	default 0x7F40000 if ARCH_VERSAL || ARCH_VERSAL_NET
-@@ -580,7 +580,7 @@ config ENV_SIZE
+@@ -602,7 +602,7 @@ config ENV_SIZE
  	hex "Environment Size"
  	default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP
  	default 0x20000 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91
@@ -58,7 +58,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC
  	default 0x2000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH
  	default 0x8000 if ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET
-@@ -596,7 +596,7 @@ config ENV_SECT_SIZE
+@@ -618,7 +618,7 @@ config ENV_SECT_SIZE
  	default 0x40000 if ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET
  	default 0x20000 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91
  	default 0x20000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH

package/boot/uboot-d1/patches/0028-drivers-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch

@@ -1,13 +1,12 @@
-From 666d3c2bc058268a976397ec3e258f532edcfeb2 Mon Sep 17 00:00:00 2001
-From: Zoltan HERPAI <wigyori@uid0.hu>
-Date: Tue, 6 Jun 2023 18:12:11 +0000
-Subject: [PATCH 73/90] drivers: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
+From bb75b5b2a46a87e6582dc1b48062b77812fb53c1 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Fri, 5 Aug 2022 23:53:23 -0500
+Subject: [PATCH 28/68] drivers: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
 
 This provides a unified configuration across all sunxi boards,
 regardless of CPU architecture.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
-Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
 ---
  drivers/clk/sunxi/Kconfig     |  2 +-
  drivers/fastboot/Kconfig      | 13 ++++++-------
@@ -37,7 +36,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	default y
 --- a/drivers/fastboot/Kconfig
 +++ b/drivers/fastboot/Kconfig
-@@ -8,7 +8,7 @@ config FASTBOOT
+@@ -15,7 +15,7 @@ config FASTBOOT
  config USB_FUNCTION_FASTBOOT
  	bool "Enable USB fastboot gadget"
  	depends on USB_GADGET
@@ -46,7 +45,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	select FASTBOOT
  	select USB_GADGET_DOWNLOAD
  	help
-@@ -32,10 +32,9 @@ if FASTBOOT
+@@ -46,10 +46,9 @@ if FASTBOOT
  
  config FASTBOOT_BUF_ADDR
  	hex "Define FASTBOOT buffer address"
@@ -58,7 +57,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	default 0x60800800 if ROCKCHIP_RK3036 || ROCKCHIP_RK3188 || \
  				ROCKCHIP_RK322X
  	default 0x800800 if ROCKCHIP_RK3288 || ROCKCHIP_RK3329 || \
-@@ -52,7 +51,7 @@ config FASTBOOT_BUF_SIZE
+@@ -66,7 +65,7 @@ config FASTBOOT_BUF_SIZE
  	hex "Define FASTBOOT buffer size"
  	default 0x8000000 if ARCH_ROCKCHIP
  	default 0x6000000 if ARCH_ZYNQMP
@@ -67,7 +66,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	default 0x8192 if SANDBOX
  	default 0x7000000
  	help
-@@ -71,7 +70,7 @@ config FASTBOOT_USB_DEV
+@@ -85,7 +84,7 @@ config FASTBOOT_USB_DEV
  
  config FASTBOOT_FLASH
  	bool "Enable FASTBOOT FLASH command"
@@ -76,7 +75,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	depends on MMC || (MTD_RAW_NAND && CMD_MTDPARTS)
  	select IMAGE_SPARSE
  	help
-@@ -105,8 +104,8 @@ config FASTBOOT_FLASH_MMC_DEV
+@@ -120,8 +119,8 @@ config FASTBOOT_FLASH_MMC_DEV
  	int "Define FASTBOOT MMC FLASH default device"
  	depends on FASTBOOT_FLASH_MMC
  	default 0 if ARCH_ROCKCHIP
@@ -89,7 +88,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	  regarding the non-volatile storage device. Define this to
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
-@@ -370,7 +370,7 @@ config SANDBOX_GPIO_COUNT
+@@ -367,7 +367,7 @@ config SANDBOX_GPIO_COUNT
  
  config SUNXI_GPIO
  	bool "Allwinner GPIO driver"
@@ -100,7 +99,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	  Support the GPIO device in Allwinner SoCs.
 --- a/drivers/mmc/Kconfig
 +++ b/drivers/mmc/Kconfig
-@@ -756,7 +756,7 @@ config ZYNQ_HISPD_BROKEN
+@@ -753,7 +753,7 @@ config ZYNQ_HISPD_BROKEN
  
  config MMC_SUNXI
  	bool "Allwinner sunxi SD/MMC Host Controller support"
@@ -134,11 +133,11 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  #
  config PHY_SUN4I_USB
  	bool "Allwinner Sun4I USB PHY driver"
--	depends on ARCH_SUNXI && !MACH_SUN9I
-+	depends on depends on BOARD_SUNXI
+-	depends on ARCH_SUNXI
++	depends on BOARD_SUNXI
+ 	depends on !MACH_SUN9I
+ 	default n if MACH_SUN8I_V3S
  	default y
- 	select DM_REGULATOR
- 	select PHY
 --- a/drivers/pinctrl/sunxi/Kconfig
 +++ b/drivers/pinctrl/sunxi/Kconfig
 @@ -1,6 +1,6 @@
@@ -162,7 +161,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	  This enables support for common reset driver for
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -453,7 +453,7 @@ config SOFT_SPI
+@@ -488,7 +488,7 @@ config SPI_SN_F_OSPI
  
  config SPI_SUNXI
  	bool "Allwinner SoC SPI controllers"
@@ -173,7 +172,7 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  
 --- a/drivers/usb/Kconfig
 +++ b/drivers/usb/Kconfig
-@@ -116,7 +116,7 @@ config USB_KEYBOARD_FN_KEYS
+@@ -158,7 +158,7 @@ config USB_KEYBOARD_FN_KEYS
  
  choice
  	prompt "USB keyboard polling"
@@ -184,34 +183,34 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	  Enable a polling mechanism for USB keyboard.
 --- a/drivers/usb/gadget/Kconfig
 +++ b/drivers/usb/gadget/Kconfig
-@@ -40,7 +40,7 @@ if USB_GADGET
- 
+@@ -47,7 +47,7 @@ if USB_GADGET
  config USB_GADGET_MANUFACTURER
  	string "Vendor name of the USB device"
+ 	default "NVIDIA" if ARCH_TEGRA
 -	default "Allwinner Technology" if ARCH_SUNXI
 +	default "Allwinner Technology" if BOARD_SUNXI
  	default "Rockchip" if ARCH_ROCKCHIP
  	default "U-Boot"
  	help
-@@ -49,7 +49,7 @@ config USB_GADGET_MANUFACTURER
- 
+@@ -57,7 +57,7 @@ config USB_GADGET_MANUFACTURER
  config USB_GADGET_VENDOR_NUM
  	hex "Vendor ID of the USB device"
+ 	default 0x0955 if ARCH_TEGRA
 -	default 0x1f3a if ARCH_SUNXI
 +	default 0x1f3a if BOARD_SUNXI
  	default 0x2207 if ARCH_ROCKCHIP
  	default 0x0
  	help
-@@ -59,7 +59,7 @@ config USB_GADGET_VENDOR_NUM
- 
+@@ -68,7 +68,7 @@ config USB_GADGET_VENDOR_NUM
  config USB_GADGET_PRODUCT_NUM
  	hex "Product ID of the USB device"
+ 	default 0x701a if ARCH_TEGRA
 -	default 0x1010 if ARCH_SUNXI
 +	default 0x1010 if BOARD_SUNXI
  	default 0x310a if ROCKCHIP_RK3036
  	default 0x300a if ROCKCHIP_RK3066
  	default 0x310c if ROCKCHIP_RK3128
-@@ -202,7 +202,7 @@ endif # USB_GADGET_DOWNLOAD
+@@ -215,7 +215,7 @@ endif # USB_GADGET_DOWNLOAD
  config USB_ETHER
  	bool "USB Ethernet Gadget"
  	depends on NET
@@ -228,12 +227,12 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	bool "Enable sunxi OTG / DRC USB controller"
 -	depends on ARCH_SUNXI
 +	depends on BOARD_SUNXI
+ 	depends on PHY_SUN4I_USB
  	select USB_MUSB_PIO_ONLY
  	default y
- 	---help---
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
-@@ -183,7 +183,7 @@ config CONSOLE_TRUETYPE_MAX_METRICS
+@@ -217,7 +217,7 @@ config CONSOLE_TRUETYPE_MAX_METRICS
  
  config SYS_WHITE_ON_BLACK
  	bool "Display console as white on a black background"
@@ -250,10 +249,10 @@ Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
  	default 30000 if ARCH_SOCFPGA
 -	default 16000 if ARCH_SUNXI
 +	default 16000 if BOARD_SUNXI
+ 	default 5376 if ULP_WATCHDOG
+ 	default 15000 if ARCH_BCM283X
  	default 60000
- 	help
- 	  Watchdog timeout in msec
-@@ -321,7 +321,7 @@ config WDT_STM32MP
+@@ -353,7 +353,7 @@ config WDT_STARFIVE
  
  config WDT_SUNXI
  	bool "Allwinner sunxi watchdog timer support"

package/boot/uboot-d1/patches/0028-pinctrl-sunxi-Add-NAND-pinmuxes.patch

@@ -1,120 +0,0 @@
-From 7be2405244565973cff0a40196bbed08df90f6a3 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Mon, 16 May 2022 00:31:36 -0500
-Subject: [PATCH 28/90] pinctrl: sunxi: Add NAND pinmuxes
-
-NAND is always at function 2 on port C.
-
-Pin lists and mux values were taken from the Linux drivers.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -269,6 +269,7 @@ static const struct sunxi_pinctrl_functi
- #endif
- 	{ "mmc2",	3 },	/* PC6-PC15 */
- 	{ "mmc3",	2 },	/* PI4-PI9 */
-+	{ "nand0",	2 },	/* PC0-PC24 */
- 	{ "spi0",	3 },	/* PC0-PC2, PC23 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	4 },	/* PF2-PF4 */
-@@ -293,6 +294,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG3-PG8 */
- 	{ "mmc2",	3 },	/* PC6-PC15 */
-+	{ "nand0",	2 },	/* PC0-PC19 */
- 	{ "spi0",	3 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	4 },	/* PF2-PF4 */
-@@ -319,6 +321,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC6-PC15, PC24 */
- 	{ "mmc3",	4 },	/* PC6-PC15, PC24 */
-+	{ "nand0",	2 },	/* PC0-PC26 */
- 	{ "spi0",	3 },	/* PC0-PC2, PC27 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -363,6 +366,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc1",	4 },	/* PG0-PG5 */
- #endif
- 	{ "mmc2",	3 },	/* PC5-PC15, PC24 */
-+	{ "nand0",	2 },	/* PC0-PC24 */
- 	{ "spi0",	3 },	/* PC0-PC2, PC23 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	4 },	/* PF2-PF4 */
-@@ -386,6 +390,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC5-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "spi0",	3 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -424,6 +429,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC5-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "spi0",	3 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -450,6 +456,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC5-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC18 */
- 	{ "spi0",	3 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -491,6 +498,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC5-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "spi0",	3 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -557,6 +565,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC6-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC18 */
- 	{ "spi0",	3 },	/* PC0-PC2, PC19 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	4 },	/* PF2-PF4 */
-@@ -622,6 +631,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC1-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "pwm",	2 },	/* PD22 */
- 	{ "spi0",	4 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
-@@ -664,6 +674,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC1-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "spi0",	3 },	/* PC0-PC3 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -690,6 +701,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC1-PC14 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "spi0",	4 },	/* PC0-PC7 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */
-@@ -728,6 +740,7 @@ static const struct sunxi_pinctrl_functi
- 	{ "mmc0",	2 },	/* PF0-PF5 */
- 	{ "mmc1",	2 },	/* PG0-PG5 */
- 	{ "mmc2",	3 },	/* PC0-PC16 */
-+	{ "nand0",	2 },	/* PC0-PC16 */
- 	{ "spi0",	4 },	/* PC0-PC7, PC15-PC16 */
- #if IS_ENABLED(CONFIG_UART0_PORT_F)
- 	{ "uart0",	3 },	/* PF2-PF4 */

package/boot/uboot-d1/patches/0029-disk-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch

@@ -1,7 +1,7 @@
-From 98fb93ceb936b375d7f8f2908f0703a93e27fbc4 Mon Sep 17 00:00:00 2001
+From 1cad18bc1db10fe6fad78a0e1261968260722f0c Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 6 Aug 2022 00:05:52 -0500
-Subject: [PATCH 74/90] disk: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
+Subject: [PATCH 29/68] disk: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
 
 This provides a unified configuration across all sunxi boards,
 regardless of CPU architecture.

package/boot/uboot-d1/patches/0029-mtd-nand-sunxi-Remove-an-unnecessary-check.patch

@@ -1,32 +0,0 @@
-From 8e793af8598a8429c9dc0f096c72a92adb360a57 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 15 May 2022 21:51:47 -0500
-Subject: [PATCH 29/90] mtd: nand: sunxi: Remove an unnecessary check
-
-Each chip is required to have a unique CS number ("reg" property) in the
-range 0-7, so there is no need to separately count the number of chips.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/mtd/nand/raw/sunxi_nand.c | 10 ----------
- 1 file changed, 10 deletions(-)
-
---- a/drivers/mtd/nand/raw/sunxi_nand.c
-+++ b/drivers/mtd/nand/raw/sunxi_nand.c
-@@ -1767,16 +1767,6 @@ static int sunxi_nand_chips_init(int nod
- 	int ret, i = 0;
- 
- 	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
--	     nand_node = fdt_next_subnode(blob, nand_node))
--		i++;
--
--	if (i > 8) {
--		dev_err(nfc->dev, "too many NAND chips: %d (max = 8)\n", i);
--		return -EINVAL;
--	}
--
--	i = 0;
--	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
- 	     nand_node = fdt_next_subnode(blob, nand_node)) {
- 		ret = sunxi_nand_chip_init(nand_node, nfc, i++);
- 		if (ret)

package/boot/uboot-d1/patches/0030-mtd-nand-sunxi-Convert-from-fdtdec-to-ofnode.patch

@@ -1,203 +0,0 @@
-From 61b63cbb3526e19a0e299f95a3435a237c7c4b4b Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sun, 15 May 2022 21:54:25 -0500
-Subject: [PATCH 30/90] mtd: nand: sunxi: Convert from fdtdec to ofnode
-
-As a first step toward converting this driver to the driver model, use
-the ofnode abstraction to replace direct references to the FDT blob.
-
-Using ofnode_read_u32_index removes an extra pair of loops and makes the
-allwinner,rb property optional, matching the devicetree binding.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/mtd/nand/raw/sunxi_nand.c | 73 +++++++++++--------------------
- include/fdtdec.h                  |  1 -
- lib/fdtdec.c                      |  1 -
- 3 files changed, 26 insertions(+), 49 deletions(-)
-
---- a/drivers/mtd/nand/raw/sunxi_nand.c
-+++ b/drivers/mtd/nand/raw/sunxi_nand.c
-@@ -25,11 +25,10 @@
-  */
- 
- #include <common.h>
--#include <fdtdec.h>
-+#include <dm.h>
- #include <malloc.h>
- #include <memalign.h>
- #include <nand.h>
--#include <asm/global_data.h>
- #include <dm/device_compat.h>
- #include <dm/devres.h>
- #include <linux/bitops.h>
-@@ -45,8 +44,6 @@
- #include <asm/gpio.h>
- #include <asm/arch/clock.h>
- 
--DECLARE_GLOBAL_DATA_PTR;
--
- #define NFC_REG_CTL		0x0000
- #define NFC_REG_ST		0x0004
- #define NFC_REG_INT		0x0008
-@@ -1605,19 +1602,18 @@ static int sunxi_nand_ecc_init(struct mt
- 	return 0;
- }
- 
--static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
-+static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum)
- {
- 	const struct nand_sdr_timings *timings;
--	const void *blob = gd->fdt_blob;
- 	struct sunxi_nand_chip *chip;
- 	struct mtd_info *mtd;
- 	struct nand_chip *nand;
- 	int nsels;
- 	int ret;
- 	int i;
--	u32 cs[8], rb[8];
-+	u32 tmp;
- 
--	if (!fdt_getprop(blob, node, "reg", &nsels))
-+	if (!ofnode_get_property(np, "reg", &nsels))
- 		return -EINVAL;
- 
- 	nsels /= sizeof(u32);
-@@ -1638,25 +1634,12 @@ static int sunxi_nand_chip_init(int node
- 	chip->selected = -1;
- 
- 	for (i = 0; i < nsels; i++) {
--		cs[i] = -1;
--		rb[i] = -1;
--	}
--
--	ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
--	if (ret) {
--		dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
--		return ret;
--	}
--
--	ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
--				   nsels);
--	if (ret) {
--		dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
--		return ret;
--	}
--
--	for (i = 0; i < nsels; i++) {
--		int tmp = cs[i];
-+		ret = ofnode_read_u32_index(np, "reg", i, &tmp);
-+		if (ret) {
-+			dev_err(nfc->dev, "could not retrieve reg property: %d\n",
-+				ret);
-+			return ret;
-+		}
- 
- 		if (tmp > NFC_MAX_CS) {
- 			dev_err(nfc->dev,
-@@ -1671,15 +1654,14 @@ static int sunxi_nand_chip_init(int node
- 
- 		chip->sels[i].cs = tmp;
- 
--		tmp = rb[i];
--		if (tmp >= 0 && tmp < 2) {
-+		if (!ofnode_read_u32_index(np, "allwinner,rb", i, &tmp) &&
-+		    tmp < 2) {
- 			chip->sels[i].rb.type = RB_NATIVE;
- 			chip->sels[i].rb.info.nativeid = tmp;
- 		} else {
--			ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
--						"rb-gpios", i,
--						&chip->sels[i].rb.info.gpio,
--						GPIOD_IS_IN);
-+			ret = gpio_request_by_name_nodev(np, "rb-gpios", i,
-+							 &chip->sels[i].rb.info.gpio,
-+							 GPIOD_IS_IN);
- 			if (ret)
- 				chip->sels[i].rb.type = RB_GPIO;
- 			else
-@@ -1711,7 +1693,7 @@ static int sunxi_nand_chip_init(int node
- 	 * in the DT.
- 	 */
- 	nand->ecc.mode = NAND_ECC_HW;
--	nand->flash_node = offset_to_ofnode(node);
-+	nand->flash_node = np;
- 	nand->select_chip = sunxi_nfc_select_chip;
- 	nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
- 	nand->read_buf = sunxi_nfc_read_buf;
-@@ -1760,15 +1742,13 @@ static int sunxi_nand_chip_init(int node
- 	return 0;
- }
- 
--static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)
-+static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc)
- {
--	const void *blob = gd->fdt_blob;
--	int nand_node;
-+	ofnode nand_np;
- 	int ret, i = 0;
- 
--	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
--	     nand_node = fdt_next_subnode(blob, nand_node)) {
--		ret = sunxi_nand_chip_init(nand_node, nfc, i++);
-+	ofnode_for_each_subnode(nand_np, node) {
-+		ret = sunxi_nand_chip_init(nand_np, nfc, i++);
- 		if (ret)
- 			return ret;
- 	}
-@@ -1794,10 +1774,9 @@ static void sunxi_nand_chips_cleanup(str
- 
- void sunxi_nand_init(void)
- {
--	const void *blob = gd->fdt_blob;
- 	struct sunxi_nfc *nfc;
--	fdt_addr_t regs;
--	int node;
-+	phys_addr_t regs;
-+	ofnode node;
- 	int ret;
- 
- 	nfc = kzalloc(sizeof(*nfc), GFP_KERNEL);
-@@ -1808,18 +1787,18 @@ void sunxi_nand_init(void)
- 	init_waitqueue_head(&nfc->controller.wq);
- 	INIT_LIST_HEAD(&nfc->chips);
- 
--	node = fdtdec_next_compatible(blob, 0, COMPAT_SUNXI_NAND);
--	if (node < 0) {
-+	node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand");
-+	if (!ofnode_valid(node)) {
- 		pr_err("unable to find nfc node in device tree\n");
- 		goto err;
- 	}
- 
--	if (!fdtdec_get_is_enabled(blob, node)) {
-+	if (!ofnode_is_enabled(node)) {
- 		pr_err("nfc disabled in device tree\n");
- 		goto err;
- 	}
- 
--	regs = fdtdec_get_addr(blob, node, "reg");
-+	regs = ofnode_get_addr(node);
- 	if (regs == FDT_ADDR_T_NONE) {
- 		pr_err("unable to find nfc address in device tree\n");
- 		goto err;
---- a/include/fdtdec.h
-+++ b/include/fdtdec.h
-@@ -187,7 +187,6 @@ enum fdt_compat_id {
- 	COMPAT_INTEL_BAYTRAIL_FSP,	/* Intel Bay Trail FSP */
- 	COMPAT_INTEL_BAYTRAIL_FSP_MDP,	/* Intel FSP memory-down params */
- 	COMPAT_INTEL_IVYBRIDGE_FSP,	/* Intel Ivy Bridge FSP */
--	COMPAT_SUNXI_NAND,		/* SUNXI NAND controller */
- 	COMPAT_ALTERA_SOCFPGA_CLK,	/* SoCFPGA Clock initialization */
- 	COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,	/* SoCFPGA pinctrl-single */
- 	COMPAT_ALTERA_SOCFPGA_H2F_BRG,          /* SoCFPGA hps2fpga bridge */
---- a/lib/fdtdec.c
-+++ b/lib/fdtdec.c
-@@ -64,7 +64,6 @@ static const char * const compat_names[C
- 	COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
- 	COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
- 	COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
--	COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
- 	COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
- 	COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
- 	COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),

package/boot/uboot-d1/patches/0030-spl-sunxi-Replace-ARCH_SUNXI-with-BOARD_SUNXI.patch

@@ -1,7 +1,7 @@
-From 7f06dca4df9302a22a8d27af887da50a67b7dd1d Mon Sep 17 00:00:00 2001
+From c222a0e36919f6529190cfd3e362d25f1c876bf8 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sat, 6 Aug 2022 00:09:38 -0500
-Subject: [PATCH 75/90] spl: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
+Subject: [PATCH 30/68] spl: sunxi: Replace ARCH_SUNXI with BOARD_SUNXI
 
 This provides a unified configuration across all sunxi boards,
 regardless of CPU architecture.
@@ -23,7 +23,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  
  config SPL_BSS_START_ADDR
  	hex "Link address for the BSS within the SPL binary"
-@@ -335,7 +335,7 @@ config SPL_SYS_MALLOC_SIMPLE
+@@ -349,7 +349,7 @@ config SPL_SYS_MALLOC_SIMPLE
  config SPL_SHARES_INIT_SP_ADDR
  	bool "SPL and U-Boot use the same initial stack pointer location"
  	depends on (ARM || ARCH_JZ47XX || MICROBLAZE || RISCV) && SPL_FRAMEWORK
@@ -32,7 +32,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default y
  	help
  	  In many cases, we can use the same initial stack pointer address for
-@@ -453,7 +453,7 @@ config SPL_DISPLAY_PRINT
+@@ -469,7 +469,7 @@ config SPL_DISPLAY_PRINT
  
  config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  	bool "MMC raw mode: by sector"
@@ -41,7 +41,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  		     ARCH_MX6 || ARCH_MX7 || \
  		     ARCH_ROCKCHIP || ARCH_MVEBU ||  ARCH_SOCFPGA || \
  		     ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
-@@ -466,7 +466,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SEC
+@@ -482,7 +482,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SEC
  config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
  	hex "Address on the MMC to load U-Boot from"
  	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
@@ -50,7 +50,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x75 if ARCH_DAVINCI
  	default 0x8a if ARCH_MX6 || ARCH_MX7
  	default 0x100 if ARCH_UNIPHIER
-@@ -483,7 +483,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
+@@ -499,7 +499,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
  config SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET
  	hex "U-Boot main hardware partition image offset"
  	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
@@ -59,7 +59,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	default 0x0
  	help
  	  On some platforms SPL location depends on hardware partition. The ROM
-@@ -1308,7 +1308,7 @@ endif # SPL_SPI_FLASH_SUPPORT
+@@ -1344,7 +1344,7 @@ endif # SPL_SPI_FLASH_SUPPORT
  
  config SYS_SPI_U_BOOT_OFFS
  	hex "address of u-boot payload in SPI flash"

package/boot/uboot-d1/patches/0031-mtd-nand-sunxi-Convert-to-the-driver-model.patch

@@ -1,172 +0,0 @@
-From 3411a9a1be9a8d8fef236a81edbce2a1a8218a32 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Mon, 16 May 2022 00:16:48 -0500
-Subject: [PATCH 31/90] mtd: nand: sunxi: Convert to the driver model
-
-Clocks, resets, and pinmuxes are now handled by the driver model, so the
-only thing the "board" code needs to do is load the driver. This matches
-the pattern used by other DM raw NAND drivers (there is no NAND uclass).
-
-The actual board code is now only needed in SPL.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- board/sunxi/board.c               |  5 +-
- drivers/mtd/nand/raw/sunxi_nand.c | 81 ++++++++++++++++++-------------
- 2 files changed, 49 insertions(+), 37 deletions(-)
-
---- a/board/sunxi/board.c
-+++ b/board/sunxi/board.c
-@@ -311,7 +311,7 @@ int dram_init(void)
- 	return 0;
- }
- 
--#if defined(CONFIG_NAND_SUNXI)
-+#if defined(CONFIG_NAND_SUNXI) && defined(CONFIG_SPL_BUILD)
- static void nand_pinmux_setup(void)
- {
- 	unsigned int pin;
-@@ -347,9 +347,6 @@ void board_nand_init(void)
- {
- 	nand_pinmux_setup();
- 	nand_clock_setup();
--#ifndef CONFIG_SPL_BUILD
--	sunxi_nand_init();
--#endif
- }
- #endif /* CONFIG_NAND_SUNXI */
- 
---- a/drivers/mtd/nand/raw/sunxi_nand.c
-+++ b/drivers/mtd/nand/raw/sunxi_nand.c
-@@ -24,11 +24,13 @@
-  * GNU General Public License for more details.
-  */
- 
-+#include <clk.h>
- #include <common.h>
- #include <dm.h>
- #include <malloc.h>
- #include <memalign.h>
- #include <nand.h>
-+#include <reset.h>
- #include <dm/device_compat.h>
- #include <dm/devres.h>
- #include <linux/bitops.h>
-@@ -260,7 +262,7 @@ static inline struct sunxi_nand_chip *to
-  * NAND Controller structure: stores sunxi NAND controller information
-  *
-  * @controller:		base controller structure
-- * @dev:		parent device (used to print error messages)
-+ * @dev:		DM device (used to print error messages)
-  * @regs:		NAND controller registers
-  * @ahb_clk:		NAND Controller AHB clock
-  * @mod_clk:		NAND Controller mod clock
-@@ -273,7 +275,7 @@ static inline struct sunxi_nand_chip *to
-  */
- struct sunxi_nfc {
- 	struct nand_hw_control controller;
--	struct device *dev;
-+	struct udevice *dev;
- 	void __iomem *regs;
- 	struct clk *ahb_clk;
- 	struct clk *mod_clk;
-@@ -1772,54 +1774,67 @@ static void sunxi_nand_chips_cleanup(str
- }
- #endif /* __UBOOT__ */
- 
--void sunxi_nand_init(void)
-+static int sunxi_nand_probe(struct udevice *dev)
- {
--	struct sunxi_nfc *nfc;
--	phys_addr_t regs;
--	ofnode node;
-+	struct sunxi_nfc *nfc = dev_get_priv(dev);
-+	struct reset_ctl_bulk rst_bulk;
-+	struct clk_bulk clk_bulk;
- 	int ret;
- 
--	nfc = kzalloc(sizeof(*nfc), GFP_KERNEL);
--	if (!nfc)
--		return;
--
-+	nfc->dev = dev;
- 	spin_lock_init(&nfc->controller.lock);
- 	init_waitqueue_head(&nfc->controller.wq);
- 	INIT_LIST_HEAD(&nfc->chips);
- 
--	node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand");
--	if (!ofnode_valid(node)) {
--		pr_err("unable to find nfc node in device tree\n");
--		goto err;
--	}
--
--	if (!ofnode_is_enabled(node)) {
--		pr_err("nfc disabled in device tree\n");
--		goto err;
--	}
--
--	regs = ofnode_get_addr(node);
--	if (regs == FDT_ADDR_T_NONE) {
--		pr_err("unable to find nfc address in device tree\n");
--		goto err;
--	}
-+	nfc->regs = dev_read_addr_ptr(dev);
-+	if (!nfc->regs)
-+		return -EINVAL;
- 
--	nfc->regs = (void *)regs;
-+	ret = reset_get_bulk(dev, &rst_bulk);
-+	if (!ret)
-+		reset_deassert_bulk(&rst_bulk);
-+
-+	ret = clk_get_bulk(dev, &clk_bulk);
-+	if (!ret)
-+		clk_enable_bulk(&clk_bulk);
- 
- 	ret = sunxi_nfc_rst(nfc);
- 	if (ret)
--		goto err;
-+		return ret;
- 
--	ret = sunxi_nand_chips_init(node, nfc);
-+	ret = sunxi_nand_chips_init(dev_ofnode(dev), nfc);
- 	if (ret) {
--		dev_err(nfc->dev, "failed to init nand chips\n");
--		goto err;
-+		dev_err(dev, "failed to init nand chips\n");
-+		return ret;
- 	}
- 
--	return;
-+	return 0;
-+}
- 
--err:
--	kfree(nfc);
-+static const struct udevice_id sunxi_nand_ids[] = {
-+	{
-+		.compatible = "allwinner,sun4i-a10-nand",
-+	},
-+	{ }
-+};
-+
-+U_BOOT_DRIVER(sunxi_nand) = {
-+	.name		= "sunxi_nand",
-+	.id		= UCLASS_MTD,
-+	.of_match	= sunxi_nand_ids,
-+	.probe		= sunxi_nand_probe,
-+	.priv_auto	= sizeof(struct sunxi_nfc),
-+};
-+
-+void board_nand_init(void)
-+{
-+	struct udevice *dev;
-+	int ret;
-+
-+	ret = uclass_get_device_by_driver(UCLASS_MTD,
-+					  DM_DRIVER_GET(sunxi_nand), &dev);
-+	if (ret && ret != -ENODEV)
-+		pr_err("Failed to initialize sunxi NAND controller: %d\n", ret);
- }
- 
- MODULE_LICENSE("GPL v2");

package/boot/uboot-d1/patches/0031-serial-ns16550-Enable-clocks-during-probe.patch

@@ -1,11 +1,12 @@
-From 8fde85b609273f8389178d4c0d066390a0e0773d Mon Sep 17 00:00:00 2001
+From 0617377a2555031f02a459b3451fa33ce53e9b74 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Sun, 30 Oct 2022 14:56:10 -0500
-Subject: [PATCH 21/90] serial: ns16550: Enable clocks during probe
+Subject: [PATCH 33/68] serial: ns16550: Enable clocks during probe
 
 If the UART bus or baud clock has a gate, it must be enabled before the
 UART can be used.
 
+Reviewed-by: Stefan Roese <sr@denx.de>
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
  drivers/serial/ns16550.c | 5 +++++
@@ -13,15 +14,15 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/drivers/serial/ns16550.c
 +++ b/drivers/serial/ns16550.c
-@@ -506,6 +506,7 @@ int ns16550_serial_probe(struct udevice
+@@ -514,6 +514,7 @@ int ns16550_serial_probe(struct udevice
  	struct ns16550_plat *plat = dev_get_plat(dev);
  	struct ns16550 *const com_port = dev_get_priv(dev);
  	struct reset_ctl_bulk reset_bulk;
 +	struct clk_bulk clk_bulk;
  	fdt_addr_t addr;
+ 	fdt_addr_t size;
  	int ret;
- 
-@@ -524,6 +525,10 @@ int ns16550_serial_probe(struct udevice
+@@ -533,6 +534,10 @@ int ns16550_serial_probe(struct udevice
  	if (!ret)
  		reset_deassert_bulk(&reset_bulk);
  

package/boot/uboot-d1/patches/0032-sunxi-DT-H6-Add-USB3-to-Pine-H64-DTS.patch

@@ -1,31 +0,0 @@
-From 6fdd7e8d2758f69f5c8e3cb2a0f06da47c1f2cb4 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 17 Apr 2021 14:21:45 -0500
-Subject: [PATCH 32/90] sunxi: DT: H6: Add USB3 to Pine H64 DTS
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/dts/sun50i-h6-pine-h64.dts | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/dts/sun50i-h6-pine-h64.dts
-+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
-@@ -89,6 +89,10 @@
- 	status = "okay";
- };
- 
-+&dwc3 {
-+	status = "okay";
-+};
-+
- &ehci0 {
- 	status = "okay";
- };
-@@ -332,3 +336,7 @@
- 	usb3_vbus-supply = <&reg_usb_vbus>;
- 	status = "okay";
- };
-+
-+&usb3phy {
-+	status = "okay";
-+};

package/boot/uboot-d1/patches/0032-sunxi-binman-Move-BL31-and-SCP-firmware-addresses-to.patch

@@ -0,0 +1,102 @@
+From fa31297e5f79d6eb97aed3cf94326124b308e337 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 22 Jan 2023 11:46:34 -0600
+Subject: [PATCH 34/68] sunxi: binman: Move BL31 and SCP firmware addresses to
+ Kconfig
+
+This is easier to read than the #ifdef staircase, provides better
+visibility into the memory map (alongside the other Kconfig
+definitions), and allows these addresses to be reused from code.
+
+Reviewed-by: Simon Glass <sjg@chromium.org>
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/arm/dts/sunxi-u-boot.dtsi | 24 +++++++-----------------
+ arch/arm/mach-sunxi/Kconfig    | 17 +++++++++++++++++
+ 2 files changed, 24 insertions(+), 17 deletions(-)
+
+--- a/arch/arm/dts/sunxi-u-boot.dtsi
++++ b/arch/arm/dts/sunxi-u-boot.dtsi
+@@ -1,15 +1,5 @@
+ #include <config.h>
+ 
+-#ifdef CONFIG_MACH_SUN50I_H6
+-#define BL31_ADDR 0x104000
+-#define  SCP_ADDR 0x114000
+-#elif defined(CONFIG_MACH_SUN50I_H616)
+-#define BL31_ADDR 0x40000000
+-#else
+-#define BL31_ADDR  0x44000
+-#define  SCP_ADDR  0x50000
+-#endif
+-
+ / {
+ 	aliases {
+ 		mmc0 = &mmc0;
+@@ -69,8 +59,8 @@
+ 					os = "arm-trusted-firmware";
+ 					arch = "arm64";
+ 					compression = "none";
+-					load = <BL31_ADDR>;
+-					entry = <BL31_ADDR>;
++					load = <CONFIG_SUNXI_BL31_BASE>;
++					entry = <CONFIG_SUNXI_BL31_BASE>;
+ 
+ 					atf-bl31 {
+ 						filename = "bl31.bin";
+@@ -78,13 +68,13 @@
+ 					};
+ 				};
+ 
+-#ifdef SCP_ADDR
++#if CONFIG_SUNXI_SCP_BASE
+ 				scp {
+ 					description = "SCP firmware";
+ 					type = "firmware";
+ 					arch = "or1k";
+ 					compression = "none";
+-					load = <SCP_ADDR>;
++					load = <CONFIG_SUNXI_SCP_BASE>;
+ 
+ 					scp {
+ 						filename = "scp.bin";
+@@ -106,10 +96,10 @@
+ 				@config-SEQ {
+ 					description = "NAME";
+ 					firmware = "atf";
+-#ifndef SCP_ADDR
+-					loadables = "uboot";
+-#else
++#if CONFIG_SUNXI_SCP_BASE
+ 					loadables = "scp", "uboot";
++#else
++					loadables = "uboot";
+ #endif
+ 					fdt = "fdt-SEQ";
+ 				};
+--- a/arch/arm/mach-sunxi/Kconfig
++++ b/arch/arm/mach-sunxi/Kconfig
+@@ -147,6 +147,23 @@ config SUNXI_RVBAR_ALTERNATIVE
+ 	for all other SoCs, so the content of the SRAM_VER_REG becomes
+ 	irrelevant there, and we can use the same code.
+ 
++config SUNXI_BL31_BASE
++	hex
++	default 0x00044000 if MACH_SUN50I || MACH_SUN50I_H5
++	default 0x00104000 if MACH_SUN50I_H6
++	default 0x40000000 if MACH_SUN50I_H616
++	default 0x0
++	help
++	  Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
++
++config SUNXI_SCP_BASE
++	hex
++	default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
++	default 0x00114000 if MACH_SUN50I_H6
++	default 0x0
++	help
++	  Address where SCP firmware is loaded, or zero if it is not used.
++
+ config SUNXI_A64_TIMER_ERRATUM
+ 	bool
+ 

package/boot/uboot-d1/patches/0033-sunxi-binman-Support-FIT-generation-for-32-bit-SoCs.patch

@@ -0,0 +1,90 @@
+From 50ec5566a9eb50288c7aca9d85182e152aaf47d9 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 22 Jan 2023 11:57:42 -0600
+Subject: [PATCH 35/68] sunxi: binman: Support FIT generation for 32-bit SoCs
+
+Some 32-bit SoCs can use SCP firmware to implement additional PSCI
+functionality, such as system suspend. In order to load this firmware
+from SPL, we need to generate and use a FIT instead of a legacy image.
+
+Adjust the binman FIT definition so it does not rely on TF-A BL31, as
+this is not used on 32-bit SoCs. Instead, after loading the firmware,
+U-Boot proper is executed directly.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++-----
+ 1 file changed, 18 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/dts/sunxi-u-boot.dtsi
++++ b/arch/arm/dts/sunxi-u-boot.dtsi
+@@ -1,5 +1,11 @@
+ #include <config.h>
+ 
++#ifdef CONFIG_ARM64
++#define ARCH "arm64"
++#else
++#define ARCH "arm"
++#endif
++
+ / {
+ 	aliases {
+ 		mmc0 = &mmc0;
+@@ -34,30 +40,32 @@
+ 			filename = "spl/sunxi-spl.bin";
+ 		};
+ 
+-#ifdef CONFIG_ARM64
++#ifdef CONFIG_SPL_LOAD_FIT
+ 		fit {
+-			description = "Configuration to load ATF before U-Boot";
++			description = "Configuration to load U-Boot and firmware";
+ 			#address-cells = <1>;
+ 			fit,fdt-list = "of-list";
+ 
+ 			images {
+ 				uboot {
+-					description = "U-Boot (64-bit)";
++					description = "U-Boot";
+ 					type = "standalone";
+ 					os = "u-boot";
+-					arch = "arm64";
++					arch = ARCH;
+ 					compression = "none";
+ 					load = <CONFIG_TEXT_BASE>;
++					entry = <CONFIG_TEXT_BASE>;
+ 
+ 					u-boot-nodtb {
+ 					};
+ 				};
+ 
++#if CONFIG_SUNXI_BL31_BASE
+ 				atf {
+ 					description = "ARM Trusted Firmware";
+ 					type = "firmware";
+ 					os = "arm-trusted-firmware";
+-					arch = "arm64";
++					arch = ARCH;
+ 					compression = "none";
+ 					load = <CONFIG_SUNXI_BL31_BASE>;
+ 					entry = <CONFIG_SUNXI_BL31_BASE>;
+@@ -67,6 +75,7 @@
+ 						missing-msg = "atf-bl31-sunxi";
+ 					};
+ 				};
++#endif
+ 
+ #if CONFIG_SUNXI_SCP_BASE
+ 				scp {
+@@ -95,7 +104,11 @@
+ 
+ 				@config-SEQ {
+ 					description = "NAME";
++#if CONFIG_SUNXI_BL31_BASE
+ 					firmware = "atf";
++#else
++					firmware = "uboot";
++#endif
+ #if CONFIG_SUNXI_SCP_BASE
+ 					loadables = "scp", "uboot";
+ #else

package/boot/uboot-d1/patches/0033-tools-mkimage-Add-Allwinner-TOC1-support.patch

@@ -1,441 +0,0 @@
-From ff0e952a3a380ba191375d5f68609cdbe026d535 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 7 Aug 2021 19:55:20 -0500
-Subject: [PATCH 33/90] tools: mkimage: Add Allwinner TOC1 support
-
-TOC1 is an container format used by Allwinner's boot0 that can hold
-multiple images. It supports encryption and signatures, but that
-functionality is not implemented, only the basic "non-secure" subset.
-
-A config file is used to provide the list of data files to include. Its
-path is passed as the argument to "-d". It contains sections of the
-following form:
-
-  [name]
-  file = /path/to/file
-  addr = 0x12345678
-
-Specific well-known names, such as "dtb", "opensbi", and "u-boot", are
-used by the bootloader to distinguish the items inside the image.
-
-Cover-letter:
-tools: mkimage: Add Allwinner TOC1 support
-
-The SPL port for the Allwinner D1 RISC-V SoC will probably take a while
-longer than porting U-Boot proper, as none of the relevant drivers are
-set up for DM in SPL. In the meantime, we are using[1][2] a fork[3] of
-Allwinner's boot0 loader, which they also call "spl" in their BSP. boot0
-uses this TOC1 image format.
-
-The vendor tools for generating TOC1 images require a binary config file
-generated by their FEX compiler. Instead of trying to support that, I
-made up a simple human-readable config file format. I didn't see any
-existing platform-agnostic parser for multi-image containers in mkimage.
-
-I am sending this as RFC because it is only of temporary/limited use.
-It only works with one specific fork of boot0 which was modified to
-"behave" (the the original vendor version monkey-patches a custom header
-inside the U-Boot image during boot). So it will be obsolete once U-Boot
-SPL is ported. And it is Yet Another Image Format. On the other hand, it
-does work, and it is currently being used.
-
-[1]: https://linux-sunxi.org/Allwinner_Nezha#U-Boot
-[2]: https://fedoraproject.org/wiki/Architectures/RISC-V/Allwinner
-[3]: https://github.com/smaeul/sun20i_d1_spl
-END
-Series-prefix: RFC
-Series-to: sunxi
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- boot/image.c          |   1 +
- include/image.h       |   1 +
- include/sunxi_image.h |  26 ++++
- tools/Makefile        |   1 +
- tools/sunxi_toc1.c    | 318 ++++++++++++++++++++++++++++++++++++++++++
- 5 files changed, 347 insertions(+)
- create mode 100644 tools/sunxi_toc1.c
-
---- a/boot/image.c
-+++ b/boot/image.c
-@@ -180,6 +180,7 @@ static const table_entry_t uimage_type[]
- 	{	IH_TYPE_COPRO, "copro", "Coprocessor Image"},
- 	{	IH_TYPE_SUNXI_EGON, "sunxi_egon",  "Allwinner eGON Boot Image" },
- 	{	IH_TYPE_SUNXI_TOC0, "sunxi_toc0",  "Allwinner TOC0 Boot Image" },
-+	{	IH_TYPE_SUNXI_TOC1, "sunxi_toc1",  "Allwinner TOC1 Boot Image" },
- 	{	-1,		    "",		  "",			},
- };
- 
---- a/include/image.h
-+++ b/include/image.h
-@@ -229,6 +229,7 @@ enum image_type_t {
- 	IH_TYPE_COPRO,			/* Coprocessor Image for remoteproc*/
- 	IH_TYPE_SUNXI_EGON,		/* Allwinner eGON Boot Image */
- 	IH_TYPE_SUNXI_TOC0,		/* Allwinner TOC0 Boot Image */
-+	IH_TYPE_SUNXI_TOC1,		/* Allwinner TOC1 Boot Image */
- 
- 	IH_TYPE_COUNT,			/* Number of image types */
- };
---- a/include/sunxi_image.h
-+++ b/include/sunxi_image.h
-@@ -116,4 +116,30 @@ struct __packed toc0_item_info {
- #define TOC0_ITEM_INFO_NAME_KEY		0x00010303
- #define TOC0_ITEM_INFO_END		"IIE;"
- 
-+struct __packed toc1_main_info {
-+	uint8_t name[16];
-+	__le32  magic;
-+	__le32  checksum;
-+	__le32  serial;
-+	__le32  status;
-+	__le32  num_items;
-+	__le32  length;
-+	__le32	major_version;
-+	__le32	minor_version;
-+	__le32	reserved[3];
-+	uint8_t end[4];
-+};
-+
-+struct __packed toc1_item_info {
-+	uint8_t name[64];
-+	__le32  offset;
-+	__le32  length;
-+	__le32  encryption;
-+	__le32  type;
-+	__le32  load_addr;
-+	__le32  index;
-+	__le32	reserved[69];
-+	uint8_t end[4];
-+};
-+
- #endif
---- a/tools/Makefile
-+++ b/tools/Makefile
-@@ -132,6 +132,7 @@ dumpimage-mkimage-objs := aisimage.o \
- 			$(ROCKCHIP_OBS) \
- 			socfpgaimage.o \
- 			sunxi_egon.o \
-+			sunxi_toc1.o \
- 			lib/crc16-ccitt.o \
- 			lib/hash-checksum.o \
- 			lib/sha1.o \
---- /dev/null
-+++ b/tools/sunxi_toc1.c
-@@ -0,0 +1,318 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2018 Arm Ltd.
-+ * (C) Copyright 2020-2021 Samuel Holland <samuel@sholland.org>
-+ */
-+
-+#include <assert.h>
-+#include <stdint.h>
-+#include <stdio.h>
-+#include <stdlib.h>
-+#include <string.h>
-+
-+#include <image.h>
-+#include <sunxi_image.h>
-+
-+#include "imagetool.h"
-+#include "mkimage.h"
-+
-+#define SECTOR_SIZE			512
-+
-+struct item_desc {
-+	const char	*name;
-+	const char	*file;
-+	unsigned long	addr;
-+	long		length;
-+};
-+
-+static uint32_t toc1_header_length(uint32_t num_items)
-+{
-+	return ALIGN(sizeof(struct toc1_main_info) +
-+		     sizeof(struct toc1_item_info) * num_items, SECTOR_SIZE);
-+}
-+
-+static int toc1_parse_cfg(const char *file, struct item_desc **desc,
-+			  uint32_t *main_length, uint32_t *num_items)
-+{
-+	struct item_desc *descs = NULL;
-+	int ret = EXIT_FAILURE;
-+	FILE *cfg, *fp = NULL;
-+	uint32_t ndescs = 0;
-+	char *line = NULL;
-+	size_t len = 0;
-+
-+	*desc = NULL;
-+	*main_length = 0;
-+	*num_items = 0;
-+
-+	cfg = fopen(file, "r");
-+	if (!cfg)
-+		return ret;
-+
-+	while (getline(&line, &len, cfg) > 0) {
-+		char *end, *s;
-+
-+		if (line[0] == '[') {
-+			s = line + 1;
-+			end = strchr(s, ']');
-+			if (!end || end[1] != '\n')
-+				goto err;
-+			end[0] = '\0';
-+
-+			ndescs++;
-+			descs = reallocarray(descs, ndescs, sizeof(*descs));
-+			if (!descs)
-+				goto err;
-+
-+			descs[ndescs - 1].name = strdup(s);
-+		} else if (line[0] != '#' && line[0] != '\n') {
-+			s = strchr(line, '=');
-+			if (!s)
-+				goto err;
-+			while ((++s)[0] == ' ')
-+				;
-+			end = strchr(s, '\n');
-+			if (!end)
-+				goto err;
-+			end[0] = '\0';
-+
-+			if (!strncmp(line, "file", strlen("file"))) {
-+				fp = fopen(s, "rb");
-+				if (!fp)
-+					goto err;
-+				if (fseek(fp, 0, SEEK_END) < 0)
-+					goto err;
-+				descs[ndescs - 1].file = strdup(s);
-+				descs[ndescs - 1].length = ftell(fp);
-+				*main_length += ALIGN(descs[ndescs - 1].length,
-+						      SECTOR_SIZE);
-+				fclose(fp);
-+				fp = NULL;
-+			} else if (!strncmp(line, "addr", strlen("addr"))) {
-+				descs[ndescs - 1].addr = strtoul(s, NULL, 0);
-+			} else {
-+				goto err;
-+			}
-+		}
-+	}
-+
-+	*desc = descs;
-+	*main_length += toc1_header_length(ndescs);
-+	*num_items = ndescs;
-+
-+	ret = EXIT_SUCCESS;
-+
-+err:
-+	if (fp)
-+		fclose(fp);
-+	if (ret)
-+		free(descs);
-+	free(line);
-+	fclose(cfg);
-+
-+	return ret;
-+}
-+
-+static int toc1_create(uint8_t *buf, uint32_t len,
-+		       const struct item_desc *desc, uint32_t num_items)
-+{
-+	struct toc1_main_info *main = (void *)buf;
-+	struct toc1_item_info *item = (void *)(main + 1);
-+	uint32_t item_offset, item_length;
-+	uint32_t *buf32 = (void *)buf;
-+	int ret = EXIT_FAILURE;
-+	uint32_t checksum = 0;
-+	FILE *fp = NULL;
-+	int i;
-+
-+	/* Create the main TOC1 header. */
-+	main->magic	= cpu_to_le32(TOC0_MAIN_INFO_MAGIC);
-+	main->checksum	= cpu_to_le32(BROM_STAMP_VALUE);
-+	main->num_items	= cpu_to_le32(num_items);
-+	memcpy(main->end, TOC0_MAIN_INFO_END, sizeof(main->end));
-+
-+	item_offset = 0;
-+	item_length = toc1_header_length(num_items);
-+
-+	for (i = 0; i < num_items; ++i, ++item, ++desc) {
-+		item_offset = item_offset + item_length;
-+		item_length = desc->length;
-+
-+		/* Create the item header. */
-+		memcpy(item->name, desc->name,
-+		       strnlen(desc->name, sizeof(item->name)));
-+		item->offset = cpu_to_le32(item_offset);
-+		item->length = cpu_to_le32(item_length);
-+		item->load_addr = cpu_to_le32(desc->addr);
-+		memcpy(item->end, TOC0_ITEM_INFO_END, sizeof(item->end));
-+
-+		/* Read in the data. */
-+		fp = fopen(desc->file, "rb");
-+		if (!fp)
-+			goto err;
-+		if (!fread(buf + item_offset, item_length, 1, fp))
-+			goto err;
-+		fclose(fp);
-+		fp = NULL;
-+
-+		/* Pad the sectors with 0xff to be flash-friendly. */
-+		item_offset = item_offset + item_length;
-+		item_length = ALIGN(item_offset, SECTOR_SIZE) - item_offset;
-+		memset(buf + item_offset, 0xff, item_length);
-+	}
-+
-+	/* Fill in the total padded file length. */
-+	item_offset = item_offset + item_length;
-+	main->length = cpu_to_le32(item_offset);
-+
-+	/* Verify enough space was provided when creating the image. */
-+	assert(len >= item_offset);
-+
-+	/* Calculate the checksum. Yes, it's that simple. */
-+	for (i = 0; i < item_offset / 4; ++i)
-+		checksum += le32_to_cpu(buf32[i]);
-+	main->checksum = cpu_to_le32(checksum);
-+
-+	ret = EXIT_SUCCESS;
-+
-+err:
-+	if (fp)
-+		fclose(fp);
-+
-+	return ret;
-+}
-+
-+static int toc1_verify(const uint8_t *buf, uint32_t len)
-+{
-+	const struct toc1_main_info *main = (void *)buf;
-+	const struct toc1_item_info *item = (void *)(main + 1);
-+	uint32_t checksum = BROM_STAMP_VALUE;
-+	uint32_t main_length, num_items;
-+	uint32_t *buf32 = (void *)buf;
-+	int ret = EXIT_FAILURE;
-+	int i;
-+
-+	num_items   = le32_to_cpu(main->num_items);
-+	main_length = le32_to_cpu(main->length);
-+
-+	if (len < main_length || main_length < toc1_header_length(num_items))
-+		goto err;
-+
-+	/* Verify the main header. */
-+	if (le32_to_cpu(main->magic) != TOC0_MAIN_INFO_MAGIC)
-+		goto err;
-+	/* Verify the checksum without modifying the buffer. */
-+	for (i = 0; i < main_length / 4; ++i)
-+		checksum += le32_to_cpu(buf32[i]);
-+	if (checksum != 2 * le32_to_cpu(main->checksum))
-+		goto err;
-+	/* The length must be at least 512 byte aligned. */
-+	if (main_length % SECTOR_SIZE)
-+		goto err;
-+	if (memcmp(main->end, TOC0_MAIN_INFO_END, sizeof(main->end)))
-+		goto err;
-+
-+	/* Verify each item header. */
-+	for (i = 0; i < num_items; ++i, ++item)
-+		if (memcmp(item->end, TOC0_ITEM_INFO_END, sizeof(item->end)))
-+			goto err;
-+
-+	ret = EXIT_SUCCESS;
-+
-+err:
-+	return ret;
-+}
-+
-+static int toc1_check_params(struct image_tool_params *params)
-+{
-+	if (!params->dflag)
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static int toc1_verify_header(unsigned char *buf, int image_size,
-+			      struct image_tool_params *params)
-+{
-+	return toc1_verify(buf, image_size);
-+}
-+
-+static void toc1_print_header(const void *buf)
-+{
-+	const struct toc1_main_info *main = buf;
-+	const struct toc1_item_info *item = (void *)(main + 1);
-+	uint32_t head_length, main_length, num_items;
-+	uint32_t item_offset, item_length, item_addr;
-+	int i;
-+
-+	num_items   = le32_to_cpu(main->num_items);
-+	head_length = sizeof(*main) + num_items * sizeof(*item);
-+	main_length = le32_to_cpu(main->length);
-+
-+	printf("Allwinner TOC1 Image\n"
-+	       "Size: %d bytes\n"
-+	       "Contents: %d items\n"
-+	       " 00000000:%08x Headers\n",
-+	       main_length, num_items, head_length);
-+
-+	for (i = 0; i < num_items; ++i, ++item) {
-+		item_offset = le32_to_cpu(item->offset);
-+		item_length = le32_to_cpu(item->length);
-+		item_addr   = le32_to_cpu(item->load_addr);
-+
-+		printf(" %08x:%08x => %08x %s\n",
-+		       item_offset, item_length, item_addr, item->name);
-+	}
-+}
-+
-+static void toc1_set_header(void *buf, struct stat *sbuf, int ifd,
-+			    struct image_tool_params *params)
-+{
-+	/* Image is already written below. */
-+}
-+
-+static int toc1_check_image_type(uint8_t type)
-+{
-+	return type == IH_TYPE_SUNXI_TOC1 ? 0 : 1;
-+}
-+
-+static int toc1_vrec_header(struct image_tool_params *params,
-+			    struct image_type_params *tparams)
-+{
-+	uint32_t main_length, num_items;
-+	struct item_desc *desc;
-+	int ret;
-+
-+	/* This "header" contains the entire image. */
-+	params->skipcpy = 1;
-+
-+	ret = toc1_parse_cfg(params->datafile, &desc, &main_length, &num_items);
-+	if (ret)
-+		exit(ret);
-+
-+	tparams->header_size = main_length;
-+	tparams->hdr = calloc(tparams->header_size, 1);
-+	if (!tparams->hdr)
-+		exit(ret);
-+
-+	ret = toc1_create(tparams->hdr, tparams->header_size, desc, num_items);
-+	if (ret)
-+		exit(ret);
-+
-+	return 0;
-+}
-+
-+U_BOOT_IMAGE_TYPE(
-+	sunxi_toc1,
-+	"Allwinner TOC1 Boot Image support",
-+	0,
-+	NULL,
-+	toc1_check_params,
-+	toc1_verify_header,
-+	toc1_print_header,
-+	toc1_set_header,
-+	NULL,
-+	toc1_check_image_type,
-+	NULL,
-+	toc1_vrec_header
-+);

package/boot/uboot-d1/patches/0034-phy-sun4i-usb-Do-not-drive-VBUS-with-external-VBUS-p.patch

@@ -1,33 +0,0 @@
-From 79f7d883d980beea9989d06f9fba4fcc0430176a Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Thu, 14 Jul 2022 22:14:38 -0500
-Subject: [PATCH 34/90] phy: sun4i-usb: Do not drive VBUS with external VBUS
- present
-
-It is possible to use host-side USB with externally-provided VBUS. For
-example, some USB OTG cables have an extra power input which powers
-both the board and the USB peripheral.
-
-To support this setup, skip enabling the VBUS switch/regulator if VBUS
-voltage is already present. This behavior matches the Linux PHY driver.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/phy/allwinner/phy-sun4i-usb.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/phy/allwinner/phy-sun4i-usb.c
-+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
-@@ -220,6 +220,12 @@ static int sun4i_usb_phy_power_on(struct
- 		initial_usb_scan_delay = 0;
- 	}
- 
-+	/* For phy0 only turn on Vbus if we don't have an ext. Vbus */
-+	if (phy->id == 0 && sun4i_usb_phy_vbus_detect(phy)) {
-+		dev_warn(phy->dev, "External vbus detected, not enabling our own vbus\n");
-+		return 0;
-+	}
-+
- 	if (usb_phy->vbus) {
- 		ret = regulator_set_enable(usb_phy->vbus, true);
- 		if (ret && ret != -ENOSYS)

package/boot/uboot-d1/patches/0034-sunxi-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch

@@ -0,0 +1,38 @@
+From 11b7f4963a4e87ca2c71a8e9c9767b82b024508b Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sun, 22 Jan 2023 12:19:10 -0600
+Subject: [PATCH 36/68] sunxi: Enable SPL FIT loading for 32-bit SoCs
+
+Now that 32-bit SoCs can load U-Boot proper (and possibly other
+firmware) from a FIT, use this method by default. SPL_FIT_IMAGE_TINY is
+required to stay within the 24 or 32 KiB SPL size limit on early SoCs;
+for consistency, enable it everywhere.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/arm/Kconfig   | 1 +
+ common/spl/Kconfig | 3 +--
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/board/sunxi/Kconfig
++++ b/board/sunxi/Kconfig
+@@ -35,6 +35,7 @@ config BOARD_SUNXI
+ 	imply SPL_GPIO
+ 	imply SPL_LIBCOMMON_SUPPORT
+ 	imply SPL_LIBGENERIC_SUPPORT
++	imply SPL_LOAD_FIT
+ 	imply SPL_MMC if MMC
+ 	imply SPL_POWER
+ 	imply SPL_SERIAL
+--- a/common/spl/Kconfig
++++ b/common/spl/Kconfig
+@@ -562,8 +562,7 @@ config SYS_MMCSD_RAW_MODE_EMMC_BOOT_PART
+ config SPL_FIT_IMAGE_TINY
+ 	bool "Remove functionality from SPL FIT loading to reduce size"
+ 	depends on SPL_FIT
+-	default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
+-	default y if ARCH_IMX8M || ARCH_IMX9
++	default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI
+ 	help
+ 	  Enable this to reduce the size of the FIT image loading code
+ 	  in SPL, if space for the SPL binary is very tight.

package/boot/uboot-d1/patches/0035-mtd-nand-sunxi-Pass-the-device-to-the-init-function.patch

@@ -1,163 +0,0 @@
-From 4bc5cec5361dd6a2ae3bd044c79a4b5227bb9627 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Mon, 16 May 2022 00:47:32 -0500
-Subject: [PATCH 35/90] mtd: nand: sunxi: Pass the device to the init function
-
-This more closely matches the U-Boot driver to the Linux version.
-
-Series-to: sunxi
-
-Cover-letter:
-mtd: nand: sunxi: Convert to devicetree and the driver model
-This series converts the sunxi NAND driver to get its resources (clocks,
-resets, pins) from the devicetree, and probe using the driver model.
-
-In addition to the immediate cleanup, this allows backporting more
-patches (bugfixes, newer SoC support) from the Linux driver.
-END
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- drivers/mtd/nand/raw/sunxi_nand.c | 39 ++++++++++++++++---------------
- 1 file changed, 20 insertions(+), 19 deletions(-)
-
---- a/drivers/mtd/nand/raw/sunxi_nand.c
-+++ b/drivers/mtd/nand/raw/sunxi_nand.c
-@@ -1604,7 +1604,8 @@ static int sunxi_nand_ecc_init(struct mt
- 	return 0;
- }
- 
--static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum)
-+static int sunxi_nand_chip_init(struct udevice *dev, struct sunxi_nfc *nfc,
-+				ofnode np, int devnum)
- {
- 	const struct nand_sdr_timings *timings;
- 	struct sunxi_nand_chip *chip;
-@@ -1620,7 +1621,7 @@ static int sunxi_nand_chip_init(ofnode n
- 
- 	nsels /= sizeof(u32);
- 	if (!nsels || nsels > 8) {
--		dev_err(nfc->dev, "invalid reg property size\n");
-+		dev_err(dev, "invalid reg property size\n");
- 		return -EINVAL;
- 	}
- 
-@@ -1628,7 +1629,7 @@ static int sunxi_nand_chip_init(ofnode n
- 		       (nsels * sizeof(struct sunxi_nand_chip_sel)),
- 		       GFP_KERNEL);
- 	if (!chip) {
--		dev_err(nfc->dev, "could not allocate chip\n");
-+		dev_err(dev, "could not allocate chip\n");
- 		return -ENOMEM;
- 	}
- 
-@@ -1638,19 +1639,19 @@ static int sunxi_nand_chip_init(ofnode n
- 	for (i = 0; i < nsels; i++) {
- 		ret = ofnode_read_u32_index(np, "reg", i, &tmp);
- 		if (ret) {
--			dev_err(nfc->dev, "could not retrieve reg property: %d\n",
-+			dev_err(dev, "could not retrieve reg property: %d\n",
- 				ret);
- 			return ret;
- 		}
- 
- 		if (tmp > NFC_MAX_CS) {
--			dev_err(nfc->dev,
-+			dev_err(dev,
- 				"invalid reg value: %u (max CS = 7)\n", tmp);
- 			return -EINVAL;
- 		}
- 
- 		if (test_and_set_bit(tmp, &nfc->assigned_cs)) {
--			dev_err(nfc->dev, "CS %d already assigned\n", tmp);
-+			dev_err(dev, "CS %d already assigned\n", tmp);
- 			return -EINVAL;
- 		}
- 
-@@ -1661,9 +1662,9 @@ static int sunxi_nand_chip_init(ofnode n
- 			chip->sels[i].rb.type = RB_NATIVE;
- 			chip->sels[i].rb.info.nativeid = tmp;
- 		} else {
--			ret = gpio_request_by_name_nodev(np, "rb-gpios", i,
--							 &chip->sels[i].rb.info.gpio,
--							 GPIOD_IS_IN);
-+			ret = gpio_request_by_name(dev, "rb-gpios", i,
-+						   &chip->sels[i].rb.info.gpio,
-+						   GPIOD_IS_IN);
- 			if (ret)
- 				chip->sels[i].rb.type = RB_GPIO;
- 			else
-@@ -1674,7 +1675,7 @@ static int sunxi_nand_chip_init(ofnode n
- 	timings = onfi_async_timing_mode_to_sdr_timings(0);
- 	if (IS_ERR(timings)) {
- 		ret = PTR_ERR(timings);
--		dev_err(nfc->dev,
-+		dev_err(dev,
- 			"could not retrieve timings for ONFI mode 0: %d\n",
- 			ret);
- 		return ret;
-@@ -1682,7 +1683,7 @@ static int sunxi_nand_chip_init(ofnode n
- 
- 	ret = sunxi_nand_chip_set_timings(nfc, chip, timings);
- 	if (ret) {
--		dev_err(nfc->dev, "could not configure chip timings: %d\n", ret);
-+		dev_err(dev, "could not configure chip timings: %d\n", ret);
- 		return ret;
- 	}
- 
-@@ -1717,25 +1718,25 @@ static int sunxi_nand_chip_init(ofnode n
- 
- 	ret = sunxi_nand_chip_init_timings(nfc, chip);
- 	if (ret) {
--		dev_err(nfc->dev, "could not configure chip timings: %d\n", ret);
-+		dev_err(dev, "could not configure chip timings: %d\n", ret);
- 		return ret;
- 	}
- 
- 	ret = sunxi_nand_ecc_init(mtd, &nand->ecc);
- 	if (ret) {
--		dev_err(nfc->dev, "ECC init failed: %d\n", ret);
-+		dev_err(dev, "ECC init failed: %d\n", ret);
- 		return ret;
- 	}
- 
- 	ret = nand_scan_tail(mtd);
- 	if (ret) {
--		dev_err(nfc->dev, "nand_scan_tail failed: %d\n", ret);
-+		dev_err(dev, "nand_scan_tail failed: %d\n", ret);
- 		return ret;
- 	}
- 
- 	ret = nand_register(devnum, mtd);
- 	if (ret) {
--		dev_err(nfc->dev, "failed to register mtd device: %d\n", ret);
-+		dev_err(dev, "failed to register mtd device: %d\n", ret);
- 		return ret;
- 	}
- 
-@@ -1744,13 +1745,13 @@ static int sunxi_nand_chip_init(ofnode n
- 	return 0;
- }
- 
--static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc)
-+static int sunxi_nand_chips_init(struct udevice *dev, struct sunxi_nfc *nfc)
- {
- 	ofnode nand_np;
- 	int ret, i = 0;
- 
--	ofnode_for_each_subnode(nand_np, node) {
--		ret = sunxi_nand_chip_init(nand_np, nfc, i++);
-+	dev_for_each_subnode(nand_np, dev) {
-+		ret = sunxi_nand_chip_init(dev, nfc, nand_np, i++);
- 		if (ret)
- 			return ret;
- 	}
-@@ -1802,7 +1803,7 @@ static int sunxi_nand_probe(struct udevi
- 	if (ret)
- 		return ret;
- 
--	ret = sunxi_nand_chips_init(dev_ofnode(dev), nfc);
-+	ret = sunxi_nand_chips_init(dev, nfc);
- 	if (ret) {
- 		dev_err(dev, "failed to init nand chips\n");
- 		return ret;

package/boot/uboot-d1/patches/0035-power-regulator-Add-a-driver-for-the-AXP-PMIC-drivev.patch

@@ -1,60 +1,65 @@
-From 25434a394705d2de92c50981e31347db4074204a Mon Sep 17 00:00:00 2001
+From 967499870f79fb2f0cfa006186d44ba1330eb2e2 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Thu, 26 Aug 2021 21:32:15 -0500
-Subject: [PATCH 07/90] power: regulator: Add a driver for the AXP PMIC
+Subject: [PATCH 43/68] power: regulator: Add a driver for the AXP PMIC
  drivevbus
 
-The first AXP regulator converted to use the regulator uclass is the
-drivevbus switch, since it is used by the USB PHY driver.
+AXP PMICs have a pin which can either report the USB VBUS state, or
+driving a regulator that supplies USB VBUS. Add a regulator driver for
+controlling this pin. The selection between input and output is done via
+the x-powers,drive-vbus-en pin on the PMIC (parent) node.
 
 Signed-off-by: Samuel Holland <samuel@sholland.org>
 ---
- drivers/power/regulator/Kconfig         | 14 ++++++
+ drivers/power/pmic/axp.c                |  1 +
+ drivers/power/regulator/Kconfig         |  7 +++
  drivers/power/regulator/Makefile        |  1 +
- drivers/power/regulator/axp_regulator.c | 58 +++++++++++++++++++++++++
- 3 files changed, 73 insertions(+)
- create mode 100644 drivers/power/regulator/axp_regulator.c
+ drivers/power/regulator/axp_drivevbus.c | 57 +++++++++++++++++++++++++
+ 4 files changed, 66 insertions(+)
+ create mode 100644 drivers/power/regulator/axp_drivevbus.c
 
+--- a/drivers/power/pmic/axp.c
++++ b/drivers/power/pmic/axp.c
+@@ -51,6 +51,7 @@ static const struct pmic_child_info axp_
+ 	{ "cldo",	"axp_regulator" },
+ 	{ "dc",		"axp_regulator" },
+ 	{ "dldo",	"axp_regulator" },
++	{ "drivevbus",	"axp_drivevbus" },
+ 	{ "eldo",	"axp_regulator" },
+ 	{ "fldo",	"axp_regulator" },
+ 	{ "ldo",	"axp_regulator" },
 --- a/drivers/power/regulator/Kconfig
 +++ b/drivers/power/regulator/Kconfig
-@@ -43,6 +43,20 @@ config REGULATOR_AS3722
- 	  but does not yet support change voltages. Currently this must be
- 	  done using direct register writes to the PMIC.
+@@ -57,6 +57,13 @@ config SPL_REGULATOR_AXP
+ 	  Enable support in SPL for the regulators (DCDCs, LDOs) in the
+ 	  X-Powers AXP152, AXP2xx, and AXP8xx PMICs.
  
-+config REGULATOR_AXP
-+	bool "Enable driver for X-Powers AXP PMIC regulators"
++config REGULATOR_AXP_DRIVEVBUS
++	bool "Enable driver for X-Powers AXP PMIC drivevbus"
 +	depends on DM_REGULATOR && PMIC_AXP
 +	help
-+	  Enable support for the regulators (DCDCs, LDOs) in the
-+	  X-Powers AXP152, AXP2xx, and AXP8xx PMICs.
-+
-+config SPL_REGULATOR_AXP
-+	bool "Enable driver for X-Powers AXP PMIC regulators in SPL"
-+	depends on SPL_DM_REGULATOR && SPL_PMIC_AXP
-+	help
-+	  Enable support in SPL for the regulators (DCDCs, LDOs) in the
-+	  X-Powers AXP152, AXP2xx, and AXP8xx PMICs.
++	  Enable support for sensing or driving the USB VBUS on
++	  X-Powers AXP2xx and AXP8xx PMICs.
 +
  config REGULATOR_AXP_USB_POWER
  	bool "Enable driver for X-Powers AXP PMIC USB power supply"
  	depends on DM_REGULATOR && PMIC_AXP
 --- a/drivers/power/regulator/Makefile
 +++ b/drivers/power/regulator/Makefile
-@@ -7,6 +7,7 @@
- obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
+@@ -8,6 +8,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR) += reg
  obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
  obj-$(CONFIG_REGULATOR_AS3722)	+= as3722_regulator.o
-+obj-$(CONFIG_$(SPL_)REGULATOR_AXP) += axp_regulator.o
+ obj-$(CONFIG_$(SPL_)REGULATOR_AXP) += axp_regulator.o
++obj-$(CONFIG_$(SPL_)REGULATOR_AXP_DRIVEVBUS) += axp_drivevbus.o
  obj-$(CONFIG_$(SPL_)REGULATOR_AXP_USB_POWER) += axp_usb_power.o
  obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o
- obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
+ obj-$(CONFIG_$(SPL_)DM_REGULATOR_MAX77663) += max77663_regulator.o
 --- /dev/null
-+++ b/drivers/power/regulator/axp_regulator.c
-@@ -0,0 +1,58 @@
++++ b/drivers/power/regulator/axp_drivevbus.c
+@@ -0,0 +1,57 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +
 +#include <dm.h>
-+#include <errno.h>
 +#include <power/pmic.h>
 +#include <power/regulator.h>
 +

package/boot/uboot-d1/patches/0036-sunxi-Enable-PHY_SUN4I_USB-by-default-for-new-SoCs.patch

@@ -1,120 +0,0 @@
-From b13140a914199dcdd80331fef6f33d47f008f1b4 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Fri, 5 Aug 2022 23:40:22 -0500
-Subject: [PATCH 36/90] sunxi: Enable PHY_SUN4I_USB by default for new SoCs
-
-With one exception (sun9i), all sunxi SoCs released to date use variants
-of the same USB PHY. Instead of requiring each new SoC to duplicate the
-PHY driver selection, enable it by default.
-
-Series-to: Andre Przywara <andre.przywara@arm.com>
-Series-to: Jagan Teki <jagan@amarulasolutions.com>
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- arch/arm/mach-sunxi/Kconfig   | 11 -----------
- drivers/phy/allwinner/Kconfig |  3 ++-
- 2 files changed, 2 insertions(+), 12 deletions(-)
-
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -162,7 +162,6 @@ endif
- 
- config MACH_SUNXI_H3_H5
- 	bool
--	select PHY_SUN4I_USB
- 	select SUNXI_DE2
- 	select SUNXI_DRAM_DW
- 	select SUNXI_DRAM_DW_32BIT
-@@ -191,7 +190,6 @@ config MACH_SUNIV
- config MACH_SUN4I
- 	bool "sun4i (Allwinner A10)"
- 	select CPU_V7A
--	select PHY_SUN4I_USB
- 	select DRAM_SUN4I
- 	select SUNXI_GEN_SUN4I
- 	select SUPPORT_SPL
-@@ -202,7 +200,6 @@ config MACH_SUN5I
- 	bool "sun5i (Allwinner A13)"
- 	select CPU_V7A
- 	select DRAM_SUN4I
--	select PHY_SUN4I_USB
- 	select SUNXI_GEN_SUN4I
- 	select SUPPORT_SPL
- 	imply SPL_SYS_I2C_LEGACY
-@@ -216,7 +213,6 @@ config MACH_SUN6I
- 	select ARCH_SUPPORT_PSCI
- 	select SPL_ARMV7_SET_CORTEX_SMPEN
- 	select DRAM_SUN6I
--	select PHY_SUN4I_USB
- 	select SPL_I2C
- 	select SUN6I_PRCM
- 	select SUNXI_GEN_SUN6I
-@@ -232,7 +228,6 @@ config MACH_SUN7I
- 	select ARCH_SUPPORT_PSCI
- 	select SPL_ARMV7_SET_CORTEX_SMPEN
- 	select DRAM_SUN4I
--	select PHY_SUN4I_USB
- 	select SUNXI_GEN_SUN4I
- 	select SUPPORT_SPL
- 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
-@@ -246,7 +241,6 @@ config MACH_SUN8I_A23
- 	select CPU_V7_HAS_VIRT
- 	select ARCH_SUPPORT_PSCI
- 	select DRAM_SUN8I_A23
--	select PHY_SUN4I_USB
- 	select SPL_I2C
- 	select SUNXI_GEN_SUN6I
- 	select SUPPORT_SPL
-@@ -260,7 +254,6 @@ config MACH_SUN8I_A33
- 	select CPU_V7_HAS_VIRT
- 	select ARCH_SUPPORT_PSCI
- 	select DRAM_SUN8I_A33
--	select PHY_SUN4I_USB
- 	select SPL_I2C
- 	select SUNXI_GEN_SUN6I
- 	select SUPPORT_SPL
-@@ -271,7 +264,6 @@ config MACH_SUN8I_A83T
- 	bool "sun8i (Allwinner A83T)"
- 	select CPU_V7A
- 	select DRAM_SUN8I_A83T
--	select PHY_SUN4I_USB
- 	select SPL_I2C
- 	select SUNXI_GEN_SUN6I
- 	select MMC_SUNXI_HAS_NEW_MODE
-@@ -299,7 +291,6 @@ config MACH_SUN8I_R40
- 	select SUPPORT_SPL
- 	select SUNXI_DRAM_DW
- 	select SUNXI_DRAM_DW_32BIT
--	select PHY_SUN4I_USB
- 	imply SPL_SYS_I2C_LEGACY
- 
- config MACH_SUN8I_V3S
-@@ -327,7 +318,6 @@ config MACH_SUN9I
- config MACH_SUN50I
- 	bool "sun50i (Allwinner A64)"
- 	select ARM64
--	select PHY_SUN4I_USB
- 	select SUN6I_PRCM
- 	select SUNXI_DE2
- 	select SUNXI_GEN_SUN6I
-@@ -350,7 +340,6 @@ config MACH_SUN50I_H5
- config MACH_SUN50I_H6
- 	bool "sun50i (Allwinner H6)"
- 	select ARM64
--	select PHY_SUN4I_USB
- 	select DRAM_SUN50I_H6
- 	select SUN50I_GEN_H6
- 
---- a/drivers/phy/allwinner/Kconfig
-+++ b/drivers/phy/allwinner/Kconfig
-@@ -3,7 +3,8 @@
- #
- config PHY_SUN4I_USB
- 	bool "Allwinner Sun4I USB PHY driver"
--	depends on ARCH_SUNXI
-+	depends on ARCH_SUNXI && !MACH_SUN9I
-+	default y
- 	select DM_REGULATOR
- 	select PHY
- 	help

package/boot/uboot-d1/patches/0036-sunxi-Enable-PMIC-drivevbus-regulator-support-for-US.patch

@@ -0,0 +1,222 @@
+From 1c71f4fd1b2b3d7145780dc5516e4d6f38539b1c Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Thu, 26 Aug 2021 21:05:33 -0500
+Subject: [PATCH 44/68] sunxi: Enable PMIC drivevbus regulator support for USB
+ supplies
+
+On many boards, the USB ports are powered by the PMIC's "drivevbus"
+regulator. In preparation for switching the USB PHY driver to use the
+regulator uclass instead of a virtual GPIO pin, ensure these boards
+have AXP PMIC regulator support enabled.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ configs/A33-OLinuXino_defconfig           | 1 +
+ configs/Cubieboard4_defconfig             | 1 +
+ configs/Cubietruck_plus_defconfig         | 1 +
+ configs/MSI_Primo81_defconfig             | 1 +
+ configs/Merrii_A80_Optimus_defconfig      | 1 +
+ configs/Sinovoip_BPI_M3_defconfig         | 1 +
+ configs/Yones_Toptech_BS1078_V2_defconfig | 1 +
+ configs/colorfly_e708_q1_defconfig        | 1 +
+ configs/ga10h_v1_1_defconfig              | 1 +
+ configs/gt90h_v4_defconfig                | 1 +
+ configs/iNet_D978_rev2_defconfig          | 1 +
+ configs/inet86dz_defconfig                | 1 +
+ configs/inet_q972_defconfig               | 1 +
+ configs/polaroid_mid2407pxe03_defconfig   | 1 +
+ configs/polaroid_mid2809pxe04_defconfig   | 1 +
+ configs/q8_a23_tablet_800x480_defconfig   | 1 +
+ configs/q8_a33_tablet_1024x600_defconfig  | 1 +
+ configs/q8_a33_tablet_800x480_defconfig   | 1 +
+ configs/tbs_a711_defconfig                | 1 +
+ 19 files changed, 19 insertions(+)
+
+--- a/configs/A33-OLinuXino_defconfig
++++ b/configs/A33-OLinuXino_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0
+ CONFIG_VIDEO_LCD_BL_EN="PB2"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DCDC1_VOLT=3300
+ CONFIG_USB_MUSB_HOST=y
+--- a/configs/Cubieboard4_defconfig
++++ b/configs/Cubieboard4_defconfig
+@@ -11,5 +11,6 @@ CONFIG_USB1_VBUS_PIN="PH14"
+ CONFIG_USB3_VBUS_PIN="PH15"
+ CONFIG_AXP_GPIO=y
+ CONFIG_SYS_I2C_SUN8I_RSB=y
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP809_POWER=y
+--- a/configs/Cubietruck_plus_defconfig
++++ b/configs/Cubietruck_plus_defconfig
+@@ -21,6 +21,7 @@ CONFIG_SYS_I2C_SLAVE=0x7f
+ CONFIG_SYS_I2C_SPEED=400000
+ CONFIG_PHY_REALTEK=y
+ CONFIG_SUN8I_EMAC=y
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO3_VOLT=2500
+ CONFIG_AXP_DLDO4_VOLT=3300
+--- a/configs/MSI_Primo81_defconfig
++++ b/configs/MSI_Primo81_defconfig
+@@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25"
+ CONFIG_VIDEO_LCD_BL_PWM="PH13"
+ CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+--- a/configs/Merrii_A80_Optimus_defconfig
++++ b/configs/Merrii_A80_Optimus_defconfig
+@@ -11,5 +11,6 @@ CONFIG_USB1_VBUS_PIN="PH4"
+ CONFIG_USB3_VBUS_PIN="PH5"
+ CONFIG_AXP_GPIO=y
+ CONFIG_SYS_I2C_SUN8I_RSB=y
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP809_POWER=y
+--- a/configs/Sinovoip_BPI_M3_defconfig
++++ b/configs/Sinovoip_BPI_M3_defconfig
+@@ -17,6 +17,7 @@ CONFIG_CONSOLE_MUX=y
+ CONFIG_PHY_REALTEK=y
+ CONFIG_SUN8I_EMAC=y
+ CONFIG_INITIAL_USB_SCAN_DELAY=500
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DCDC5_VOLT=1200
+ CONFIG_AXP_DLDO3_VOLT=3300
+--- a/configs/Yones_Toptech_BS1078_V2_defconfig
++++ b/configs/Yones_Toptech_BS1078_V2_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25"
+ CONFIG_VIDEO_LCD_BL_PWM="PH13"
+ CONFIG_VIDEO_LCD_PANEL_LVDS=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_USB_MUSB_HOST=y
+--- a/configs/colorfly_e708_q1_defconfig
++++ b/configs/colorfly_e708_q1_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25"
+ CONFIG_VIDEO_LCD_BL_PWM="PH13"
+ CONFIG_VIDEO_LCD_PANEL_LVDS=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_AXP_DLDO2_VOLT=1800
+--- a/configs/ga10h_v1_1_defconfig
++++ b/configs/ga10h_v1_1_defconfig
+@@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ CONFIG_VIDEO_LCD_PANEL_LVDS=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/gt90h_v4_defconfig
++++ b/configs/gt90h_v4_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/iNet_D978_rev2_defconfig
++++ b/configs/iNet_D978_rev2_defconfig
+@@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ CONFIG_VIDEO_LCD_PANEL_LVDS=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+--- a/configs/inet86dz_defconfig
++++ b/configs/inet86dz_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/inet_q972_defconfig
++++ b/configs/inet_q972_defconfig
+@@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0
+ CONFIG_VIDEO_LCD_BL_EN="PA25"
+ CONFIG_VIDEO_LCD_BL_PWM="PH13"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_USB_EHCI_HCD=y
+--- a/configs/polaroid_mid2407pxe03_defconfig
++++ b/configs/polaroid_mid2407pxe03_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/polaroid_mid2809pxe04_defconfig
++++ b/configs/polaroid_mid2809pxe04_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/q8_a23_tablet_800x480_defconfig
++++ b/configs/q8_a23_tablet_800x480_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/q8_a33_tablet_1024x600_defconfig
++++ b/configs/q8_a33_tablet_1024x600_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/q8_a33_tablet_800x480_defconfig
++++ b/configs/q8_a33_tablet_800x480_defconfig
+@@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH7"
+ CONFIG_VIDEO_LCD_BL_EN="PH6"
+ CONFIG_VIDEO_LCD_BL_PWM="PH0"
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DLDO1_VOLT=3300
+ CONFIG_CONS_INDEX=5
+--- a/configs/tbs_a711_defconfig
++++ b/configs/tbs_a711_defconfig
+@@ -13,6 +13,7 @@ CONFIG_USB0_ID_DET="PH11"
+ CONFIG_AXP_GPIO=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
++CONFIG_REGULATOR_AXP_DRIVEVBUS=y
+ CONFIG_REGULATOR_AXP_USB_POWER=y
+ CONFIG_AXP_DCDC5_VOLT=1200
+ CONFIG_USB_EHCI_HCD=y

package/boot/uboot-d1/patches/0037-phy-sun4i-usb-Control-supplies-via-the-regulator-ucl.patch

@@ -1,7 +1,7 @@
-From e8fb34342dfb79cd2059431dd1a0f03202a244ca Mon Sep 17 00:00:00 2001
+From 5ea3e3e37ec14a1d90a6764879c38d80f4ffe008 Mon Sep 17 00:00:00 2001
 From: Samuel Holland <samuel@sholland.org>
 Date: Thu, 26 Aug 2021 22:11:37 -0500
-Subject: [PATCH 09/90] phy: sun4i-usb: Control USB supplies via regulator
+Subject: [PATCH 45/68] phy: sun4i-usb: Control supplies via the regulator
  uclass
 
 The device tree binding for the PHY provides VBUS supplies as regulator
@@ -53,7 +53,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
 
 --- a/drivers/phy/allwinner/phy-sun4i-usb.c
 +++ b/drivers/phy/allwinner/phy-sun4i-usb.c
-@@ -97,27 +97,22 @@ struct sun4i_usb_phy_cfg {
+@@ -87,27 +87,22 @@ struct sun4i_usb_phy_cfg {
  };
  
  struct sun4i_usb_phy_info {
@@ -81,7 +81,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  		.gpio_vbus_det = NULL,
  		.gpio_id_det = NULL,
  	},
-@@ -125,11 +120,11 @@ struct sun4i_usb_phy_info {
+@@ -115,12 +110,12 @@ struct sun4i_usb_phy_info {
  
  struct sun4i_usb_phy_plat {
  	void __iomem *pmu;
@@ -89,12 +89,13 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  	struct gpio_desc gpio_vbus_det;
  	struct gpio_desc gpio_id_det;
  	struct clk clocks;
+ 	struct clk clk2;
  	struct reset_ctl resets;
 +	struct udevice *vbus;
  	int id;
  };
  
-@@ -218,14 +213,18 @@ static int sun4i_usb_phy_power_on(struct
+@@ -209,6 +204,7 @@ static int sun4i_usb_phy_power_on(struct
  {
  	struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev);
  	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
@@ -102,7 +103,8 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  
  	if (initial_usb_scan_delay) {
  		mdelay(initial_usb_scan_delay);
- 		initial_usb_scan_delay = 0;
+@@ -221,8 +217,11 @@ static int sun4i_usb_phy_power_on(struct
+ 		return 0;
  	}
  
 -	if (dm_gpio_is_valid(&usb_phy->gpio_vbus))
@@ -115,7 +117,7 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  
  	return 0;
  }
-@@ -234,9 +233,13 @@ static int sun4i_usb_phy_power_off(struc
+@@ -231,9 +230,13 @@ static int sun4i_usb_phy_power_off(struc
  {
  	struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev);
  	struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id];
@@ -131,12 +133,12 @@ Signed-off-by: Samuel Holland <samuel@sholland.org>
  
  	return 0;
  }
-@@ -450,22 +453,16 @@ static int sun4i_usb_phy_probe(struct ud
+@@ -483,22 +486,16 @@ static int sun4i_usb_phy_probe(struct ud
  	for (i = 0; i < data->cfg->num_phys; i++) {
  		struct sun4i_usb_phy_plat *phy = &plat[i];
  		struct sun4i_usb_phy_info *info = &phy_info[i];
 -		char name[16];
-+		char name[20];
++		char name[32];
  
  		if (data->cfg->missing_phys & BIT(i))
  			continue;

package/boot/uboot-d1/patches/0037-sunxi-psci-Add-support-for-H3-CPU-0-hotplug.patch

@@ -1,183 +0,0 @@
-From d11c5971f60d482c05f807c24f3ccd37cf7d0f70 Mon Sep 17 00:00:00 2001
-From: Samuel Holland <samuel@sholland.org>
-Date: Sat, 9 Oct 2021 17:12:57 -0500
-Subject: [PATCH 37/90] sunxi: psci: Add support for H3 CPU 0 hotplug
-
-Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
-written, resuming CPU 0 requires using the "Super Standby" code path in
-the BROM instead of the hotplug path. This path requires jumping to an
-eGON image in SRAM.
-
-Add support to the build system to generate this eGON image and include
-it in the FIT, and add code to direct the BROM to its location in SRAM.
-
-Since the Super Standby code path in the BROM initializes the CPU and
-AHB1 clocks to 24 MHz, those registers need to be restored after control
-passes back to U-Boot. Furthermore, because the BROM lowers the AHB1
-clock divider to /1 before switching to the lower-frequency parent,
-PLL_PERIPH0 must be bypassed to prevent AHB1 from temporarily running at
-600 MHz. Otherwise, this locks up the SoC.
-
-Signed-off-by: Samuel Holland <samuel@sholland.org>
----
- Makefile                        | 17 +++++++++++++++++
- arch/arm/cpu/armv7/sunxi/psci.c | 31 +++++++++++++++++++++++++++++++
- arch/arm/dts/sunxi-u-boot.dtsi  | 23 ++++++++++++++++++++++-
- include/configs/sun8i.h         |  4 ++++
- 4 files changed, 74 insertions(+), 1 deletion(-)
-
---- a/Makefile
-+++ b/Makefile
-@@ -1013,6 +1013,23 @@ INPUTS-y += u-boot.img
- endif
- endif
- 
-+ifeq ($(CONFIG_MACH_SUN8I_H3)$(CONFIG_ARMV7_PSCI),yy)
-+INPUTS-$(CONFIG_ARMV7_PSCI) += u-boot-resume.img
-+
-+MKIMAGEFLAGS_u-boot-resume.img := -B 0x400 -T sunxi_egon
-+
-+u-boot-resume.img: u-boot-resume.bin
-+	$(call if_changed,mkimage)
-+
-+OBJCOPYFLAGS_u-boot-resume.bin := -O binary
-+
-+u-boot-resume.bin: u-boot-resume.o
-+	$(call if_changed,objcopy)
-+
-+u-boot-resume.S: u-boot
-+	@sed -En 's/(0x[[:xdigit:]]+) +psci_cpu_entry/ldr pc, =\1/p' $<.map > $@
-+endif
-+
- INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \
- 	$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
- 	$(if $(CONFIG_TPL_X86_16BIT_INIT),tpl/u-boot-tpl.bin)
---- a/arch/arm/cpu/armv7/sunxi/psci.c
-+++ b/arch/arm/cpu/armv7/sunxi/psci.c
-@@ -10,6 +10,7 @@
- #include <common.h>
- #include <asm/cache.h>
- 
-+#include <asm/arch/clock.h>
- #include <asm/arch/cpu.h>
- #include <asm/arch/cpucfg.h>
- #include <asm/arch/prcm.h>
-@@ -141,6 +142,13 @@ static void __secure sunxi_set_entry_add
- 		(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
- 
- 	writel((u32)entry, &cpucfg->priv0);
-+
-+#ifdef CONFIG_MACH_SUN8I_H3
-+	/* Redirect CPU 0 to the secure monitor via the resume shim. */
-+	writel(0x16aaefe8, &cpucfg->super_standy_flag);
-+	writel(0xaa16efe8, &cpucfg->super_standy_flag);
-+	writel(SUNXI_RESUME_BASE, &cpucfg->priv1);
-+#endif
- }
- #endif
- 
-@@ -255,9 +263,12 @@ out:
- int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc,
- 			 u32 context_id)
- {
-+	struct sunxi_ccm_reg *ccu = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- 	struct sunxi_cpucfg_reg *cpucfg =
- 		(struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE;
- 	u32 cpu = (mpidr & 0x3);
-+	u32 cpu_clk;
-+	u32 bus_clk;
- 
- 	/* store target PC and context id */
- 	psci_save(cpu, pc, context_id);
-@@ -274,12 +285,32 @@ int __secure psci_cpu_on(u32 __always_un
- 	/* Lock CPU (Disable external debug access) */
- 	clrbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu));
- 
-+	if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) {
-+		/* Save registers that will be clobbered by the BROM. */
-+		cpu_clk = readl(&ccu->cpu_axi_cfg);
-+		bus_clk = readl(&ccu->ahb1_apb1_div);
-+
-+		/* Bypass PLL_PERIPH0 so AHB1 frequency does not spike. */
-+		setbits_le32(&ccu->pll6_cfg, BIT(25));
-+	}
-+
- 	/* Power up target CPU */
- 	sunxi_cpu_set_power(cpu, true);
- 
- 	/* De-assert reset on target CPU */
- 	writel(BIT(1) | BIT(0), &cpucfg->cpu[cpu].rst);
- 
-+	if (IS_ENABLED(CONFIG_MACH_SUN8I_H3) && cpu == 0) {
-+		/* Spin until the BROM has clobbered the clock registers. */
-+		while (readl(&ccu->ahb1_apb1_div) != 0x00001100);
-+
-+		/* Restore the registers and turn off PLL_PERIPH0 bypass. */
-+		writel(cpu_clk, &ccu->cpu_axi_cfg);
-+		writel(bus_clk, &ccu->ahb1_apb1_div);
-+
-+		clrbits_le32(&ccu->pll6_cfg, BIT(25));
-+	}
-+
- 	/* Unlock CPU (Disable external debug access) */
- 	setbits_le32(&cpucfg->dbg_ctrl1, BIT(cpu));
- 
---- a/arch/arm/dts/sunxi-u-boot.dtsi
-+++ b/arch/arm/dts/sunxi-u-boot.dtsi
-@@ -6,7 +6,11 @@
- #define ARCH "arm"
- #endif
- 
--#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5)
-+#if defined(CONFIG_MACH_SUN8I_H3)
-+#ifdef CONFIG_ARMV7_PSCI
-+#define RESUME_ADDR	SUNXI_RESUME_BASE
-+#endif
-+#elif defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN50I_H5)
- #define BL31_ADDR	0x00044000
- #define SCP_ADDR	0x00050000
- #elif defined(CONFIG_MACH_SUN50I_H6)
-@@ -78,6 +82,20 @@
- 				};
- #endif
- 
-+#ifdef RESUME_ADDR
-+				resume {
-+					description = "Super Standby resume image";
-+					type = "standalone";
-+					arch = ARCH;
-+					compression = "none";
-+					load = <RESUME_ADDR>;
-+
-+					blob-ext {
-+						filename = "u-boot-resume.img";
-+					};
-+				};
-+#endif
-+
- #ifdef SCP_ADDR
- 				scp {
- 					description = "SCP firmware";
-@@ -111,6 +129,9 @@
- 					firmware = "uboot";
- #endif
- 					loadables =
-+#ifdef RESUME_ADDR
-+						    "resume",
-+#endif
- #ifdef SCP_ADDR
- 						    "scp",
- #endif
---- a/include/configs/sun8i.h
-+++ b/include/configs/sun8i.h
-@@ -8,6 +8,10 @@
- #ifndef __CONFIG_H
- #define __CONFIG_H
- 
-+#define SUNXI_RESUME_BASE		(CONFIG_ARMV7_SECURE_BASE + \
-+					 CONFIG_ARMV7_SECURE_MAX_SIZE)
-+#define SUNXI_RESUME_SIZE		1024
-+
- #include <configs/sunxi-common.h>
- 
- #endif /* __CONFIG_H */