mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2026-01-28 02:27:18 +01:00
realtek: add support for ZyXEL GS1920-24HPv1
The GS1920-24HPv1 is a switch with 24 copper ports and 4 combo SFP/copper
ports and PoE on the first 24 ports.
Specifications:
---------------
* SoC: Realtek RTL8292M
* Flash: 16 MiB SPI flash
* RAM: 128 MiB
* Ethernet: 24x 10/100/1000 Mbps
* Buttons: 1x "Reset" button
* UART: 1x serial header, standard DCE pinout (Tx = 2, Rx = 3, Gnd = 5);
9600 baud, 8n1, +- 5.6V logic levels
* SFP: 4 combo copper/SFP ports
* PoE: 24x
* Fans: ADT7468 fan controller
Works:
------
- (24) RJ-45 ethernet ports
- Switch functions
- Buttons
- LEDs (partial support, the wrong LEDs light up)
- Manual fan control
Not yet enabled:
----------------
- PoE (requires patches to realtek-poe to support i2c)
- Combo ports (link is up, but no data is transferred)
Fans:
-----
After boot, the fans are running in full speed mode. You can interact
with the fan controller at /sys/class/hwmon/
Installation:
-------------
This device uses ZyNOS instead of Linux, this makes installation a bit
more cumbersome. Serial console is required!
1. Set the switch to boot from the first image. This step is crucial,
it will fail to boot if this is not set properly.
2. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
3. Load the OpenWrt initramfs image via XMODEM. You need to obtain an
unlock code, based on your MAC address, first. See the excellent write
up at https://www.ixo.de/info/zyxel_uclinux/ for details. Replace
unlock_code in the commands below by the code obtained.
After running ATBA5, the terminal needs to be closed and re-opened
with 115200 baud. This speeds up the file transfer significantly!
The file length in bytes need to be given instead of file_length below.
You also need an XMODEM upload utility like "lrzsz-sx -X" to transfer
the file. Start the XMODEM upload after running the ATUPxxxx command:
> ATEN1,unlock_code
> ATBA5
> ATUP80100000,file_length
> ATGO80100000
4. Wait for OpenWrt to boot. Once this is done, transfer the loader binary
and the sysupgrade image to "/tmp" using scp.
5. Install OpenWrt permanently by running the following two commands on
the switch (over SSH):
> mtd write /tmp/loader.bin loader
> mtd write /tmp/sysupgrade.bin firmware
6. Reboot the switch and enjoy OpenWrt.
NB: You do not need to touch the loader binary unless it's recommended.
The loader is not part of a regular sysupgrade file and will be left
untouched. The boot loader only checks if the loader is valid to be
able to boot.
Recovery/ Return to stock:
--------------------------
Just spam the "u" key during (or "z" for 9600 baud) during memory testing
to trigger a recovery XMODEM upload at 115200 baud. A standard OEM upgrade
image works properly.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/20439
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Andreas Böhler
Hauke Mehrtens
parent
1c63273d8d
commit
2a55846bf4
3 changed files with 344 additions and 0 deletions
317
target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
Normal file
317
target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
Normal file
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@ -0,0 +1,317 @@
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/dts-v1/;
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#include "rtl839x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "zyxel,gs1920-24hp-v1", "realtek,rtl8392-soc";
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model = "Zyxel GS1920-24HPv1";
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aliases {
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led-boot = &led_sys;
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led-failsafe = &led_sys;
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led-running = &led_sys;
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led-upgrade = &led_sys;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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chosen {
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stdout-path = "serial0:9600n8";
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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compatible = "gpio-leds";
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led_sys: sys {
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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};
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alarm {
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gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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function = LED_FUNCTION_FAULT;
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color = <LED_COLOR_ID_RED>;
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};
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locator {
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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function = LED_FUNCTION_INDICATOR;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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mode {
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label = "reset";
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gpios = <&gpio1 32 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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/* i2c of the lower left SFP cage: port 25 */
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i2c0: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp0: sfp-p25 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 23 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of the upper left SFP cage: port 26 */
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i2c1: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp1: sfp-p26 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 17 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of the lower right SFP cage: port 27 */
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i2c2: i2c-gpio-2 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp2: sfp-p27 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c2>;
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los-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 13 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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/* i2c of the upper right SFP cage: port 28 */
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i2c3: i2c-gpio-3 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sfp3: sfp-p28 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c3>;
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los-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 20 GPIO_ACTIVE_LOW>;
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tx-fault-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
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};
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/* i2c for hwmon/PoE */
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i2c4: i2c-gpio-4 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio0 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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adt7468: adt7468@2e {
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compatible = "adi,adt7468";
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reg = <0x2e>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootbase";
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reg = <0x0 0x20000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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factory_macaddr: macaddr@1fff8 {
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reg = <0x1fff8 0x6>;
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};
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};
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};
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partition@20000 {
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label = "reserved";
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reg = <0x20000 0x90000>;
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read-only;
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};
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partition@b0000 {
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reg = <0xb0000 0xf50000>;
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label = "factory";
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "loader";
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reg = <0x0 0x10000>;
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};
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partition@10000 {
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label = "firmware";
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reg = <0x10000 0xf40000>;
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compatible = "openwrt,uimage", "denx,uimage";
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};
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};
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};
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};
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};
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ðernet0 {
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nvmem-cells = <&factory_macaddr>;
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nvmem-cell-names = "mac-address";
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};
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&mdio_bus0 {
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/* External phy RTL8218B #1 */
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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/* External phy RTL8218B #2 */
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EXTERNAL_PHY(8)
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EXTERNAL_PHY(9)
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EXTERNAL_PHY(10)
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EXTERNAL_PHY(11)
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EXTERNAL_PHY(12)
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EXTERNAL_PHY(13)
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EXTERNAL_PHY(14)
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EXTERNAL_PHY(15)
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/* External phy RTL8218B #3 */
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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/* External phy RTL8214FC #1 */
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EXTERNAL_SFP_PHY_FULL(48, 0)
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EXTERNAL_SFP_PHY_FULL(49, 1)
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EXTERNAL_SFP_PHY_FULL(50, 2)
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EXTERNAL_SFP_PHY_FULL(51, 3)
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};
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&switch0 {
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ports {
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SWITCH_PORT_SDS(0, 1, 0, qsgmii)
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SWITCH_PORT_SDS(1, 2, 0, qsgmii)
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SWITCH_PORT_SDS(2, 3, 0, qsgmii)
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SWITCH_PORT_SDS(3, 4, 0, qsgmii)
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SWITCH_PORT_SDS(4, 5, 1, qsgmii)
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SWITCH_PORT_SDS(5, 6, 1, qsgmii)
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SWITCH_PORT_SDS(6, 7, 1, qsgmii)
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SWITCH_PORT_SDS(7, 8, 1, qsgmii)
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SWITCH_PORT_SDS(8, 9, 2, qsgmii)
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SWITCH_PORT_SDS(9, 10, 2, qsgmii)
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SWITCH_PORT_SDS(10, 11, 2, qsgmii)
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SWITCH_PORT_SDS(11, 12, 2, qsgmii)
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SWITCH_PORT_SDS(12, 13, 3, qsgmii)
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SWITCH_PORT_SDS(13, 14, 3, qsgmii)
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SWITCH_PORT_SDS(14, 15, 3, qsgmii)
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SWITCH_PORT_SDS(15, 16, 3, qsgmii)
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SWITCH_PORT_SDS(16, 17, 4, qsgmii)
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SWITCH_PORT_SDS(17, 18, 4, qsgmii)
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SWITCH_PORT_SDS(18, 19, 4, qsgmii)
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SWITCH_PORT_SDS(19, 20, 4, qsgmii)
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SWITCH_PORT_SDS(20, 21, 5, qsgmii)
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SWITCH_PORT_SDS(21, 22, 5, qsgmii)
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SWITCH_PORT_SDS(22, 23, 5, qsgmii)
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SWITCH_PORT_SDS(23, 24, 5, qsgmii)
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SWITCH_PORT_SDS(48, 25, 12, qsgmii)
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SWITCH_PORT_SDS(49, 26, 12, qsgmii)
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SWITCH_PORT_SDS(50, 27, 12, qsgmii)
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SWITCH_PORT_SDS(51, 28, 12, qsgmii)
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/* CPU-Port */
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port@52 {
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ethernet = <ðernet0>;
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reg = <52>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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&mdio_aux {
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status = "okay";
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gpio1: expander@3 {
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compatible = "realtek,rtl8231";
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reg = <3>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&gpio1 0 0 37>;
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led-controller {
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compatible = "realtek,rtl8231-leds";
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status = "disabled";
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};
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};
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};
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@ -97,3 +97,29 @@ define Device/zyxel_gs1900-48-a1
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SUPPORTED_DEVICES += zyxel,gs1900-48
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endef
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TARGET_DEVICES += zyxel_gs1900-48-a1
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define Device/zyxel_gs1920-24hp-v1
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FLASH_ADDR := 0xb40c0000
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ARTIFACTS := loader.bin
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ARTIFACT/loader.bin := \
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rt-loader-standalone | \
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zynsig
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SOC := rtl8392
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IMAGE_SIZE := 12144k
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DEVICE_VENDOR := Zyxel
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DEVICE_MODEL := GS1920-24HP
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DEVICE_VARIANT := v1
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DEVICE_PACKAGES := \
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kmod-hwmon-lm85
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KERNEL := \
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kernel-bin | \
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append-dtb | \
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rt-compress | \
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uImage lzma
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KERNEL_INITRAMFS := \
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kernel-bin | \
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append-dtb | \
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rt-compress | \
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rt-loader
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endef
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TARGET_DEVICES += zyxel_gs1920-24hp-v1
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@ -110,6 +110,7 @@ CONFIG_HZ_PERIODIC=y
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CONFIG_I2C=y
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CONFIG_I2C_ALGOBIT=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_GPIO=y
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CONFIG_I2C_GPIO_SHARED=y
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# CONFIG_I2C_MUX_RTL9300 is not set
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