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uboot-mediatek: update to v2026.01

Browse source 
Remove upstreamed patches:
  100-08-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch [1]
  101-01-mtd-spinand-add-support-for-FORESEE-F35SQA002G.patch [2]
  101-02-mtd-spinand-add-support-for-FORESEE-F35SQA001G.patch [3]
  110-mtd-spi-nand-add-support-for-FudanMicro-FM25S01A.patch [4]

Some SPI-NAND driver macro definitions and function parameters have
been changed in the latest release[3]. Hence we also had to rework
the related local patches to follow the upstream changes.

Tested on MT7981 SPI-NOR/EMMC.

[1] 21c1098cf4
[2] 2a0f8e7da0
[3] 2cbdd3e449
[4] 8b984b5a39

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
[daniel@makrotopia.org: tested MT7622 SNAND and SPI-NOR]
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Shiji Yang 2026-01-06 20:50:06 +08:00 • committed by Daniel Golle
parent 8dec72061f
commit b94de14baf
26 changed files with 163 additions and 545 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
package/boot/uboot-mediatek/Makefile
View file

@ -1,8 +1,8 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2025.10
PKG_HASH:=b4f032848e56cc8f213ad59f9132c084dbbb632bc29176d024e58220e0efdf4a
PKG_VERSION:=2026.01
PKG_HASH:=b60d5865cefdbc75da8da4156c56c458e00de75a49b80c1a2e58a96e30ad0d54
PKG_BUILD_DEPENDS:=!(TARGET_ramips||TARGET_mediatek_mt7623):arm-trusted-firmware-tools/host
UBOOT_USE_INTREE_DTC:=1

2
package/boot/uboot-mediatek/patches/100-01-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch
View file

@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -246,6 +246,8 @@ config SYS_MAX_FLASH_BANKS_DETECT
@@ -248,6 +248,8 @@ config SYS_MAX_FLASH_BANKS_DETECT
to reduce the effective number of flash bank, between 0 and
CONFIG_SYS_MAX_FLASH_BANKS

2
package/boot/uboot-mediatek/patches/100-04-mtd-add-core-facility-code-of-NMBM.patch
View file

@ -31,7 +31,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -276,6 +276,8 @@ config SYS_NAND_MAX_CHIPS
@@ -278,6 +278,8 @@ config SYS_NAND_MAX_CHIPS
help
The maximum number of NAND chips per device to be supported.

2
package/boot/uboot-mediatek/patches/100-06-common-board_r-add-support-to-initialize-NMBM-after-.patch
View file

@ -34,7 +34,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
#if defined(CONFIG_CMD_ONENAND)
/* go init the NAND */
static int initr_onenand(void)
@@ -713,6 +727,9 @@ static void initcall_run_r(void)
@@ -706,6 +720,9 @@ static void initcall_run_r(void)
#if CONFIG_IS_ENABLED(CMD_ONENAND)
INITCALL(initr_onenand);
#endif

4
package/boot/uboot-mediatek/patches/100-07-cmd-add-nmbm-command.patch
View file

@ -15,7 +15,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1548,6 +1548,12 @@ config CMD_NAND_WATCH
@@ -1601,6 +1601,12 @@ config CMD_NAND_WATCH
endif # CMD_NAND
@ -30,7 +30,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
depends on NVME
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -131,6 +131,7 @@ obj-y += legacy-mtd-utils.o
@@ -132,6 +132,7 @@ obj-y += legacy-mtd-utils.o
endif
obj-$(CONFIG_CMD_MUX) += mux.o
obj-$(CONFIG_CMD_NAND) += nand.o

80
package/boot/uboot-mediatek/patches/100-08-cmd-mtd-add-markbad-subcommand-for-NMBM-testing.patch
View file

@ -1,80 +0,0 @@
From f180eb4beec9b0cf19e8c2418d2b01404797cb26 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Mon, 25 Jul 2022 11:22:57 +0800
Subject: [PATCH 08/30] cmd: mtd: add markbad subcommand for NMBM testing
This patch adds:
* Mark bad block on lower mtd device and erase on upper mtd
device, which will trigger remapping:
$ mtd markbad spi-nand0 0x20000 (mark block1 as bad)
$ mtd erase nmbm0 0x20000 0x20000 (let nmbm detect the bad block and remap it)
* Clear bad block mark through:
$ mtd erase.dontskipbad spi-nand0 0x20000 0x20000
(After cleaning bad block mark, we need to rebuild nmbm manage table.)
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
---
cmd/mtd.c | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -741,6 +741,42 @@ out_put_mtd:
return CMD_RET_SUCCESS;
}
+static int do_mtd_markbad(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ struct mtd_info *mtd;
+ loff_t off;
+ int ret;
+
+ if (argc < 3)
+ return CMD_RET_USAGE;
+
+ mtd = get_mtd_by_name(argv[1]);
+ if (IS_ERR(mtd) || !mtd)
+ return CMD_RET_FAILURE;
+
+ if (!mtd_can_have_bb(mtd)) {
+ printf("Only NAND-based devices can have mark blocks\n");
+ goto out_put_mtd;
+ }
+
+ off = simple_strtoull(argv[2], NULL, 0);
+
+ ret = mtd_block_markbad(mtd, off);
+ if (!ret) {
+ printf("MTD device %s block at 0x%08llx marked bad\n",
+ mtd->name, off);
+ } else {
+ printf("MTD device %s block at 0x%08llx mark bad failed\n",
+ mtd->name, off);
+ }
+
+out_put_mtd:
+ put_mtd_device(mtd);
+
+ return CMD_RET_SUCCESS;
+}
+
#ifdef CONFIG_AUTO_COMPLETE
static int mtd_name_complete(int argc, char *const argv[], char last_char,
int maxv, char *cmdv[])
@@ -788,6 +824,7 @@ U_BOOT_LONGHELP(mtd,
"\n"
"Specific functions:\n"
"mtd bad <name>\n"
+ "mtd markbad <name> <off>\n"
#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
"mtd otpread <name> [u|f] <off> <size>\n"
"mtd otpwrite <name> <off> <hex string>\n"
@@ -828,4 +865,6 @@ U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils"
U_BOOT_SUBCMD_MKENT_COMPLETE(erase, 4, 0, do_mtd_erase,
mtd_name_complete),
U_BOOT_SUBCMD_MKENT_COMPLETE(bad, 2, 1, do_mtd_bad,
+ mtd_name_complete),
+ U_BOOT_SUBCMD_MKENT_COMPLETE(markbad, 3, 1, do_mtd_markbad,
mtd_name_complete));

4
package/boot/uboot-mediatek/patches/100-10-cmd-add-a-new-command-for-NAND-flash-debugging.patch
View file

@ -26,7 +26,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1548,6 +1548,14 @@ config CMD_NAND_WATCH
@@ -1601,6 +1601,14 @@ config CMD_NAND_WATCH
endif # CMD_NAND
@ -43,7 +43,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
bool "nmbm"
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -131,6 +131,7 @@ obj-y += legacy-mtd-utils.o
@@ -132,6 +132,7 @@ obj-y += legacy-mtd-utils.o
endif
obj-$(CONFIG_CMD_MUX) += mux.o
obj-$(CONFIG_CMD_NAND) += nand.o

6
package/boot/uboot-mediatek/patches/100-13-cmd-sf-add-support-to-read-flash-unique-ID.patch
View file

@ -12,7 +12,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -421,6 +421,14 @@ static int do_spi_protect(int argc, char
@@ -420,6 +420,14 @@ static int do_spi_protect(int argc, char
return ret == 0 ? 0 : 1;
}
@ -27,7 +27,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
enum {
STAGE_ERASE,
STAGE_CHECK,
@@ -615,6 +623,8 @@ static int do_spi_flash(struct cmd_tbl *
@@ -614,6 +622,8 @@ static int do_spi_flash(struct cmd_tbl *
ret = do_spi_flash_erase(argc, argv);
else if (IS_ENABLED(CONFIG_SPI_FLASH_LOCK) && strcmp(cmd, "protect") == 0)
ret = do_spi_protect(argc, argv);
@ -36,7 +36,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
else if (IS_ENABLED(CONFIG_CMD_SF_TEST) && !strcmp(cmd, "test"))
ret = do_spi_flash_test(argc, argv);
else
@@ -638,6 +648,7 @@ U_BOOT_LONGHELP(sf,
@@ -637,6 +647,7 @@ U_BOOT_LONGHELP(sf,
"sf update addr offset|partition len - erase and write `len' bytes from memory\n"
" at `addr' to flash at `offset'\n"
" or to start of mtd `partition'\n"

73
package/boot/uboot-mediatek/patches/100-19-mtd-spi-nand-add-more-spi-nand-chips.patch
View file

@ -11,29 +11,28 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/etron.c | 181 ++++++++++++++++++++++++++++++
drivers/mtd/nand/spi/gigadevice.c | 38 +++++++
drivers/mtd/nand/spi/winbond.c | 9 ++
include/linux/mtd/spinand.h | 1 +
6 files changed, 231 insertions(+)
create mode 100644 drivers/mtd/nand/spi/etron.c
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -2,4 +2,5 @@
spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
spinand-objs += toshiba.o winbond.o xtx.o
@@ -3,4 +3,5 @@
spinand-objs := core.o otp.o
spinand-objs += alliancememory.o ato.o esmt.o fmsh.o foresee.o gigadevice.o macronix.o
spinand-objs += micron.o paragon.o skyhigh.o toshiba.o winbond.o xtx.o
+spinand-objs += etron.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -826,6 +826,7 @@ static const struct nand_ops spinand_ops
};
static const struct spinand_manufacturer *spinand_manufacturers[] = {
@@ -1227,6 +1227,7 @@ static const struct spinand_manufacturer
&alliancememory_spinand_manufacturer,
&ato_spinand_manufacturer,
&esmt_c8_spinand_manufacturer,
+ &etron_spinand_manufacturer,
&fmsh_spinand_manufacturer,
&foresee_spinand_manufacturer,
&gigadevice_spinand_manufacturer,
&macronix_spinand_manufacturer,
&micron_spinand_manufacturer,
--- /dev/null
+++ b/drivers/mtd/nand/spi/etron.c
@@ -0,0 +1,181 @@
@ -55,20 +54,20 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+#define STATUS_ECC_LIMIT_BITFLIPS (3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+ SPINAND_PAGE_READ_FROM_CACHE_1S_4S_4S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_1S_2S_2S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_1S_1S_2S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+ SPINAND_PROG_LOAD_1S_1S_4S_OP(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD_1S_1S_1S_OP(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+ SPINAND_PROG_LOAD_1S_1S_4S_OP(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD_1S_1S_1S_OP(false, 0, NULL, 0));
+
+static int etron_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
@ -220,7 +219,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+};
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -284,7 +284,45 @@ static int gd5fxgq4ufxxg_ecc_get_status(
@@ -286,7 +286,45 @@ static int gd5fxgq4ufxxg_ecc_get_status(
return -EINVAL;
}
@ -266,31 +265,13 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
SPINAND_INFO("GD5F1GQ4xA",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf1),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -167,6 +167,15 @@ static const struct spinand_info winbond
&update_cache_variants),
0,
SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
+ SPINAND_INFO("W25N01KV",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
SPINAND_INFO("W25N02KV",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -244,6 +244,7 @@ struct spinand_manufacturer {
};
/* SPI NAND manufacturers */
@@ -361,6 +361,7 @@ struct spinand_manufacturer {
extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
extern const struct spinand_manufacturer ato_spinand_manufacturer;
extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
+extern const struct spinand_manufacturer etron_spinand_manufacturer;
extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
extern const struct spinand_manufacturer foresee_spinand_manufacturer;
extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
extern const struct spinand_manufacturer macronix_spinand_manufacturer;
extern const struct spinand_manufacturer micron_spinand_manufacturer;

122
package/boot/uboot-mediatek/patches/100-20-mtd-spi-nand-add-support-for-FudanMicro-chips.patch
View file

@ -7,63 +7,49 @@ Sdd support for FudanMicro SPI-NAND flashes
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/mtd/nand/spi/Makefile | 1 +
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/fudanmicro.c | 107 ++++++++++++++++++++++++++++++
include/linux/mtd/spinand.h | 1 +
4 files changed, 110 insertions(+)
create mode 100644 drivers/mtd/nand/spi/fudanmicro.c
drivers/mtd/nand/spi/fmsh.c | 78 +++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -3,4 +3,5 @@
spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
spinand-objs += toshiba.o winbond.o xtx.o
spinand-objs += etron.o
+spinand-objs += fudanmicro.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -827,6 +827,7 @@ static const struct nand_ops spinand_ops
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -6,13 +6,20 @@
*/
static const struct spinand_manufacturer *spinand_manufacturers[] = {
&etron_spinand_manufacturer,
+ &fudan_spinand_manufacturer,
&gigadevice_spinand_manufacturer,
&macronix_spinand_manufacturer,
&micron_spinand_manufacturer,
--- /dev/null
+++ b/drivers/mtd/nand/spi/fudanmicro.c
@@ -0,0 +1,107 @@
+#ifndef __UBOOT__
#ifndef __UBOOT__
+#include <malloc.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
#include <linux/device.h>
#include <linux/kernel.h>
#endif
+#include <linux/bitops.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_FUDAN 0xA1
+
#include <linux/mtd/spinand.h>
#define SPINAND_MFR_FMSH 0xA1
+#define FM25S01B_STATUS_ECC_MASK (7 << 4)
+#define STATUS_ECC_1_3_BITFLIPS (1 << 4)
+#define STATUS_ECC_4_6_BITFLIPS (3 << 4)
+#define STATUS_ECC_7_8_BITFLIPS (5 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
static SPINAND_OP_VARIANTS(read_cache_variants,
SPINAND_PAGE_READ_FROM_CACHE_1S_4S_4S_OP(0, 2, NULL, 0, 0),
SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
@@ -21,6 +28,12 @@ static SPINAND_OP_VARIANTS(read_cache_va
SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
+static SPINAND_OP_VARIANTS(read_cache_variants_s01b,
+ SPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_1S_1S_2S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));
+
static SPINAND_OP_VARIANTS(write_cache_variants,
SPINAND_PROG_LOAD_1S_1S_4S_OP(true, 0, NULL, 0),
SPINAND_PROG_LOAD_1S_1S_1S_OP(true, 0, NULL, 0));
@@ -47,11 +60,66 @@ static int fm25s01a_ooblayout_free(struc
return 0;
}
+static int fm25s01b_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
@ -88,6 +74,11 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+ return 0;
+}
+
static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
.ecc = fm25s01a_ooblayout_ecc,
.rfree = fm25s01a_ooblayout_free,
};
+static const struct mtd_ooblayout_ops fm25s01b_ooblayout = {
+ .ecc = fm25s01b_ooblayout_ecc,
+ .rfree = fm25s01b_ooblayout_free,
@ -119,36 +110,23 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+ return -EINVAL;
+}
+
+static const struct spinand_info fudan_spinand_table[] = {
+ SPINAND_INFO("FM25s01B",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
static const struct spinand_info fmsh_spinand_table[] = {
SPINAND_INFO("FM25S01A",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
@@ -62,6 +130,16 @@ static const struct spinand_info fmsh_sp
&update_cache_variants),
0,
SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
+ SPINAND_INFO("FM25S01B",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_s01b,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&fm25s01b_ooblayout,
+ fm25s01b_ecc_get_status)),
+};
+
+static const struct spinand_manufacturer_ops fudan_spinand_manuf_ops = {
+};
+
+const struct spinand_manufacturer fudan_spinand_manufacturer = {
+ .id = SPINAND_MFR_FUDAN,
+ .name = "FUDAN Micron",
+ .chips = fudan_spinand_table,
+ .nchips = ARRAY_SIZE(fudan_spinand_table),
+ .ops = &fudan_spinand_manuf_ops,
+};
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -245,6 +245,7 @@ struct spinand_manufacturer {
};
/* SPI NAND manufacturers */
extern const struct spinand_manufacturer etron_spinand_manufacturer;
+extern const struct spinand_manufacturer fudan_spinand_manufacturer;
extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
extern const struct spinand_manufacturer macronix_spinand_manufacturer;
extern const struct spinand_manufacturer micron_spinand_manufacturer;
static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {

69
package/boot/uboot-mediatek/patches/100-21-mtd-spi-nand-add-CASN-page-support.patch
View file

@ -51,9 +51,9 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+#include <linux/mtd/casn.h>
#include <linux/mtd/spinand.h>
#include <linux/printk.h>
#endif
@@ -496,6 +500,62 @@ static int spinand_lock_block(struct spi
return spinand_write_reg_op(spinand, REG_BLOCK_LOCK, lock);
#include <linux/delay.h>
@@ -229,6 +233,62 @@ static int spinand_cont_read_enable(stru
return spinand->set_cont_read(spinand, enable);
}
+static size_t eccsr_none_op(size_t val, size_t mask) { return val; }
@ -115,8 +115,8 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status)
{
struct nand_device *nand = spinand_to_nand(spinand);
@@ -865,6 +925,300 @@ static int spinand_manufacturer_match(st
return -ENOTSUPP;
@@ -1267,6 +1327,301 @@ static int spinand_manufacturer_match(st
return -EOPNOTSUPP;
}
+static u16 nanddev_crc16(u16 crc, u8 const *p, size_t len)
@ -381,12 +381,13 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+ if (ret)
+ goto finish;
+
+ ret = spinand_wait(spinand, &status);
+ ret = spinand_wait(spinand, SPINAND_READ_INITIAL_DELAY_US,
+ SPINAND_READ_POLL_DELAY_US, &status);
+ if (ret < 0)
+ goto finish;
+
+ op = (struct spi_mem_op) SPINAND_PAGE_READ_FROM_CACHE_OP(
+ false, 768, 1, (u8 *)casn, 256 * CASN_PAGE_V1_COPIES);
+ op = (struct spi_mem_op) SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(
+ 768, 1, (u8 *)casn, 256 * CASN_PAGE_V1_COPIES, 0);
+ ret = spi_mem_exec_op(spinand->slave, &op);
+ if (ret < 0)
+ goto finish;
@ -416,16 +417,16 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
static int spinand_id_detect(struct spinand_device *spinand)
{
u8 *id = spinand->id.data;
@@ -896,7 +1250,7 @@ static int spinand_id_detect(struct spin
static int spinand_manufacturer_init(struct spinand_device *spinand)
@@ -1300,7 +1655,7 @@ static int spinand_manufacturer_init(str
{
- if (spinand->manufacturer->ops->init)
+ if (!spinand->use_casn && spinand->manufacturer->ops->init)
return spinand->manufacturer->ops->init(spinand);
int ret;
return 0;
@@ -905,7 +1259,7 @@ static int spinand_manufacturer_init(str
- if (spinand->manufacturer->ops->init) {
+ if (!spinand->use_casn && spinand->manufacturer->ops->init) {
ret = spinand->manufacturer->ops->init(spinand);
if (ret)
return ret;
@@ -1318,7 +1673,7 @@ static int spinand_manufacturer_init(str
static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
{
/* Release manufacturer private data */
@ -434,7 +435,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
return spinand->manufacturer->ops->cleanup(spinand);
}
@@ -1026,37 +1380,455 @@ int spinand_match_and_init(struct spinan
@@ -1452,37 +1807,455 @@ int spinand_match_and_init(struct spinan
return -ENOTSUPP;
}
@ -901,7 +902,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+ return ret;
}
static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section,
static int spinand_init_flash(struct spinand_device *spinand)
--- /dev/null
+++ b/include/linux/mtd/casn.h
@@ -0,0 +1,191 @@
@ -1155,23 +1156,23 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+ SPI_MEM_OP_DATA_IN(casn_adv_ecc_status.status_nbytes, buf, 1))
+/* Macros for CASN end */
+
#define SPINAND_PAGE_READ_FROM_CACHE_OP(fast, addr, ndummy, buf, len) \
SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1), \
#define SPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(addr, ndummy, buf, len, freq) \
SPI_MEM_OP(SPI_MEM_OP_CMD(0x03, 1), \
SPI_MEM_OP_ADDR(2, addr, 1), \
@@ -295,6 +348,11 @@ struct spinand_ecc_info {
#define SPINAND_HAS_QE_BIT BIT(0)
#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
+#define SPINAND_SUP_CR BIT(2)
+#define SPINAND_SUP_ON_DIE_ECC BIT(3)
+#define SPINAND_SUP_LEGACY_ECC_STATUS BIT(4)
+#define SPINAND_SUP_ADV_ECC_STATUS BIT(5)
+#define SPINAND_ECC_PARITY_READABLE BIT(6)
@@ -416,6 +469,11 @@ struct spinand_ecc_info {
#define SPINAND_HAS_PROG_PLANE_SELECT_BIT BIT(2)
#define SPINAND_HAS_READ_PLANE_SELECT_BIT BIT(3)
#define SPINAND_NO_RAW_ACCESS BIT(4)
+#define SPINAND_SUP_CR BIT(5)
+#define SPINAND_SUP_ON_DIE_ECC BIT(6)
+#define SPINAND_SUP_LEGACY_ECC_STATUS BIT(7)
+#define SPINAND_SUP_ADV_ECC_STATUS BIT(8)
+#define SPINAND_ECC_PARITY_READABLE BIT(9)
/**
* struct spinand_info - Structure used to describe SPI NAND chips
@@ -366,6 +424,28 @@ struct spinand_info {
}
* struct spinand_otp_layout - structure to describe the SPI NAND OTP area
@@ -598,6 +656,28 @@ struct spinand_dirmap {
};
/**
+ * struct CASN_ADVECC - CASN's advanced ECC description
@ -1199,7 +1200,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* struct spinand_device - SPI NAND device instance
* @base: NAND device instance
* @slave: pointer to the SPI slave object
@@ -419,6 +499,23 @@ struct spinand_device {
@@ -666,6 +746,23 @@ struct spinand_device {
u8 *oobbuf;
u8 *scratchbuf;
const struct spinand_manufacturer *manufacturer;
@ -1221,5 +1222,5 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+ size_t (*eccsr_math_op[4])(size_t, size_t);
+
void *priv;
};
u8 last_wait_status;

148
package/boot/uboot-mediatek/patches/101-01-mtd-spinand-add-support-for-FORESEE-F35SQA002G.patch
View file

@ -1,148 +0,0 @@
From 49c8e854869d673df8452f24dfa8989cd0f615a8 Mon Sep 17 00:00:00 2001
From: Martin Kurbanov <mmkurbanov@salutedevices.com>
Date: Mon, 2 Oct 2023 17:04:58 +0300
Subject: [PATCH] mtd: spinand: add support for FORESEE F35SQA002G
Add support for FORESEE F35SQA002G SPI NAND.
Datasheet:
https://www.longsys.com/uploads/LM-00006FORESEEF35SQA002GDatasheet_1650183701.pdf
Signed-off-by: Martin Kurbanov <mmkurbanov@salutedevices.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20231002140458.147605-1-mmkurbanov@salutedevices.com
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/foresee.c | 95 ++++++++++++++++++++++++++++++++++
include/linux/mtd/spinand.h | 1 +
4 files changed, 98 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/spi/foresee.c
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
+spinand-objs := core.o esmt.o foresee.o gigadevice.o macronix.o micron.o paragon.o
spinand-objs += toshiba.o winbond.o xtx.o
spinand-objs += etron.o
spinand-objs += fudanmicro.o
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -895,6 +895,7 @@ static const struct spinand_manufacturer
&toshiba_spinand_manufacturer,
&winbond_spinand_manufacturer,
&esmt_c8_spinand_manufacturer,
+ &foresee_spinand_manufacturer,
&xtx_spinand_manufacturer,
};
--- /dev/null
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023, SberDevices. All Rights Reserved.
+ *
+ * Author: Martin Kurbanov <mmkurbanov@salutedevices.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_FORESEE 0xCD
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int f35sqa002g_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ return -ERANGE;
+}
+
+static int f35sqa002g_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ /* Reserve 2 bytes for the BBM. */
+ region->offset = 2;
+ region->length = 62;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops f35sqa002g_ooblayout = {
+ .ecc = f35sqa002g_ooblayout_ecc,
+ .rfree = f35sqa002g_ooblayout_free,
+};
+
+static int f35sqa002g_ecc_get_status(struct spinand_device *spinand, u8 status)
+{
+ switch (status & STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case STATUS_ECC_HAS_BITFLIPS:
+ return 1;
+
+ default:
+ break;
+ }
+
+ /* More than 1-bit error was detected in one or more sectors and
+ * cannot be corrected.
+ */
+ return -EBADMSG;
+}
+
+static const struct spinand_info foresee_spinand_table[] = {
+ SPINAND_INFO("F35SQA002G",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72, 0x72),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(1, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&f35sqa002g_ooblayout,
+ f35sqa002g_ecc_get_status)),
+};
+
+static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {
+};
+
+const struct spinand_manufacturer foresee_spinand_manufacturer = {
+ .id = SPINAND_MFR_FORESEE,
+ .name = "FORESEE",
+ .chips = foresee_spinand_table,
+ .nchips = ARRAY_SIZE(foresee_spinand_table),
+ .ops = &foresee_spinand_manuf_ops,
+};
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -306,6 +306,7 @@ extern const struct spinand_manufacturer
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
+extern const struct spinand_manufacturer foresee_spinand_manufacturer;
extern const struct spinand_manufacturer xtx_spinand_manufacturer;
/**

38
package/boot/uboot-mediatek/patches/101-02-mtd-spinand-add-support-for-FORESEE-F35SQA001G.patch
View file

@ -1,38 +0,0 @@
From ae461cde5c559675fc4c0ba351c7c31ace705f56 Mon Sep 17 00:00:00 2001
From: Bohdan Chubuk <chbgdn@gmail.com>
Date: Sun, 10 Nov 2024 22:50:47 +0200
Subject: [PATCH] mtd: spinand: add support for FORESEE F35SQA001G
Add support for FORESEE F35SQA001G SPI NAND.
Similar to F35SQA002G, but differs in capacity.
Datasheet:
- https://cdn.ozdisan.com/ETicaret_Dosya/704795_871495.pdf
Tested on Xiaomi AX3000T flashed with OpenWRT.
Signed-off-by: Bohdan Chubuk <chbgdn@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/nand/spi/foresee.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/mtd/nand/spi/foresee.c
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -81,6 +81,16 @@ static const struct spinand_info foresee
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&f35sqa002g_ooblayout,
f35sqa002g_ecc_get_status)),
+ SPINAND_INFO("F35SQA001G",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71, 0x71),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(1, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&f35sqa002g_ooblayout,
+ f35sqa002g_ecc_get_status)),
};
static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {

10
package/boot/uboot-mediatek/patches/101-03-mtd-spinand-fix-support-for-FORESEE.patch
View file

@ -7,13 +7,13 @@ Signed-off-by: Dim Fish <dimfish@gmail.com>
--- a/drivers/mtd/nand/spi/foresee.c
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -24,8 +24,8 @@ static SPINAND_OP_VARIANTS(write_cache_v
SPINAND_PROG_LOAD(true, 0, NULL, 0));
SPINAND_PROG_LOAD_1S_1S_1S_OP(true, 0, NULL, 0));
static SPINAND_OP_VARIANTS(update_cache_variants,
- SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
- SPINAND_PROG_LOAD(false, 0, NULL, 0));
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
- SPINAND_PROG_LOAD_1S_1S_4S_OP(false, 0, NULL, 0),
- SPINAND_PROG_LOAD_1S_1S_1S_OP(false, 0, NULL, 0));
+ SPINAND_PROG_LOAD_1S_1S_4S_OP(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD_1S_1S_1S_OP(true, 0, NULL, 0));
static int f35sqa002g_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)

34
package/boot/uboot-mediatek/patches/102-mtd-spinand-esmt-add-support-for-F50L1G41LC.patch
View file

@ -7,26 +7,26 @@ ID with support for the ESMT F50L1G41LC chip.
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -895,6 +895,7 @@ static const struct spinand_manufacturer
&toshiba_spinand_manufacturer,
&winbond_spinand_manufacturer,
@@ -1287,6 +1287,7 @@ static const struct spinand_manufacturer
&alliancememory_spinand_manufacturer,
&ato_spinand_manufacturer,
&esmt_c8_spinand_manufacturer,
+ &esmt_8c_spinand_manufacturer,
&etron_spinand_manufacturer,
&fmsh_spinand_manufacturer,
&foresee_spinand_manufacturer,
&xtx_spinand_manufacturer,
};
--- a/drivers/mtd/nand/spi/esmt.c
+++ b/drivers/mtd/nand/spi/esmt.c
@@ -13,6 +13,7 @@
@@ -17,6 +17,7 @@
/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
#define SPINAND_MFR_ESMT_C8 0xc8
+#define SPINAND_MFR_ESMT_8C 0x8c
static SPINAND_OP_VARIANTS(read_cache_variants,
SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
@@ -104,6 +105,18 @@ static const struct mtd_ooblayout_ops f5
.rfree = f50l1g41lb_ooblayout_free,
#define ESMT_F50L1G41LB_CFG_OTP_PROTECT BIT(7)
#define ESMT_F50L1G41LB_CFG_OTP_LOCK \
@@ -189,6 +190,18 @@ static const struct spinand_fact_otp_ops
.read = spinand_fact_otp_read,
};
+static const struct spinand_info esmt_8c_spinand_table[] = {
@ -43,8 +43,8 @@ ID with support for the ESMT F50L1G41LC chip.
+
static const struct spinand_info esmt_c8_spinand_table[] = {
SPINAND_INFO("F50L1G41LB",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
@@ -135,3 +148,11 @@ const struct spinand_manufacturer esmt_c
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
@@ -236,3 +249,11 @@ const struct spinand_manufacturer esmt_c
.nchips = ARRAY_SIZE(esmt_c8_spinand_table),
.ops = &esmt_spinand_manuf_ops,
};
@ -58,11 +58,11 @@ ID with support for the ESMT F50L1G41LC chip.
+};
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -306,6 +306,7 @@ extern const struct spinand_manufacturer
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
@@ -414,6 +414,7 @@ struct spinand_manufacturer {
extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
extern const struct spinand_manufacturer ato_spinand_manufacturer;
extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
+extern const struct spinand_manufacturer esmt_8c_spinand_manufacturer;
extern const struct spinand_manufacturer etron_spinand_manufacturer;
extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
extern const struct spinand_manufacturer foresee_spinand_manufacturer;
extern const struct spinand_manufacturer xtx_spinand_manufacturer;

2
package/boot/uboot-mediatek/patches/105-configs-add-usefull-stuff-to-mt7988-rfb.patch
View file

@ -265,7 +265,7 @@
CONFIG_HEXDUMP=y
--- a/arch/arm/dts/mt7988-rfb.dts
+++ b/arch/arm/dts/mt7988-rfb.dts
@@ -195,6 +195,23 @@
@@ -194,6 +194,23 @@
spi-max-frequency = <52000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;

4
package/boot/uboot-mediatek/patches/108-dts-arm64-mt7981-rfb-add-mtd-partitions.patch
View file

@ -1,6 +1,6 @@
--- a/arch/arm/dts/mt7981-rfb.dts
+++ b/arch/arm/dts/mt7981-rfb.dts
@@ -153,6 +153,37 @@
@@ -152,6 +152,37 @@
spi-max-frequency = <52000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
@ -38,7 +38,7 @@
};
};
@@ -176,6 +207,37 @@
@@ -174,6 +205,37 @@
spi-max-frequency = <52000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;

76
package/boot/uboot-mediatek/patches/110-mtd-spi-nand-add-support-for-FudanMicro-FM25S01A.patch
View file

@ -1,76 +0,0 @@
From c5b3dd3b860b7eb65950c077a70b2e5ad68626b0 Mon Sep 17 00:00:00 2001
From: Mikhail Zhilkin <csharper2005@gmail.com>
Date: Wed, 13 Aug 2025 21:54:49 +0300
Subject: uboot-mediatek: add support for FudanMicro FM25S01A
This patch adds support for FudanMicro FM25S01A SPI NAND. It's required
for some CMCC RAX3000Me hardware revisions.
The patch was partially taken from ImmortalWrt.
Link:
https://raw.githubusercontent.com/immortalwrt/immortalwrt/refs/heads/master/package/boot/uboot-mediatek/patches/342-mtd-spinand-Support-fmsh.patch
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
---
--- a/drivers/mtd/nand/spi/fudanmicro.c
+++ b/drivers/mtd/nand/spi/fudanmicro.c
@@ -27,6 +27,29 @@ static SPINAND_OP_VARIANTS(update_cache_
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));
+static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ return -ERANGE;
+}
+
+static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 2;
+ region->length = 62;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
+ .ecc = fm25s01a_ooblayout_ecc,
+ .rfree = fm25s01a_ooblayout_free,
+};
+
static int fm25s01b_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
{
@@ -83,8 +106,17 @@ static int fm25s01b_ecc_get_status(struc
}
static const struct spinand_info fudan_spinand_table[] = {
- SPINAND_INFO("FM25s01B",
- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
+ SPINAND_INFO("FM25S01A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(1, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
+ SPINAND_INFO("FM25S01B",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -100,7 +132,7 @@ static const struct spinand_manufacturer
const struct spinand_manufacturer fudan_spinand_manufacturer = {
.id = SPINAND_MFR_FUDAN,
- .name = "FUDAN Micron",
+ .name = "FudanMicro",
.chips = fudan_spinand_table,
.nchips = ARRAY_SIZE(fudan_spinand_table),
.ops = &fudan_spinand_manuf_ops,

2
package/boot/uboot-mediatek/patches/160-net-phy-add-support-for-Airoha-ethernet-PHY-driver.patch
View file

@ -58,7 +58,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -82,6 +82,37 @@ config PHY_ADIN
@@ -83,6 +83,37 @@ config PHY_ADIN
help
Add support for configuring RGMII on Analog Devices ADIN PHYs.

2
package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch
View file

@ -129,7 +129,7 @@
int arch, int ph_type, int bootstage_id,
--- a/include/image.h
+++ b/include/image.h
@@ -1114,6 +1114,7 @@ int fit_parse_subimage(const char *spec,
@@ -1115,6 +1115,7 @@ int fit_parse_subimage(const char *spec,
ulong *addr, const char **image_name);
int fit_get_subimage_count(const void *fit, int images_noffset);

8
package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch
View file

@ -1,6 +1,6 @@
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -715,6 +715,12 @@ config CMD_ENV_EXISTS
@@ -717,6 +717,12 @@ config CMD_ENV_EXISTS
Check if a variable is defined in the environment for use in
shell scripting.
@ -76,7 +76,7 @@
#if defined(CONFIG_CMD_ENV_CALLBACK)
static int print_static_binding(const char *var_name, const char *callback_name,
void *priv)
@@ -1092,6 +1146,9 @@ static struct cmd_tbl cmd_env_sub[] = {
@@ -1095,6 +1149,9 @@ static struct cmd_tbl cmd_env_sub[] = {
U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""),
#endif
U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""),
@ -86,7 +86,7 @@
#if defined(CONFIG_CMD_RUN)
U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""),
#endif
@@ -1176,6 +1233,9 @@ U_BOOT_LONGHELP(env,
@@ -1179,6 +1236,9 @@ U_BOOT_LONGHELP(env,
#if defined(CONFIG_CMD_NVEDIT_EFI)
"env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n"
#endif
@ -96,7 +96,7 @@
#if defined(CONFIG_CMD_RUN)
"env run var [...] - run commands in an environment variable\n"
#endif
@@ -1284,6 +1344,17 @@ U_BOOT_CMD(
@@ -1287,6 +1347,17 @@ U_BOOT_CMD(
);
#endif

2
package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch
View file

@ -938,7 +938,7 @@
#ifdef CONFIG_MMC
static int initr_mmc(void)
{
@@ -730,6 +745,9 @@ static void initcall_run_r(void)
@@ -723,6 +738,9 @@ static void initcall_run_r(void)
#if CONFIG_IS_ENABLED(NMBM_MTD)
INITCALL(initr_nmbm);
#endif

2
package/boot/uboot-mediatek/patches/430-add-bpi-r3.patch
View file

@ -845,7 +845,7 @@
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"
--- a/arch/arm/dts/mt7986a-bpi-r3-sd.dts
+++ b/arch/arm/dts/mt7986a-bpi-r3-sd.dts
@@ -235,22 +235,13 @@
@@ -234,22 +234,13 @@
partition@0 {
label = "bl2";

6
package/boot/uboot-mediatek/patches/457-initialized-the-watchdog-subsystem-later.patch
View file

@ -13,7 +13,7 @@ Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -701,19 +701,13 @@ static void initcall_run_r(void)
@@ -694,19 +694,13 @@ static void initcall_run_r(void)
INITCALL(serial_initialize);
INITCALL(initr_announce);
INITCALL(dm_announce);
@ -33,7 +33,7 @@ Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
#if CONFIG_IS_ENABLED(PCI_INIT_R) && CONFIG_IS_ENABLED(SYS_EARLY_PCI_INIT)
/*
* Do early PCI configuration _before_ the flash gets initialised,
@@ -728,7 +722,6 @@ static void initcall_run_r(void)
@@ -721,7 +715,6 @@ static void initcall_run_r(void)
#if CONFIG_IS_ENABLED(MTD_NOR_FLASH)
INITCALL(initr_flash);
#endif
@ -41,7 +41,7 @@ Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
#if CONFIG_IS_ENABLED(PPC) || CONFIG_IS_ENABLED(M68K) || CONFIG_IS_ENABLED(X86)
/* initialize higher level parts of CPU like time base and timers */
INITCALL(cpu_init_r);
@@ -757,6 +750,10 @@ static void initcall_run_r(void)
@@ -750,6 +743,10 @@ static void initcall_run_r(void)
#if CONFIG_IS_ENABLED(PVBLOCK)
INITCALL(initr_pvblock);
#endif

4
package/boot/uboot-mediatek/patches/461-add-netis-nx30v2.patch
View file

@ -1,6 +1,6 @@
--- /dev/null
+++ b/arch/arm/dts/mt7981-netis-nx30v2.dts
@@ -0,0 +1,160@@
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/dts-v1/;
@ -163,7 +163,7 @@
+};
--- /dev/null
+++ b/configs/mt7981_netis_nx30v2_defconfig
@@ -0,0 +1,156 @@
@@ -0,0 +1,157 @@
+CONFIG_ARM=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y

2
package/boot/uboot-mediatek/patches/470-add-bpi-r4-lite.patch
View file

@ -988,7 +988,7 @@
+ mt7987a-bpi-r4-lite-sd.dtb \
mt7987a-emmc-rfb.dtb \
mt7987a-rfb.dtb \
mt7987a-sd-rfb.dtb \
mt7987a-routerich_be7200.dtb \
--- /dev/null
+++ b/arch/arm/dts/mt7987a-bpi-r4-lite-emmc-u-boot.dtsi
@@ -0,0 +1,123 @@