realtek: pcs: rtl839x: refactor SerDes reset sequence

Refactor the previously added SerDes reset sequence. Use the SerDes
MDIO interface instead of plain writes into the switchcore's register
space. Moreover, simplify the sequence because the SDK version is
unnecessarily complex.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
This commit is contained in:
Jonas Jelonek 2025-12-29 10:29:57 +00:00 committed by Stijn Tintel
parent 82d0ae3134
commit 7de5ba2e98

View file

@ -646,53 +646,40 @@ static int rtpcs_838x_setup_serdes(struct rtpcs_serdes *sds,
__maybe_unused
static void rtpcs_839x_sds_reset(struct rtpcs_serdes *sds)
{
u32 sdsReg[] = {0xA328, 0xA728, 0xAB28, 0xAF28, 0xB320, 0xB728, 0xBB20};
struct rtpcs_ctrl *ctrl = sds->ctrl;
u32 addr_ofst = 0x400;
u32 ofst, sdsAddr;
struct rtpcs_serdes *even_sds = rtpcs_sds_get_even(sds);
struct rtpcs_serdes *odd_sds = rtpcs_sds_get_odd(sds);
ofst = addr_ofst * (sds->id / 2);
sdsAddr = sdsReg[sds->id / 2] + (0x80 * (sds->id % 2));
if (sds->id < 8 || sds->id == 10 || sds->id == 11) {
regmap_write_bits(ctrl->map, 0xa3c0 + ofst, 0xffff << 16, 0x0050); // Serdes_set(unit, 0xa3c0 + ofst, 31 , 16 , 0x0050);
regmap_write_bits(ctrl->map, 0xa3c0 + ofst, 0xffff << 16, 0x00f0); // Serdes_set(unit, 0xa3c0 + ofst, 31 , 16 , 0x00f0);
regmap_write_bits(ctrl->map, 0xa3c0 + ofst, 0xffff << 16, 0x0000); // Serdes_set(unit, 0xa3c0 + ofst, 31 , 16 , 0x0);
bool is_10g_sds = (sds->id == 8 || sds->id == 9 || sds->id == 12 ||
sds->id == 13);
regmap_write_bits(ctrl->map, sdsAddr, BIT(0), 0x0); // Serdes_set(unit, sdsAddr, 0 , 0 , 0x0);
regmap_write_bits(ctrl->map, sdsAddr, BIT(9), BIT(9)); // Serdes_set(unit, sdsAddr, 9 , 9 , 0x1);
msleep(100);
regmap_write_bits(ctrl->map, sdsAddr, BIT(9), 0x0); // Serdes_set(unit, sdsAddr, 9 , 9 , 0x0);
} else if (sds->id == 8 || sds->id == 9) {
regmap_write_bits(ctrl->map, 0xb3f8, 0xf << 16, 0x5); // Serdes_set(unit, 0xb3f8, 19 , 16 , 0x5);
if (is_10g_sds) {
rtpcs_sds_write_bits(odd_sds, 0xb, 0x1d, 3, 0, 0x5);
msleep(500);
regmap_write_bits(ctrl->map, 0xb3f8, 0xf << 16, 0xf); // Serdes_set(unit, 0xb3f8, 19 , 16 , 0xf);
regmap_write_bits(ctrl->map, 0xb3f8, 0xf << 16, 0x0); // Serdes_set(unit, 0xb3f8, 19 , 16 , 0x0);
rtpcs_sds_write_bits(odd_sds, 0xb, 0x1d, 3, 0, 0xf);
rtpcs_sds_write_bits(odd_sds, 0xb, 0x1d, 3, 0, 0x0);
regmap_write_bits(ctrl->map, 0xb320, BIT(3), 0x0); // Serdes_set(unit, 0xb320, 3 , 3 , 0x0);
regmap_write_bits(ctrl->map, 0xb340, BIT(15), BIT(15)); // Serdes_set(unit, 0xb340, 15 , 15 , 0x1);
rtpcs_sds_write_bits(even_sds, 0xa, 0x10, 3, 3, 0x0);
rtpcs_sds_write_bits(even_sds, 0xb, 0x0, 15, 15, 0x1);
msleep(100);
regmap_write_bits(ctrl->map, 0xb340, BIT(15), 0x0); // Serdes_set(unit, 0xb340, 15 , 15 , 0x0);
} else if (sds->id == 12 || sds->id == 13) {
regmap_write_bits(ctrl->map, 0xbbf8, 0xf << 16, 0x5); // Serdes_set(unit, 0xbbf8, 19 , 16 , 0x5);
msleep(500);
regmap_write_bits(ctrl->map, 0xbbf8, 0xf << 16, 0xf); // Serdes_set(unit, 0xbbf8, 19 , 16 , 0xf);
regmap_write_bits(ctrl->map, 0xbbf8, 0xf << 16, 0x0); // Serdes_set(unit, 0xbbf8, 19 , 16 , 0x0);
regmap_write_bits(ctrl->map, 0xbb20, BIT(3), 0x0); // Serdes_set(unit, 0xbb20, 3 , 3 , 0x0);
regmap_write_bits(ctrl->map, 0xbb40, BIT(15), BIT(15)); // Serdes_set(unit, 0xbb40, 15 , 15 , 0x1);
msleep(100);
regmap_write_bits(ctrl->map, 0xbb40, BIT(15), 0x0); // Serdes_set(unit, 0xbb40, 15 , 15 , 0x0);
rtpcs_sds_write_bits(even_sds, 0xb, 0x0, 15, 15, 0x0);
} else {
pr_err("sds number doesn't exist\n");
return;
rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x0050);
rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x00f0);
rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x0000);
rtpcs_sds_write_bits(sds, 0x8, 0x14, 0, 0, 0x0);
rtpcs_sds_write_bits(sds, 0x8, 0x14, 9, 9, 0x1);
msleep(100);
rtpcs_sds_write_bits(sds, 0x8, 0x14, 9, 9, 0x0);
}
regmap_write_bits(ctrl->map, 0xa004 + ofst, 0xffff << 16, 0x7146); // Serdes_set(unit, 0xa004 + ofst, 31 , 16 , 0x7146);
rtpcs_sds_write(even_sds, 0x0, 0x3, 0x7146);
msleep(100);
regmap_write_bits(ctrl->map, 0xa004 + ofst, 0xffff << 16, 0x7106); // Serdes_set(unit, 0xa004 + ofst, 31 , 16 , 0x7106);
regmap_write_bits(ctrl->map, 0xa004 + ofst + 0x100, 0xffff << 16, 0x7146); // Serdes_set(unit, 0xa004 + ofst + 0x100, 31 , 16 , 0x7146);
rtpcs_sds_write(even_sds, 0x0, 0x3, 0x7106);
rtpcs_sds_write(odd_sds, 0x0, 0x3, 0x7146);
msleep(100);
regmap_write_bits(ctrl->map, 0xa0004 + ofst + 0x100, 0xffff << 16, 0x7106); // Serdes_set(unit, 0xa004 + ofst + 0x100, 31 , 16 , 0x7106);
rtpcs_sds_write(odd_sds, 0x0, 0x3, 0x7106);
}
/* RTL930X */