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realtek: dts: convert devices to mdio bus 1-3

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Switch the mdio bus topology for devices that have their phys
attached to bus 1-3. This does not have any impact because
the mdio driver was completly redisgned

With this commit the bus id is stored twice. Once in the (new)
bus and in the (old) realtek,smi-address property. E.g.

&mdio_bus1 {
  reg = <1>; <<< bus id
  phy24: ethernet-phy@24 {
    reg = <26>;
    compatible = "ethernet-phy-ieee802.3-c22";
    realtek,smi-address = <1 2>; <<< bus & address id
  };
};

This redundancy will be removed later.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Markus Stockhausen 2026-01-07 12:16:53 +01:00 • committed by Hauke Mehrtens
parent cfe534dc8e
commit b948cc17b4
7 changed files with 28 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
target/linux/realtek/dts/rtl9301_linksys_lgs328c.dts
View file

@ -105,7 +105,10 @@
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 7>;
};
};
};
&mdio_bus1 {
phy8: ethernet-phy@8 {
reg = <8>;
compatible = "ethernet-phy-ieee802.3-c22";
@ -146,6 +149,9 @@
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 15>;
};
};
&mdio_bus2 {
phy16: ethernet-phy@16 {
reg = <16>;
compatible = "ethernet-phy-ieee802.3-c22";

6
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts
View file

@ -8,7 +8,7 @@
model = "Zyxel XGS1250-12 A1 Switch";
};
&mdio_bus0 {
&mdio_bus1 {
/* External Aquantia 113C PHYs */
phy24: ethernet-phy@24 {
reg = <24>;
@ -18,7 +18,9 @@
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
};
&mdio_bus2 {
phy25: ethernet-phy@25 {
reg = <25>;
compatible = "ethernet-phy-ieee802.3-c45";
@ -27,7 +29,9 @@
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
};
&mdio_bus3 {
phy26: ethernet-phy@26 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c45";

6
target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts
View file

@ -8,7 +8,7 @@
model = "Zyxel XGS1250-12 B1 Switch";
};
&mdio_bus0 {
&mdio_bus1 {
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45";
@ -17,7 +17,9 @@
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
};
&mdio_bus2 {
phy25: ethernet-phy@25 {
reg = <25>;
compatible = "ethernet-phy-ieee802.3-c45";
@ -26,7 +28,9 @@
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
};
&mdio_bus3 {
phy26: ethernet-phy@26 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c45";

4
target/linux/realtek/dts/rtl9302_zyxel_xgs1x10-12-common.dtsi
View file

@ -130,14 +130,18 @@
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 7>;
};
};
&mdio_bus1 {
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45";
// Disabled because we do not know how to bring up again
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
};
};
&mdio_bus2 {
phy25: ethernet-phy@25 {
reg = <25>;
compatible = "ethernet-phy-ieee802.3-c45";

2
target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
View file

@ -150,7 +150,9 @@
realtek,smi-address = <0 3>;
reg = <20>;
};
};
&mdio_bus3 {
phy24: ethernet-phy@24 {
compatible = "ethernet-phy-ieee802.3-c45";
realtek,smi-address = <3 16>;

3
target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts
View file

@ -200,6 +200,9 @@
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <0 23>;
};
};
&mdio_bus1 {
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c22";

2
target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi
View file

@ -311,7 +311,9 @@
compatible = "ethernet-phy-ieee802.3-c45";
realtek,smi-address = <0 11>;
};
};
&mdio_bus1 {
phy24: ethernet-phy@24 {
reg = <24>;
compatible = "ethernet-phy-ieee802.3-c45";