In devsoc, we have 2 ports and 2 uniphys, so removed the extra
ports and uniphy configurations from the source. Also, updated
the clock src configuration with respect available uniphys and
removed the SFP port support.
Change-Id: I557bd6d215508c190a3e733a0304873ecd02eb24
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
In qca8084 phy mode, each phy is assigned to one mac in the ipq9574,
where as in the switch mode, only mac1 will used for all the 4 ports
of the qca8084, mac2-4 will be left unused. So, updated the
logic to update the link status of the individual ports, when qca8084
is in switch mode.
Change-Id: I128c3eafb7c85c0db9d252e047457ea8820df368
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch renames the GCC macro which was added
for QCA8084 PHY to fix the conflict with similar
macro defined in ipq5018 platform.
Additionally, this patch also moves all QCA8084
macro definitions in MDIO driver under QCA8084_PHY
config.
Change-Id: Icd62bf260ffeae64bf67c0c1a58afb6ac4999e22
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds support for qca8084 PHY based
ports. Accordingly, updates the uniphy, ppe, clock
configurations as required for qca8084 ports.
Change-Id: I2e687c10adba579b0d47d8f5b529fe920b7d0d7c
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds initial support for qca8084 PHY
which is based on qca8081 PHY.
qca8084 PHY has support for 4x2.5G.
Change-Id: Ic767c19fad050e5ee9a97ad7fa50c1b6b27893dd
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds support for active_port env. With this
change in ipq9574, the end user has an option to
enable & maintain only 1 active ethernet port. There
are no multi-port use case in U-Boot and when multiple
ports were enabled for Kernel usecases, there were some
timeout issues in some special cases during crashdump
collection.
active_port can be used to configure the port which
will be used for TFTP download/upload in u-boot in
those setups. Example: To set Port2 as active_port
following command can be used:
setenv active_port 2 && savee
Note that, the active_port range is from 0 to 5 (there
are a total of 6 ports in ipq9574).
Change-Id: Ia2fc58abda7640f67afadfa01d0a5994aa48ea51
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
The ring/desc's used non-cached memory which cannot
be free'd. Remove these free API's.
1 MB of memory is marked as non-cached and that is used
for EDMA rings/desc's and the same needn't be free'd. It
will be re-init each time during edma init.
Change-Id: Iac1e616db7c929d640c559024e4f65c6ad515400
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch moves the qca8075 phy inits inside the
config. Without this patch, when we disable the
QCA8075 config, then there will be compilation
errors.
Change-Id: Ibed0517c52f896f2af54773aa31260068e116479
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch removes the redundant udelay's and
ipq_mdio_wait_busy calls which in turn reduces
the overall AQ FW Load time.
Change-Id: I31f3a940d743528ed212e8cccab522ac249a5a5a
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This changes initialize non-cache buffer every time
before edma configuration.
Change-Id: If7692f9671f6b63f19ae38326bd76320c54766cc
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This patch is a temporary WAR to fix timeout issues
observed in particular setups during dump collection.
This patch disables FDB Learning for ports 1-6.
Change-Id: I7987bb0286df129c56a07f1708600f78ebf42039
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
Setting this bit will not allow PPE to take any action on the
packets. Remove this configuration as its not needed in U-Boot
EDMA.
Change-Id: I45cb93a4f5072dd882179eca5a14bc4a25624f26
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds DA MAC rule. This rule can be used
if we want to drop packets with a particular DA MAC
address.
Change-Id: I32ef53ada1518f6880faa7402ccaaedb5b32a90b
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds ACL to drop the packets with src
mac address.
Change-Id: Ib944154ffb53b9bf67a178a5ab08cd9f12866b4a
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch updates the default uniphy mode to SGMII
for the qca808x ports. If suppose, the phy is capable
of supporting 2.5G, then it will reconfigure the
uniphy mode to SGMII_PLUS at that time based on the
link speed detected.
Change-Id: I56692b19536e71cbcf3a4c31d32ecb29866c5fdc
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch optimizes and updates the EDMA Driver as
required for ipq9574 platform similar to the Kernel
Host EDMA Driver.
-> Config TX_MOD and RX_MOD timers
-> Config DMAR_CTRL
-> Config Service code bypass for TX_DESC
-> Update the SRCINFO and DST_PORT configs
-> Make changes to include secondary and primary DESC's
into the same corresponding ring structure
-> Increase the TX_BUFF Size to 2048
-> Update to use RX_DESC RING 23
-> Remove unused fields from the EDMA structures
-> Update the description for the EDMA structure fields
Change-Id: I3f7f1c11cdd87687c38774a4930c9bee90857203
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch updates the following:
1) Updates NSS NOC clock frequencies to expected clock rates
2) Add Debug prints during eth_halt which can help debug issues
3) Update ACL structure and configurations for ipq9574 platform
as required
4) Disable the MIB counters reset bit so that those counter
registers values can be dumped to check stats
5) Update VSI configurations for cases when BRIDGED_MODE config
is disabled
6) Update the VSI configuration to avoid flooding from one LAN
port to another
Change-Id: I39f20a57c08205fbeb669c93b6459cf8e184098d
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds support for SFP 1G and 2.5G. Note that
there is no autoneg support for SFP in U-Boot and the mode needs
to be changed in DT to make it work in 1G or 2.5G.
By default SFP will be configured to work in 10G mode.
Change-Id: I1c209276fe2a586332be87ce5d49a140f4814eb2
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch adds the phy type and phy address also as part
of the print message during error cases which will help in
quickly identifying the port configuration.
Change-Id: I6762998e8bae8be8473d32e41b81ecc7e0b94885
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Uniphy clk init and deinit creates additional delay in UBoot.
Falling back to Uniphy clk init during boot up and not doing
de-init during speed changes.
Change-Id: I10fb86e4b616f46c2a0c3066308e7c6a6325cf44
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Removes unnecessary TIMER and THRESHOLD configurations in EDMA
2) Adds Uniphy Clock deinit and init in eth_init (during each ping
& speed change)
3) Removes preheader configurations and calculations from EDMA
as there are no preheaders in ipq9574 platform (Instead there is
a secondary descriptor)
4) Add sufficient delay after uniphy reset
5) Remove CONFIG_IPQ9574_RUMI macro from network drivers
6) Change default mac_speed to 0
7) Fix the ppe sched. and tdm configuration
8) Reduce the block size to 1280 + headers for tftp (around 1326)
for timebeing without which timeouts were observed randomly during
TFTP (Note that the MTU is 1514 bytes)
Change-Id: I4004adfb2ae0dc98d65e458c15dafcff6523744b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Previous platforms assume qca8075 phy address starts from
0. This patch adds a separate qca8075 phy driver for ipq9574
platform and handles cases where qca8075 phy addr doesn't
start with 0.
Change-Id: I59a596d692b1663af638af358335056661bdf199
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Removes unused macros and functions
2) Updates EDMA Reset address and assert/de-assert values
3) Updates Port5 and Port6 address in uniphy clock config
4) Reduces delay to 500 us in usxgmii uniphy mode set
5) Disable clearing of mac counters
Change-Id: I7cc9b20bbd4f2367d9f405ae2e5652d6236476a9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Adds support for AQR113C_B0 and AQR113C_B1 AQ PHY versions
which will be used in ipq9574 platform
2) Adds delay of 100 ms after FW download before calling phy
init which is necessary in ipq9574 platform without which the
init doesn't happen properly as expected
Change-Id: I50be933e68598ada5e3d9df71c3e3abcc79c52d2
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the macro used for modes and also additionally
increases the delay between uniphy reset as needed for ipq9574
platform
Change-Id: Ide565e071963e17abd4f8f7e5d6270849d729b21
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Updates per port port mac reset
2) Updates XGMAC based on port instead of based on Uniphy as needed
for ipq9574 platform
3) uniphy_port5_clock_source_set -> If uniphy1 is not used, then
it is assumed that the first uniphy supports 5 Malibu and so accordingly
clock source is set by calling this function in that scenario
Change-Id: I978043cfa277fa02dadee5070b94f7a77ed81a5f
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Enables AQ Driver Compilation.
2) Updates malloc size to fixed value of 512 KB (size of ETHPHYFW Partition)
which is actually 1024 KB as per QSPI Nand Flash partition (considering the
bad block size also). While reading bad blocks will be skipped, and the
firmware size is not expected to exceed 512 KB and hence this size is updated.
Also note, the heap size is currently 1 MB and so if we try do malloc for 1 MB,
we might get failures during allocation.
3) Adds QSPI NAND Flash Support.
Change-Id: I5a6e19b1462b648523ce6b311128a447e34241b4
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Removes unused/duplicate macro: NSS_CC_PORT1_RX_CBCR_ADDR
2) Remove CMN_BLK_INIT
3) Update MAX Ports to 6
4) Rename switch_mac_mode to switch_mac_mode0 in DTS and driver
5) Fix SYSNOC frequency configuration
6) Tx/Rx descs is initialized to 0 before use which is
needed because Alder DDR is not init to 0 by default.
Change-Id: Ide22e146f9c8ecb75585d0a8d04e426c463ad8c9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Update speed clock, port mac clock reset for ipq9574
platform.
2) Handle PPE init for all 3 switch mac modes.
3) Handle port mux config when port5 is part of Uniphy0
during when Uniphy1 won't be used.
Change-Id: I23b04b00036ab139cd5877bcf913dbecb7fb7fa2
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Add support for 3 switch_mac_modes in ipq9574 platform.
2) Update xpcs and soft_reset as needed for ipq9574 platform.
3) Support usecase where 5*1G ports can be supported as part
of Uniphy0 during when Uniphy1 won't be used.
Change-Id: I949db117fa3c8adb937c5c055eedcaa6ead0da07
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Handle 2 aquantia ports during ping
2) Remove SFP Port Support Temporarily
3) Update clocks for different port speeds and different
ethernet port types as needed.
4) Update number of ports to 7 since 7 is the MAX ports
supported in ipq9574 platform.
Change-Id: I2d9040227b9c8a11cddc0d00e835ac64d3a4940d
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
