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drivers: net: ipq9574: Add SKU Validation

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Change-Id: I0993e36938eeb79ac1e810249e273c06ed5dce54
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This commit is contained in:
Selvam Sathappan Periakaruppan 2021-08-26 00:36:25 +05:30 • committed by Gerrit - the friendly Code Review server
parent 52018d860f
commit 01c2d98698
4 changed files with 40 additions and 3 deletions
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22
board/qca/arm/ipq9574/ipq9574.c
View file

@ -430,6 +430,28 @@ int ipq_validate_qfrom_fuse(unsigned int reg_add, int pos)
return (readl(reg_add) & (1 << pos));
}
int is_uniphy_enabled(int uniphy_index)
{
int bit = 0;
switch(uniphy_index) {
case 0:
bit = UNIPHY_0_DISABLE_BIT;
break;
case 1:
bit = UNIPHY_1_DISABLE_BIT;
break;
case 2:
bit = UNIPHY_2_DISABLE_BIT;
break;
default:
printf("In ipq9574: Max 3 Uniphy's can be supported\n");
break;
}
return !ipq_validate_qfrom_fuse(
QFPROM_CORR_FEATURE_CONFIG_ROW2_MSB, bit);
}
#ifdef CONFIG_PCI_IPQ
int ipq_sku_pci_validation(int pci_id)
{

7
board/qca/arm/ipq9574/ipq9574.h
View file

@ -261,15 +261,20 @@ unsigned int __invoke_psci_fn_smc(unsigned int, unsigned int,
#define EUD_EUD_EN2 0x7A000
/*
* SKU
* QFPROM Register for SKU Validation
*/
#define QFPROM_CORR_FEATURE_CONFIG_ROW1_MSB 0xA401C
#define QFPROM_CORR_FEATURE_CONFIG_ROW2_MSB 0xA4024
#define PCIE_0_CLOCK_DISABLE_BIT 2
#define PCIE_1_CLOCK_DISABLE_BIT 3
#define PCIE_2_CLOCK_DISABLE_BIT 4
#define PCIE_3_CLOCK_DISABLE_BIT 5
#define UNIPHY_0_DISABLE_BIT 23
#define UNIPHY_1_DISABLE_BIT 24
#define UNIPHY_2_DISABLE_BIT 25
int ipq_validate_qfrom_fuse(unsigned int reg_add, int pos);
/**

7
drivers/net/ipq9574/ipq9574_ppe.c
View file

@ -32,6 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define pr_info(fmt, args...) printf(fmt, ##args);
extern int is_uniphy_enabled(int uniphy_index);
extern void uniphy_port5_clock_source_set(void);
/*
@ -857,10 +858,12 @@ void ipq9574_ppe_interface_mode_init(void)
if (mode1 == EPORT_WRAPPER_MAX) {
ppe_port_mux_mac_type_set(PORT5, mode0);
uniphy_port5_clock_source_set();
} else {
} else if (is_uniphy_enabled(PPE_UNIPHY_INSTANCE1)) {
ppe_port_mux_mac_type_set(PORT5, mode1);
}
ppe_port_mux_mac_type_set(PORT6, mode2);
if (is_uniphy_enabled(PPE_UNIPHY_INSTANCE2)) {
ppe_port_mux_mac_type_set(PORT6, mode2);
}
}
/*

7
drivers/net/ipq9574/ipq9574_uniphy.c
View file

@ -27,6 +27,8 @@
#include <fdtdec.h>
#include "ipq_phy.h"
extern int is_uniphy_enabled(int uniphy_index);
DECLARE_GLOBAL_DATA_PTR;
extern int ipq_mdio_write(int mii_id,
int regnum, u16 value);
@ -436,6 +438,11 @@ static void ppe_uniphy_usxgmii_mode_set(uint32_t uniphy_index)
void ppe_uniphy_mode_set(uint32_t uniphy_index, uint32_t mode)
{
if (!is_uniphy_enabled(uniphy_index)) {
printf("Uniphy %u is disabled\n", uniphy_index);
return;
}
switch(mode) {
case EPORT_WRAPPER_PSGMII:
ppe_uniphy_psgmii_mode_set(uniphy_index);