mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
Merge remote-tracking branch 'origin/win.coretech.1.0' into HEAD
Change-Id: I2893089a3b0ca91ea22d49417934f126398a6a58 Signed-off-by: anusha <anusharao@codeaurora.org>
This commit is contained in:
commit
eed8fc7b0d
32 changed files with 505 additions and 57 deletions
|
|
@ -68,6 +68,9 @@ dtb-$(CONFIG_ARCH_IPQ5018) += ipq5018-emulation.dtb \
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|||
ipq5018-mp03.1-c3.dtb \
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ipq5018-mp03.3.dtb \
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ipq5018-mp03.3-c2.dtb \
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||||
ipq5018-mp03.3-c3.dtb \
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||||
ipq5018-mp03.3-c4.dtb \
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ipq5018-mp03.3-c5.dtb \
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||||
ipq5018-mp03.4-c1.dtb \
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||||
ipq5018-mp03.4-c2.dtb \
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ipq5018-mp03.6-c1.dtb \
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|
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@ -55,6 +55,12 @@
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nand: nand-controller@79B0000 {
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status = "okay";
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nand_gpio {
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qspi_clk {
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gpio = <9>;
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func = <2>;
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||||
od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat3 {
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gpio = <4>;
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func = <2>;
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|
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@ -113,6 +113,7 @@
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usb0: xhci@8a00000 {
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ssphy = <1>;
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usb_pwr_gpio = <24>;
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usb_gpio {
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pwr_gpio {
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gpio = <24>;
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22
arch/arm/dts/ipq5018-mp03.3-c3.dts
Normal file
22
arch/arm/dts/ipq5018-mp03.3-c3.dts
Normal file
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@ -0,0 +1,22 @@
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|||
/*
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||||
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
|
||||
*
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||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
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||||
*/
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#include "ipq5018-mp03.3.dts"
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/ {
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model ="QCA, IPQ5018-MP03.3-C3";
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compatible = "qca,ipq5018", "qca,ipq5018-mp03.3-c3";
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machid = <0x8040202>;
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config_name = "config@mp03.3-c3";
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/delete-node/ pci@a0000000;
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/delete-node/ xhci@8a00000;
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};
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19
arch/arm/dts/ipq5018-mp03.3-c4.dts
Normal file
19
arch/arm/dts/ipq5018-mp03.3-c4.dts
Normal file
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@ -0,0 +1,19 @@
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|||
/*
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||||
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License version 2 and
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||||
* only version 2 as published by the Free Software Foundation.
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||||
*
|
||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
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*/
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#include "ipq5018-mp03.3.dts"
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/ {
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model ="QCA, IPQ5018-MP03.3-C4";
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compatible = "qca,ipq5018", "qca,ipq5018-mp03.3-c4";
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machid = <0x8040302>;
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config_name = "config@mp03.3-c4";
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};
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19
arch/arm/dts/ipq5018-mp03.3-c5.dts
Normal file
19
arch/arm/dts/ipq5018-mp03.3-c5.dts
Normal file
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@ -0,0 +1,19 @@
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|||
/*
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||||
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
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||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
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#include "ipq5018-mp03.3.dts"
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/ {
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model ="QCA, IPQ5018-MP03.3-C5";
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compatible = "qca,ipq5018", "qca,ipq5018-mp03.3-c5";
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machid = <0x8040402>;
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config_name = "config@mp03.3-c5";
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};
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@ -22,7 +22,7 @@
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aliases {
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console = "/serial@78AF000";
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mmc = "/sdhci@7804000";
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i2c0 = "/i2c@78b6000";
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i2c0 = "/i2c@78b7000";
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gmac_gpio = "/gmac_gpio";
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usb0 = "/xhci@8a00000";
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pci0 = "/pci@80000000";
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@ -127,6 +127,7 @@
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};
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usb0: xhci@8a00000 {
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usb_pwr_gpio = <24>;
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usb_gpio {
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pwr_gpio {
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gpio = <24>;
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|
|
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|||
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@ -22,7 +22,7 @@
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|||
aliases {
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console = "/serial@78AF000";
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mmc = "/sdhci@7804000";
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i2c0 = "/i2c@78b6000";
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i2c0 = "/i2c@78b7000";
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gmac_gpio = "/gmac_gpio";
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usb0 = "/xhci@8a00000";
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pci0 = "/pci@80000000";
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@ -127,6 +127,7 @@
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};
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usb0: xhci@8a00000 {
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usb_pwr_gpio = <24>;
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usb_gpio {
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pwr_gpio {
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gpio = <24>;
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|
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|||
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@ -25,7 +25,6 @@
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i2c0 = "/i2c@78b6000";
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gmac_gpio = "/gmac_gpio";
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usb0 = "/xhci@8a00000";
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pci0 = "/pci@80000000";
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pci1 = "/pci@a0000000";
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nand = "/nand-controller@79B0000";
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};
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@ -127,6 +126,7 @@
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|||
};
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||||
usb0: xhci@8a00000 {
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usb_pwr_gpio = <24>;
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usb_gpio {
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pwr_gpio {
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gpio = <24>;
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|
|
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|||
115
arch/arm/dts/sirocco-p0.dts
Normal file
115
arch/arm/dts/sirocco-p0.dts
Normal file
|
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
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#include "ipq5018-soc.dtsi"
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/ {
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model ="QCA, SIROCCO-P0";
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compatible = "qca,ipq5018", "qca,sirocco-p0";
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machid = <0x1040006>;
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config_name = "config@sirocco-p0";
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aliases {
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console = "/serial@78AF000";
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mmc = "/sdhci@7804000";
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||||
};
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console: serial@78AF000 {
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status = "ok";
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serial_gpio {
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blsp0_uart_rx {
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gpio = <28>;
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func = <3>;
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pull = <GPIO_PULL_DOWN>;
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oe = <GPIO_OE_DISABLE>;
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drvstr = <GPIO_8MA>;
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od_en = <GPIO_OD_DISABLE>;
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};
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blsp0_uart_tx {
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gpio = <29>;
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func = <3>;
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pull = <GPIO_NO_PULL>;
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oe = <GPIO_OE_DISABLE>;
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drvstr = <GPIO_8MA>;
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od_en = <GPIO_OD_DISABLE>;
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};
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blsp1_uart_rx {
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gpio = <20>;
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func = <0>;
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pull = <GPIO_PULL_DOWN>;
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oe = <GPIO_OE_DISABLE>;
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drvstr = <GPIO_8MA>;
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od_en = <GPIO_OD_DISABLE>;
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};
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blsp1_uart_tx {
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gpio = <21>;
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func = <0>;
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pull = <GPIO_NO_PULL>;
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oe = <GPIO_OE_DISABLE>;
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drvstr = <GPIO_8MA>;
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od_en = <GPIO_OD_DISABLE>;
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};
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};
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};
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mmc: sdhci@7804000 {
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compatible = "qcom,sdhci-msm";
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status = "okay";
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mmc_gpio {
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emmc_dat3 {
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gpio = <4>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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emmc_dat2 {
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gpio = <5>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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emmc_dat1 {
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gpio = <6>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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emmc_dat0 {
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gpio = <7>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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emmc_cmd{
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gpio = <8>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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emmc_clk{
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gpio = <9>;
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func = <1>;
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pull = <GPIO_NO_PULL>;
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od_en = <GPIO_OD_DISABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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|
||||
};
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|
|
@ -1,5 +1,5 @@
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|||
/*
|
||||
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
|
|
@ -27,6 +27,8 @@
|
|||
#define MPGE_PHY_MMD1_DAC_MASK 0xff00
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#define PHY_DAC(val) (val<<8)
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||||
#define MPGE_PHY_DEBUG_EDAC 0x4380
|
||||
#define QCA808X_DEBUG_PORT_ADDRESS 29
|
||||
#define QCA808X_DEBUG_PORT_DATA 30
|
||||
|
||||
#define LINK_UP 0x400
|
||||
#define LINK(_data) (_data & LINK_UP)? "Up" : "Down"
|
||||
|
|
|
|||
|
|
@ -282,6 +282,7 @@
|
|||
*/
|
||||
#define FLASH_SPI_NAND_FR_ADDR 0xB0
|
||||
#define FLASH_SPI_NAND_FR_ECC_ENABLE (1 << 4)
|
||||
#define FLASH_SPI_NAND_FR_BUFF_ENABLE (1 << 3)
|
||||
#define FLASH_SPI_NAND_FR_QUAD_ENABLE 0x1
|
||||
/* According to GigaDevice data sheet Status Register(0xC0) is:
|
||||
* _________________________________________________
|
||||
|
|
|
|||
|
|
@ -1144,6 +1144,7 @@ extern unsigned int __machine_arch_type;
|
|||
#define MACH_TYPE_IPQ6018_AP_CP01_C2 0x8030001
|
||||
#define MACH_TYPE_IPQ6018_AP_CP01_C3 0x8030002
|
||||
#define MACH_TYPE_IPQ6018_AP_CP01_C4 0x8030003
|
||||
#define MACH_TYPE_IPQ6018_AP_CP01_C5 0x8030004
|
||||
#define MACH_TYPE_IPQ5018_AP_MP02_1 0x8040000
|
||||
#define MACH_TYPE_IPQ5018_DB_MP02_1 0X1040003
|
||||
#define MACH_TYPE_IPQ807x_AP_HK01_C1 0x8010000
|
||||
|
|
|
|||
|
|
@ -253,7 +253,7 @@ int config_select(unsigned int addr, char *rcmd, int rcmd_size)
|
|||
}
|
||||
|
||||
|
||||
printf("Config not availabale\n");
|
||||
printf("Config not available\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -866,6 +866,13 @@ __weak void fdt_fixup_art_format(void *blob)
|
|||
return;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IPQ_BT_SUPPORT
|
||||
__weak void fdt_fixup_bt_running(void *blob)
|
||||
{
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
__weak void fdt_fixup_bt_debug(void *blob)
|
||||
{
|
||||
return;
|
||||
|
|
@ -1053,6 +1060,10 @@ int ft_board_setup(void *blob, bd_t *bd)
|
|||
if (s) {
|
||||
fdt_fixup_bt_debug(blob);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IPQ_BT_SUPPORT
|
||||
fdt_fixup_bt_running(blob);
|
||||
#endif
|
||||
/*
|
||||
|| This features fixup compressed_art in
|
||||
|| dts if its 16M profile build.
|
||||
|
|
|
|||
|
|
@ -205,4 +205,5 @@ struct ipc_intent {
|
|||
extern int bt_ipc_sendmsg(struct bt_descriptor *btDesc, unsigned char *buf, int len );
|
||||
extern void bt_ipc_init(struct bt_descriptor *btDesc);
|
||||
extern void bt_ipc_worker(struct bt_descriptor *btDesc);
|
||||
extern int bt_running;
|
||||
#endif /* _BT_H */
|
||||
|
|
|
|||
|
|
@ -484,6 +484,8 @@ void fdt_fixup_auto_restart(void *blob)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_IPQ_BT_SUPPORT
|
||||
int bt_running;
|
||||
|
||||
unsigned char hci_reset[] =
|
||||
{0x01, 0x03, 0x0c, 0x00};
|
||||
|
||||
|
|
@ -659,8 +661,16 @@ int bt_init(void)
|
|||
|
||||
send_bt_hci_cmds(btDesc);
|
||||
|
||||
bt_running = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void fdt_fixup_bt_running(void *blob)
|
||||
{
|
||||
if (bt_running) {
|
||||
parse_fdt_fixup("/soc/bt@7000000%qcom,bt-running%1", blob);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
void reset_crashdump(void)
|
||||
|
|
@ -1343,7 +1353,9 @@ void board_usb_deinit(int id)
|
|||
gpio_node, "gpio", 0);
|
||||
unsigned int *gpio_base =
|
||||
(unsigned int *)GPIO_CONFIG_ADDR(gpio);
|
||||
int usb_pwr_gpio = fdtdec_get_int(gd->fdt_blob, nodeoff, "usb_pwr_gpio", 0);
|
||||
writel(0xC1, gpio_base);
|
||||
gpio_set_value(usb_pwr_gpio, GPIO_OUT_LOW);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1497,7 +1509,7 @@ static void usb_init_phy(int index, int ssphy)
|
|||
|
||||
int ipq_board_usb_init(void)
|
||||
{
|
||||
int i, nodeoff, ssphy, gpio_node;
|
||||
int i, nodeoff, ssphy, gpio_node, usb_pwr_gpio;
|
||||
char node_name[8];
|
||||
|
||||
if(readl(EUD_EUD_EN2)) {
|
||||
|
|
@ -1528,8 +1540,11 @@ int ipq_board_usb_init(void)
|
|||
/* USB power GPIO for drive 5V */
|
||||
gpio_node =
|
||||
fdt_subnode_offset(gd->fdt_blob, nodeoff, "usb_gpio");
|
||||
if (gpio_node >= 0)
|
||||
if (gpio_node >= 0) {
|
||||
qca_gpio_init(gpio_node);
|
||||
usb_pwr_gpio = fdtdec_get_int(gd->fdt_blob, nodeoff, "usb_pwr_gpio", 0);
|
||||
gpio_set_value(usb_pwr_gpio, GPIO_OUT_HIGH);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -640,7 +640,7 @@ typedef enum {
|
|||
BT_WAIT_FOR_STOP = 2,
|
||||
} bt_wait;
|
||||
|
||||
#define BT_TIMEOUT_US 50000
|
||||
#define BT_TIMEOUT_US 500000
|
||||
|
||||
int bt_init(void);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1322,6 +1322,7 @@ unsigned int get_dts_machid(unsigned int machid)
|
|||
{
|
||||
case MACH_TYPE_IPQ6018_AP_CP01_C2:
|
||||
case MACH_TYPE_IPQ6018_AP_CP01_C3:
|
||||
case MACH_TYPE_IPQ6018_AP_CP01_C5:
|
||||
return MACH_TYPE_IPQ6018_AP_CP01_C1;
|
||||
case MACH_TYPE_IPQ6018_AP_CP01_C4:
|
||||
return MACH_TYPE_IPQ6018_AP_CP01_C1;
|
||||
|
|
@ -1346,6 +1347,9 @@ void ipq_uboot_fdt_fixup(void)
|
|||
case MACH_TYPE_IPQ6018_AP_CP01_C4:
|
||||
config = "config@cp01-c4";
|
||||
break;
|
||||
case MACH_TYPE_IPQ6018_AP_CP01_C5:
|
||||
config = "config@cp01-c5";
|
||||
break;
|
||||
}
|
||||
|
||||
if (config != NULL)
|
||||
|
|
|
|||
|
|
@ -19,6 +19,8 @@
|
|||
#include <asm/io.h>
|
||||
#include <dm/device-internal.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static struct spi_flash *flash;
|
||||
|
||||
/*
|
||||
|
|
@ -265,6 +267,7 @@ static int do_spi_flash_read_write(int argc, char * const argv[])
|
|||
int ret = 1;
|
||||
int dev = 0;
|
||||
loff_t offset, len, maxsize;
|
||||
unsigned long sram_end = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
|
||||
|
||||
if (argc < 3)
|
||||
return -1;
|
||||
|
|
@ -283,6 +286,16 @@ static int do_spi_flash_read_write(int argc, char * const argv[])
|
|||
argv[0], flash->size);
|
||||
return 1;
|
||||
}
|
||||
/* Validate DDR region address */
|
||||
if ((addr < CONFIG_SYS_SDRAM_BASE) || (addr > (sram_end - 1))) {
|
||||
puts("Invalid RAM address \n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((addr + len) > sram_end) {
|
||||
puts("No space available\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
buf = map_physmem(addr, len, MAP_WRBACK);
|
||||
if (!buf) {
|
||||
|
|
|
|||
|
|
@ -98,6 +98,22 @@ static struct qpic_serial_nand_params qpic_serial_nand_tbl[] = {
|
|||
.check_quad_config = true,
|
||||
.name = "GD5F2GQ5REYIH",
|
||||
},
|
||||
{
|
||||
.id = { 0xc8, 0x25 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 4096,
|
||||
.spare_size = 64,
|
||||
.density = 0x20000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "GD5F4GQ6REYIHR",
|
||||
},
|
||||
{
|
||||
.id = { 0x2c, 0x15 },
|
||||
.page_size = 2048,
|
||||
|
|
@ -114,15 +130,159 @@ static struct qpic_serial_nand_params qpic_serial_nand_tbl[] = {
|
|||
.check_quad_config = false,
|
||||
.name = "MT29F1G01ABBFDWB-IT",
|
||||
},
|
||||
{
|
||||
.id = { 0xef, 0xbc },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 1024,
|
||||
.spare_size = 64,
|
||||
.density = 0x08000000,
|
||||
.otp_region = 0x5000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "W25N01JW",
|
||||
},
|
||||
{
|
||||
.id = { 0xc8, 0x11 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 1024,
|
||||
.spare_size = 64,
|
||||
.density = 0x08000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = false,
|
||||
.name = "F50D1G41LB(2M)",
|
||||
},
|
||||
{
|
||||
.id = { 0xc8, 0x41 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 2048,
|
||||
.spare_size = 128,
|
||||
.density = 0x08000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 8,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "GD5F1GQ5REYIG",
|
||||
},
|
||||
{
|
||||
.id = { 0xc8, 0x21 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 1024,
|
||||
.spare_size = 64,
|
||||
.density = 0x08000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "GD5F1GQ5REYIH",
|
||||
},
|
||||
{
|
||||
.id = { 0xef, 0xbf },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 2048,
|
||||
.spare_size = 64,
|
||||
.density = 0x10000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "W25N02JWZEIF",
|
||||
},
|
||||
{
|
||||
.id = { 0xc2, 0x92 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 1024,
|
||||
.spare_size = 64,
|
||||
.density = 0x08000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "MX35UF1GE4AC",
|
||||
},
|
||||
{
|
||||
.id = { 0xc8, 0x51 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 2048,
|
||||
.spare_size = 128,
|
||||
.density = 0x10000000,
|
||||
.otp_region = 0xF000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 8,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "F50D2G41KA-83YIG2V",
|
||||
},
|
||||
{
|
||||
.id = { 0xe5, 0x21 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 1024,
|
||||
.spare_size = 64,
|
||||
.density = 0x08000000,
|
||||
.otp_region = 0xF000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 4,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "DS35M1GA",
|
||||
},
|
||||
{
|
||||
.id = { 0xc8, 0x42 },
|
||||
.page_size = 2048,
|
||||
.erase_blk_size = 0x00020000,
|
||||
.pgs_per_blk = 64,
|
||||
.no_of_blocks = 2048,
|
||||
.spare_size = 128,
|
||||
.density = 0x10000000,
|
||||
.otp_region = 0x2000,
|
||||
.no_of_addr_cycle = 0x3,
|
||||
.num_bits_ecc_correctability = 8,
|
||||
.timing_mode_support = 0,
|
||||
.quad_mode = true,
|
||||
.check_quad_config = true,
|
||||
.name = "GD5F2GQ5REYIG",
|
||||
},
|
||||
};
|
||||
struct qpic_serial_nand_params *serial_params;
|
||||
#define MICRON_DEVICE_ID 0x152c152c
|
||||
#define WINBOND_DEVICE_ID 0x0021bcef
|
||||
#define CMD3_MASK 0xfff0ffff
|
||||
/*
|
||||
* An array holding the fixed pattern to compare with
|
||||
* training pattern.
|
||||
*/
|
||||
|
||||
static const unsigned int training_block_64[] = {
|
||||
0x0F0F0F0F, 0x0F0F0F0F, 0x0F0F0F0F, 0x0F0F0F0F,
|
||||
0x0F0F0F0F, 0x0F0F0F0F, 0x0F0F0F0F, 0x0F0F0F0F,
|
||||
|
|
@ -782,7 +942,7 @@ static void qpic_serial_update_dev_params(struct mtd_info *mtd)
|
|||
mtd->ecc_strength = 8;
|
||||
else
|
||||
mtd->ecc_strength = 4;
|
||||
printf("Serial NAND device Manufature:%s\n",serial_params->name);
|
||||
printf("Serial NAND device Manufacturer:%s\n",serial_params->name);
|
||||
printf("Device Size:%d MiB, Page size:%d, Spare Size:%d, ECC:%d-bit\n",
|
||||
(int)(dev->density >> 20), dev->page_size, mtd->oobsize, mtd->ecc_strength);
|
||||
}
|
||||
|
|
@ -1247,14 +1407,14 @@ int qpic_spi_nand_config(struct mtd_info *mtd)
|
|||
qspi_debug("%s : Quad bit not enabled.\n",__func__);
|
||||
qspi_debug("%s : Issuning set feature command to enable it.\n",
|
||||
__func__);
|
||||
|
||||
/* Enable quad bit */
|
||||
status = qpic_serial_set_feature(mtd, FLASH_SPI_NAND_FR_ADDR,
|
||||
FLASH_SPI_NAND_FR_QUAD_ENABLE);
|
||||
if (status < 0) {
|
||||
printf("%s : Error in enabling Quad bit.\n",__func__);
|
||||
return status;
|
||||
printf("%s : Error in enabling Quad bit.\n",__func__);
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Read status again to know wether Quad bit enabled or not */
|
||||
status = qpic_serial_get_feature(mtd, FLASH_SPI_NAND_FR_ADDR);
|
||||
if (status < 0) {
|
||||
|
|
@ -1266,16 +1426,39 @@ int qpic_spi_nand_config(struct mtd_info *mtd)
|
|||
qspi_debug("%s:Quad mode not enabled,so use x1 Mode.\n",
|
||||
__func__);
|
||||
dev->quad_mode = false;
|
||||
return 0;
|
||||
} else {
|
||||
qspi_debug("%s: Quad mode enabled. using X4 mode\n",__func__);
|
||||
return 0;
|
||||
}
|
||||
} else {
|
||||
qspi_debug("%s: Quad mode enabled on Opwer on.\n",__func__);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (dev->id == WINBOND_DEVICE_ID) {
|
||||
status = qpic_serial_get_feature(mtd, FLASH_SPI_NAND_FR_ADDR);
|
||||
if (status < 0) {
|
||||
printf("%s : Error in getting feature.\n",__func__);
|
||||
return status;
|
||||
}
|
||||
|
||||
if (!((status >> 8) & FLASH_SPI_NAND_FR_BUFF_ENABLE)) {
|
||||
qspi_debug("%s :continous buffer mode disabled\n",
|
||||
__func__);
|
||||
qspi_debug("%s : Issuing set feature command to enable it\n",
|
||||
__func__);
|
||||
status = qpic_serial_set_feature(mtd, FLASH_SPI_NAND_FR_ADDR,
|
||||
(FLASH_SPI_NAND_FR_BUFF_ENABLE | (status >> 8)));
|
||||
if (status < 0) {
|
||||
printf("%s : Error in disabling continous buffer bit.\n",
|
||||
__func__);
|
||||
return status;
|
||||
}
|
||||
} else {
|
||||
qspi_debug("%s : continous buffer mode enabled on power on\n",
|
||||
__func__);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
|
|
@ -685,18 +685,27 @@ static void gephy_mdac_edac_config(ipq_gmac_board_cfg_t *gmac_cfg)
|
|||
(phy_data | phy_dac)
|
||||
);
|
||||
mdelay(1);
|
||||
/*set edac value*/
|
||||
/*
|
||||
|| set edac value debug register write follows indirect
|
||||
|| adressing so first write address in port address and
|
||||
|| write value in data register
|
||||
*/
|
||||
ipq5018_mdio_write(gmac_cfg->phy_addr,
|
||||
QCA808X_DEBUG_PORT_ADDRESS,
|
||||
MPGE_PHY_DEBUG_EDAC);
|
||||
phy_data = ipq5018_mdio_read(
|
||||
gmac_cfg->phy_addr,
|
||||
MPGE_PHY_DEBUG_EDAC,
|
||||
NULL
|
||||
);
|
||||
QCA808X_DEBUG_PORT_DATA,
|
||||
NULL);
|
||||
|
||||
phy_data &= ~(MPGE_PHY_MMD1_DAC_MASK);
|
||||
ipq5018_mdio_write(
|
||||
gmac_cfg->phy_addr,
|
||||
MPGE_PHY_DEBUG_EDAC,
|
||||
(phy_data | phy_dac)
|
||||
);
|
||||
|
||||
ipq5018_mdio_write(gmac_cfg->phy_addr,
|
||||
QCA808X_DEBUG_PORT_ADDRESS,
|
||||
MPGE_PHY_DEBUG_EDAC);
|
||||
ipq5018_mdio_write(gmac_cfg->phy_addr,
|
||||
QCA808X_DEBUG_PORT_DATA,
|
||||
(phy_data | phy_dac));
|
||||
mdelay(1);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -22,6 +22,8 @@
|
|||
#include "ipq5018_uniphy.h"
|
||||
#include "ipq_phy.h"
|
||||
|
||||
static uint32_t cur_mode;
|
||||
|
||||
static int ppe_uniphy_calibration(void)
|
||||
{
|
||||
int retries = 100, calibration_done = 0;
|
||||
|
|
@ -59,6 +61,7 @@ static void ppe_gcc_uniphy_soft_reset(void)
|
|||
|
||||
static void ppe_uniphy_sgmii_mode_set(uint32_t mode)
|
||||
{
|
||||
uint32_t phy_mode = 0x70;
|
||||
writel(UNIPHY_MISC2_REG_SGMII_MODE,
|
||||
PPE_UNIPHY_BASE + UNIPHY_MISC2_REG_OFFSET);
|
||||
|
||||
|
|
@ -93,14 +96,20 @@ static void ppe_uniphy_sgmii_mode_set(uint32_t mode)
|
|||
case PORT_WRAPPER_SGMII_PLUS:
|
||||
writel((UNIPHY_SG_PLUS_MODE | UNIPHY_PSGMII_MAC_MODE),
|
||||
PPE_UNIPHY_BASE + PPE_UNIPHY_MODE_CONTROL);
|
||||
phy_mode = 0x30;
|
||||
break;
|
||||
|
||||
default:
|
||||
printf("SGMII Config. wrongly");
|
||||
break;
|
||||
}
|
||||
if ((cur_mode == PORT_WRAPPER_SGMII_PLUS) ||
|
||||
(mode == PORT_WRAPPER_SGMII_PLUS)){
|
||||
cur_mode = mode;
|
||||
ppe_gcc_uniphy_soft_reset();
|
||||
}
|
||||
|
||||
ppe_gcc_uniphy_soft_reset();
|
||||
writel(phy_mode, PPE_UNIPHY_BASE + PPE_UNIPHY_ALLREG_DEC_MISC2);
|
||||
|
||||
writel(0x1, GCC_UNIPHY_RX_CBCR);
|
||||
udelay(500);
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#define GCC_GMAC1_RX_CBCR 0x01868248
|
||||
#define GCC_GMAC1_TX_CBCR 0x0186824C
|
||||
|
||||
#define GCC_UNIPHY0_MISC 0x01856004
|
||||
#define GCC_UNIPHY0_MISC 0x01856104
|
||||
|
||||
#define PPE_UNIPHY_OFFSET_CALIB_4 0x1E0
|
||||
#define UNIPHY_CALIBRATION_DONE 0x1
|
||||
|
|
@ -33,6 +33,7 @@
|
|||
|
||||
#define PPE_UNIPHY_BASE 0x00098000
|
||||
#define PPE_UNIPHY_MODE_CONTROL 0x46C
|
||||
#define PPE_UNIPHY_ALLREG_DEC_MISC2 0x218
|
||||
#define UNIPHY_XPCS_MODE (1 << 12)
|
||||
#define UNIPHY_SG_PLUS_MODE (1 << 11)
|
||||
#define UNIPHY_SG_MODE (1 << 10)
|
||||
|
|
|
|||
|
|
@ -200,9 +200,9 @@ union ipo_action_u {
|
|||
#define IPQ6018_PPE_PORT_QCOM1 0x1
|
||||
#define IPQ6018_PPE_PORT_QCOM2 0x2
|
||||
#define IPQ6018_PPE_PORT_QCOM3 0x3
|
||||
#define IPQ6018_PPE_PORT_QCOM4 0x4
|
||||
#define IPQ6018_PPE_PORT_XGMAC1 0x5
|
||||
#define IPQ6018_PPE_PORT_XGMAC2 0x6
|
||||
#define IPQ6018_PPE_PORT_QCOM4 0x6
|
||||
#define IPQ6018_PPE_PORT_XGMAC1 0x4
|
||||
#define IPQ6018_PPE_PORT_XGMAC2 0x5
|
||||
#define IPQ6018_PPE_PORT_CRYPTO1 0x7
|
||||
#define IPQ6018_PPE_PORT_BRIDGE_CTRL_PROMISC_EN 0x20000
|
||||
#define IPQ6018_PPE_PORT_BRIDGE_CTRL_TXMAC_EN 0x10000
|
||||
|
|
|
|||
|
|
@ -182,7 +182,6 @@ typedef struct {
|
|||
* Cache flush and invalidation based on L1 cache, so the cache line
|
||||
* size is configured to 64 */
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 64
|
||||
#define CONFIG_CMD_CACHE
|
||||
|
||||
#define CONFIG_QCA_BAM 1
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -329,7 +329,6 @@ extern loff_t board_env_size;
|
|||
|
||||
#else
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
#define CONFIG_CMD_CACHE
|
||||
|
||||
/* Multicore CPU support */
|
||||
#define CONFIG_SMP_CMD_SUPPORT
|
||||
|
|
|
|||
|
|
@ -348,7 +348,6 @@ extern loff_t board_env_size;
|
|||
* Cache flush and invalidation based on L1 cache, so the cache line
|
||||
* size is configured to 64 */
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 64
|
||||
#define CONFIG_CMD_CACHE
|
||||
/*#define CONFIG_SYS_DCACHE_OFF*/
|
||||
|
||||
/* Enabling this flag will report any L2 errors.
|
||||
|
|
|
|||
|
|
@ -347,7 +347,6 @@ typedef struct {
|
|||
* Cache flush and invalidation based on L1 cache, so the cache line
|
||||
* size is configured to 64 */
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 64
|
||||
#define CONFIG_CMD_CACHE
|
||||
/*#define CONFIG_SYS_DCACHE_OFF*/
|
||||
|
||||
/* Enabling this flag will report any L2 errors.
|
||||
|
|
|
|||
|
|
@ -334,7 +334,6 @@ extern loff_t board_env_size;
|
|||
* Cache flush and invalidation based on L1 cache, so the cache line
|
||||
* size is configured to 64 */
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 64
|
||||
#define CONFIG_CMD_CACHE
|
||||
|
||||
/* Enabling this flag will report any L2 errors.
|
||||
* By default we are disabling it */
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
* in the DNS response as net_server_ip. This can then be used for any other
|
||||
* network related activities.
|
||||
*
|
||||
* The packet handling is partly based on TADNS, original copyrights
|
||||
* The packet handling is partly based on TADNS, original copyrights
|
||||
* follow below.
|
||||
*
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -89,7 +89,7 @@ memory_size = "default"
|
|||
lk = "false"
|
||||
skip_4k_nand = "false"
|
||||
atf = "false"
|
||||
qcn9100 = "false"
|
||||
qcn6122 = "false"
|
||||
tiny_16m = "false"
|
||||
|
||||
# Note: ipq806x didn't expose any relevant version */
|
||||
|
|
@ -759,9 +759,25 @@ class Pack(object):
|
|||
machid_list.append(machid)
|
||||
|
||||
script.start_if_or("machid", machid_list)
|
||||
script.start_activity("Flashing wifi_fw volume:")
|
||||
script.imxtract("wifi_fw_" + wifi_fw_type + "-" + sha1(fw_filename))
|
||||
script.append('flash wifi_fw', fatal=False)
|
||||
script.start_activity("Flashing " + fw_filename[:-13] + ":")
|
||||
script.imxtract(fw_filename[:-13] + "-" + sha1(fw_filename))
|
||||
|
||||
rootfs_info = self.__get_part_info("rootfs")
|
||||
rootfs_offset = rootfs_info.offset
|
||||
rootfs_len = rootfs_info.length
|
||||
|
||||
wifi_fw_cmd = "setenv mtdids nand0=nand0\n"
|
||||
wifi_fw_cmd += "setenv mtdparts mtdparts=nand0:0x%x@0x%x(rootfs)\n" % (rootfs_len,rootfs_offset)
|
||||
wifi_fw_cmd += "ubi part rootfs\n"
|
||||
img_size = self.__get_img_size(fw_filename)
|
||||
wifi_fw_cmd += "ubi write $fileaddr wifi_fw %x" % img_size
|
||||
script.append(wifi_fw_cmd, fatal=False)
|
||||
|
||||
#Enable the below lines for debugging purpose
|
||||
"""
|
||||
script.append("mtdparts", fatal=False)
|
||||
script.append("ubi info layout", fatal=False)
|
||||
"""
|
||||
|
||||
script.finish_activity()
|
||||
script.end_if()
|
||||
|
|
@ -838,14 +854,14 @@ class Pack(object):
|
|||
return 1
|
||||
|
||||
script.start_if_or("machid", machid_list)
|
||||
script.start_activity("Flashing %s_%s:" % ( section_conf, wifi_fw_type ))
|
||||
script.start_activity("Flashing %s:" % ( filename[:-13] ))
|
||||
|
||||
if img_size > 0:
|
||||
filename_pad = filename + ".padded"
|
||||
if ((self.flinfo.type == 'nand' or self.flinfo.type == 'emmc') and (size != img_size)):
|
||||
script.imxtract(section_conf + "_" + wifi_fw_type + "-" + sha1(filename_pad))
|
||||
script.imxtract(filename[:-13] + "-" + sha1(filename_pad))
|
||||
else:
|
||||
script.imxtract(section_conf + "_" + wifi_fw_type + "-" + sha1(filename))
|
||||
script.imxtract(filename[:-13] + "-" + sha1(filename))
|
||||
|
||||
part_size = Pack.norplusnand_rootfs_img_size
|
||||
if part_info == None:
|
||||
|
|
@ -1250,7 +1266,7 @@ class Pack(object):
|
|||
try:
|
||||
diff_soc_ver_files = section.attrib['diff_soc_ver_files']
|
||||
except KeyError, e:
|
||||
if (qcn9100 == "true" or tiny_16m == "true") and 'wififw_type_min' in section.attrib:
|
||||
if (qcn6122 == "true" or tiny_16m == "true") and 'wififw_type_min' in section.attrib:
|
||||
wifi_fw_type_min = section.attrib['wififw_type_min']
|
||||
wifi_fw_type_max = section.attrib['wififw_type_max']
|
||||
else:
|
||||
|
|
@ -1316,7 +1332,7 @@ class Pack(object):
|
|||
if flinfo.type != "emmc":
|
||||
img = section.find('img_name')
|
||||
|
||||
if img != None and 'wififw_type' in img.attrib and (qcn9100 == "true" or tiny_16m == "true"):
|
||||
if img != None and 'wififw_type' in img.attrib and (qcn6122 == "true" or tiny_16m == "true"):
|
||||
imgs = section.findall('img_name')
|
||||
try:
|
||||
for img in imgs:
|
||||
|
|
@ -1413,7 +1429,7 @@ class Pack(object):
|
|||
if ret == 0:
|
||||
return 0
|
||||
|
||||
if self.flash_type in [ "nand", "nand-4k", "norplusnand", "norplusnand-4k" ] and partition == "rootfs" and qcn9100 == "true":
|
||||
if self.flash_type in [ "nand", "nand-4k", "norplusnand", "norplusnand-4k" ] and partition == "rootfs" and qcn6122 == "true":
|
||||
|
||||
fw_imgs = section.findall('img_name')
|
||||
for fw_img in fw_imgs:
|
||||
|
|
@ -1554,7 +1570,7 @@ class Pack(object):
|
|||
elif section_conf == "wififw" and self.flash_type in ["nand", "nand-4k", "nand-audio", "nand-audio-4k", "norplusnand", "norplusnand-4k"]:
|
||||
section_conf = "wififw_ubi"
|
||||
elif section_conf == "wififw" and wifi_fw_type:
|
||||
section_conf = section_conf + "_" + wifi_fw_type
|
||||
section_conf = filename[:-13]
|
||||
|
||||
if soc_version:
|
||||
section_conf = section_conf + "_v" + str(soc_version)
|
||||
|
|
@ -1567,7 +1583,7 @@ class Pack(object):
|
|||
|
||||
def __gen_script_append_images_wififw_ubi_volume(self, fw_filename, wifi_fw_type, images):
|
||||
|
||||
image_info = ImageInfo("wifi_fw_" + wifi_fw_type + "-" + sha1(fw_filename),
|
||||
image_info = ImageInfo(fw_filename[:-13] + "-" + sha1(fw_filename),
|
||||
fw_filename, "firmware")
|
||||
if fw_filename.lower() != "none":
|
||||
if image_info not in images:
|
||||
|
|
@ -1692,7 +1708,7 @@ class Pack(object):
|
|||
diff_soc_ver_files = section.attrib['diff_soc_ver_files']
|
||||
partition = section.attrib['label']
|
||||
except KeyError, e:
|
||||
if (qcn9100 == "true" or tiny_16m == "true") and 'wififw_type_min' in section.attrib:
|
||||
if (qcn6122 == "true" or tiny_16m == "true") and 'wififw_type_min' in section.attrib:
|
||||
wifi_fw_type_min = section.attrib['wififw_type_min']
|
||||
wifi_fw_type_max = section.attrib['wififw_type_max']
|
||||
partition = section.attrib['label']
|
||||
|
|
@ -1758,7 +1774,7 @@ class Pack(object):
|
|||
|
||||
img = section.find('img_name')
|
||||
|
||||
if img != None and 'wififw_type' in img.attrib and (qcn9100 == "true" or tiny_16m == "true"):
|
||||
if img != None and 'wififw_type' in img.attrib and (qcn6122 == "true" or tiny_16m == "true"):
|
||||
imgs = section.findall('img_name')
|
||||
try:
|
||||
for img in imgs:
|
||||
|
|
@ -1863,7 +1879,7 @@ class Pack(object):
|
|||
if filename != "":
|
||||
self.__gen_script_append_images(filename, soc_version, wifi_fw_type, images, flinfo, root, section_conf, partition)
|
||||
|
||||
if self.flash_type in [ "nand", "nand-4k", "norplusnand", "norplusnand-4k" ] and section_conf == "rootfs" and qcn9100 == "true":
|
||||
if self.flash_type in [ "nand", "nand-4k", "norplusnand", "norplusnand-4k" ] and section_conf == "rootfs" and qcn6122 == "true":
|
||||
|
||||
fw_imgs = section.findall('img_name')
|
||||
try:
|
||||
|
|
@ -1906,7 +1922,7 @@ class Pack(object):
|
|||
|
||||
its_fp.write(its_data)
|
||||
its_fp.close()
|
||||
|
||||
|
||||
try:
|
||||
cmd = [SRC_DIR + "/mkimage", "-f", self.its_fname, self.img_fname]
|
||||
ret = subprocess.call(cmd)
|
||||
|
|
@ -2213,7 +2229,7 @@ class ArgParser(object):
|
|||
global lk
|
||||
global atf
|
||||
global skip_4k_nand
|
||||
global qcn9100
|
||||
global qcn6122
|
||||
|
||||
"""Start the parsing process, and populate members with parsed value.
|
||||
|
||||
|
|
@ -2223,7 +2239,7 @@ class ArgParser(object):
|
|||
cdir = os.path.abspath(os.path.dirname(""))
|
||||
if len(sys.argv) > 1:
|
||||
try:
|
||||
opts, args = getopt(sys.argv[1:], "", ["arch=", "fltype=", "srcPath=", "inImage=", "outImage=", "image_type=", "memory=", "lk", "skip_4k_nand", "atf", "qcn9100"])
|
||||
opts, args = getopt(sys.argv[1:], "", ["arch=", "fltype=", "srcPath=", "inImage=", "outImage=", "image_type=", "memory=", "lk", "skip_4k_nand", "atf", "qcn6122"])
|
||||
except GetoptError, e:
|
||||
raise UsageError(e.msg)
|
||||
|
||||
|
|
@ -2258,8 +2274,8 @@ class ArgParser(object):
|
|||
elif option =="--skip_4k_nand":
|
||||
skip_4k_nand = "true"
|
||||
|
||||
elif option == "--qcn9100":
|
||||
qcn9100 = "true"
|
||||
elif option == "--qcn6122":
|
||||
qcn6122 = "true"
|
||||
|
||||
#Verify Arguments passed by user
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue