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drivers: net: ipq9574: Update PPE TDM/Sched Config

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Change-Id: I992de44db5dd5a6d28b3bd54ddcc005d0c46acc9
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This commit is contained in:
Selvam Sathappan Periakaruppan 2022-02-22 16:12:04 +05:30 • committed by Gerrit - the friendly Code Review server
parent 1f1a5ed7b6
commit be07da4a76
1 changed files with 0 additions and 78 deletions
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78
drivers/net/ipq9574/ipq9574_ppe.c
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@ -624,86 +624,9 @@ static void ipq9574_ppe_tdm_configuration(void)
ipq9574_ppe_reg_write(0xc730, 0x35);
ipq9574_ppe_reg_write(0xc740, 0x20);
ipq9574_ppe_reg_write(0xc750, 0x36);
ipq9574_ppe_reg_write(0xc760, 0x2E);
ipq9574_ppe_reg_write(0xc770, 0x03);
ipq9574_ppe_reg_write(0xc780, 0x1A);
ipq9574_ppe_reg_write(0xc790, 0x1C);
ipq9574_ppe_reg_write(0xc7a0, 0x12);
ipq9574_ppe_reg_write(0xc7b0, 0x1);
ipq9574_ppe_reg_write(0xc7c0, 0xE);
ipq9574_ppe_reg_write(0xc7d0, 0x5);
ipq9574_ppe_reg_write(0xc7e0, 0x32);
ipq9574_ppe_reg_write(0xc7f0, 0x31);
ipq9574_ppe_reg_write(0xb000, 0x80000076);
}
/*
* ipq9574_ppe_sched_configuration
*/
static void ipq9574_ppe_sched_configuration(void)
{
ipq9574_ppe_reg_write(0x0047a000, 0x15CF65);
ipq9574_ppe_reg_write(0x0047a010, 0x159F76);
ipq9574_ppe_reg_write(0x0047a020, 0x153F17);
ipq9574_ppe_reg_write(0x0047a030, 0x153F56);
ipq9574_ppe_reg_write(0x0047a040, 0x15BD01);
ipq9574_ppe_reg_write(0x0047a050, 0x15DD65);
ipq9574_ppe_reg_write(0x0047a060, 0x15DE20);
ipq9574_ppe_reg_write(0x0047a070, 0x15DE65);
ipq9574_ppe_reg_write(0x0047a080, 0x159F06);
ipq9574_ppe_reg_write(0x0047a090, 0x15BB52);
ipq9574_ppe_reg_write(0x0047a0a0, 0x15FA60);
ipq9574_ppe_reg_write(0x0047a0b0, 0x15BE56);
ipq9574_ppe_reg_write(0x0047a0c0, 0x159F05);
ipq9574_ppe_reg_write(0x0047a0d0, 0x15DE60);
ipq9574_ppe_reg_write(0x0047a0e0, 0x157E57);
ipq9574_ppe_reg_write(0x0047a0f0, 0x155F65);
ipq9574_ppe_reg_write(0x0047a100, 0x159F76);
ipq9574_ppe_reg_write(0x0047a110, 0x15BE30);
ipq9574_ppe_reg_write(0x0047a120, 0x15BE56);
ipq9574_ppe_reg_write(0x0047a130, 0x15B703);
ipq9574_ppe_reg_write(0x0047a140, 0x15D765);
ipq9574_ppe_reg_write(0x0047a150, 0x15DE40);
ipq9574_ppe_reg_write(0x0047a160, 0x15DE65);
ipq9574_ppe_reg_write(0x0047a170, 0x159F06);
ipq9574_ppe_reg_write(0x0047a180, 0x15AF54);
ipq9574_ppe_reg_write(0x0047a190, 0x15EE60);
ipq9574_ppe_reg_write(0x0047a1a0, 0x15BE16);
ipq9574_ppe_reg_write(0x0047a1b0, 0x159F25);
ipq9574_ppe_reg_write(0x0047a1c0, 0x15DE60);
ipq9574_ppe_reg_write(0x0047a1d0, 0x157E57);
ipq9574_ppe_reg_write(0x0047a1e0, 0x155F05);
ipq9574_ppe_reg_write(0x0047a1f0, 0x159F36);
ipq9574_ppe_reg_write(0x0047a200, 0x15BE50);
ipq9574_ppe_reg_write(0x0047a210, 0x15BE76);
ipq9574_ppe_reg_write(0x0047a220, 0x15BD01);
ipq9574_ppe_reg_write(0x0047a230, 0x15DD65);
ipq9574_ppe_reg_write(0x0047a240, 0x159F06);
ipq9574_ppe_reg_write(0x0047a250, 0x159F75);
ipq9574_ppe_reg_write(0x0047a260, 0x15DE60);
ipq9574_ppe_reg_write(0x0047a270, 0x15FA52);
ipq9574_ppe_reg_write(0x0047a280, 0x15DB05);
ipq9574_ppe_reg_write(0x0047a290, 0x159F76);
ipq9574_ppe_reg_write(0x0047a2a0, 0x159F05);
ipq9574_ppe_reg_write(0x0047a2b0, 0x159F16);
ipq9574_ppe_reg_write(0x0047a2c0, 0x15BE50);
ipq9574_ppe_reg_write(0x0047a2d0, 0x15DE65);
ipq9574_ppe_reg_write(0x0047a2e0, 0x159F06);
ipq9574_ppe_reg_write(0x0047a2f0, 0x159F25);
ipq9574_ppe_reg_write(0x0047a300, 0x159F06);
ipq9574_ppe_reg_write(0x0047a310, 0x15BE50);
ipq9574_ppe_reg_write(0x0047a320, 0x15BE65);
ipq9574_ppe_reg_write(0x0047a330, 0x159F36);
ipq9574_ppe_reg_write(0x0047a340, 0x159F05);
ipq9574_ppe_reg_write(0x0047a350, 0x159F46);
ipq9574_ppe_reg_write(0x0047a360, 0x15BE50);
ipq9574_ppe_reg_write(0x0047a370, 0x157E67);
ipq9574_ppe_reg_write(0x0047a380, 0x157753);
ipq9574_ppe_reg_write(0x0047a390, 0x15F660);
ipq9574_ppe_reg_write(0x0047a3a0, 0x15EE54);
ipq9574_ppe_reg_write(0x00400000, 0x3b);
}
/*
* ipq9574_ppe_c_sp_cfg_tbl_drr_id_set
*/
@ -876,7 +799,6 @@ void ipq9574_ppe_provision_init(void)
/* tdm/sched configuration */
ipq9574_ppe_tdm_configuration();
ipq9574_ppe_sched_configuration();
#ifdef CONFIG_IPQ9574_BRIDGED_MODE
/* Add CPU port 0 to VSI 2 */