serial clock rate is now fixed.
GCNT timer needs to be initialized.
Change-Id: Ia66ff458a4c66cfb6cf9fa5fd4953498ef3b656d
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
DDR base address is now fixed to be at 0x40000000 and this patch
changes u-boot load address in accordance with that.
Change-Id: I13d0da43a7b0db0e6e322e3828e42da46ebd53cb
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
This patch has the initial changes required to make the
qca_mmc driver buildable. Also added the Kconfig
options required for the qca_mmc driver.
Change-Id: I15c0e9288ae5c7ae361659dff1e84b619de989a8
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
GCNT is already enabled by SBL, hence this could be avoided
in u-boot.
Change-Id: I207f0085f015ea7c5e80d8d20c0af95e498a9565
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
changing timer load value to 64 bit data type
Change-Id: I09a35980e5ac15fdfdae3896e7f04ef87b403894
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
Relocation is disabled as u-boot is loaded already in DDR
Change-Id: I087daf6e9a93b4ae3ff0236915474599359f3373
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
Porting serial driver from IPQ806x u-boot for IPQ807x
Change-Id: I860af26485231d5634f33422ca5cb7a0219e6125
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
Due to a limitation removed in an earlier patch, USB tests were not seeing
all the devices. Update the tests to pass now that all devices are visible.
Signed-off-by: Simon Glass <sjg@chromium.org>
'sf command' should receive the length in sector boundaries, so fix it
accordingly.
Also, show the steps to set the server and board IP addresses for
making the steps clearer.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
We currently support various versions of Solidrun mx6 boards, so
remove the obsolete comment.
Reported-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Since commit 59370f3fcd ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:
Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.
As per the AR8035 datasheet:
"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."
So do as suggested and keep the reset low for 10ms.
Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Tom Rini <trini@konsulko.com>
When trying to access non-existent/unsupported PCI devices in
ls_pcie_read_config(), when ls_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
