mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-09 10:47:41 +01:00
dm: ipq807x: DM conversion for serial driver
Change-Id: I08290d0f8f690bc4899adfe08bf7b698105bc9a3 Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
This commit is contained in:
Manoharan Vijaya Raghavan
Gerrit - the friendly Code Review server
parent
a538f6e602
commit
7138d8ac1f
3 changed files with 96 additions and 75 deletions
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@ -19,6 +19,7 @@
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compatible = "qca,ipq-uartdm";
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reg = <0x78b0000 0x200>;
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id = <2>;
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bit_rate = <0xff>;
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};
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timer {
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@ -5,7 +5,7 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_ARCH_IPQ807x_SERIAL) += qcom_uart.o
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obj-$(CONFIG_ARCH_IPQ807x) += qcom_uart.o
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ifdef CONFIG_DM_SERIAL
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obj-y += serial-uclass.o
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obj-$(CONFIG_PL01X_SERIAL) += serial_pl01x.o
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@ -37,15 +37,26 @@
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#include <asm/arch-qcom-common/uart.h>
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#include <asm/arch-qcom-common/gsbi.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <linux/compiler.h>
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#include <asm/io.h>
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#include <serial.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Information about a serial port */
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struct ipq_serial_platdata {
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unsigned long reg_base; /* address of registers in physical memory */
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u8 port_id; /* uart port number */
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u8 bit_rate;
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};
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#define FIFO_DATA_SIZE 4
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#if defined CONFIG_IPQ806X
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extern board_ipq806x_params_t *gboard_param;
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#elif defined CONFIG_IPQ40XX
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extern board_ipq40xx_params_t *gboard_param;
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#endif
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static unsigned int msm_boot_uart_dm_init(unsigned int uart_dm_base);
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static unsigned int msm_boot_uart_dm_init(unsigned long uart_dm_base);
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/* Received data is valid or not */
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static int valid_data = 0;
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@ -57,7 +68,8 @@ static unsigned int word = 0;
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* msm_boot_uart_dm_init_rx_transfer - Init Rx transfer
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* @uart_dm_base: UART controller base address
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*/
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static unsigned int msm_boot_uart_dm_init_rx_transfer(unsigned int uart_dm_base)
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static unsigned int
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msm_boot_uart_dm_init_rx_transfer(unsigned long uart_dm_base)
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{
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/* Reset receiver */
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writel(MSM_BOOT_UART_DM_CMD_RESET_RX,
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@ -90,15 +102,13 @@ static unsigned int msm_boot_uart_dm_init_rx_transfer(unsigned int uart_dm_base)
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* @wait is true, else returns %MSM_BOOT_UART_DM_E_RX_NOT_READY.
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*/
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static unsigned int
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msm_boot_uart_dm_read(unsigned int *data, int *count, int wait)
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msm_boot_uart_dm_read(unsigned int *data, int *count, int wait,
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unsigned long base)
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{
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static int total_rx_data = 0;
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static int rx_data_read = 0;
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unsigned int base = 0;
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uint32_t status_reg;
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base = gboard_param->uart_dm_base;
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if (data == NULL)
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return MSM_BOOT_UART_DM_E_INVAL;
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@ -163,7 +173,7 @@ msm_boot_uart_dm_read(unsigned int *data, int *count, int wait)
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* "\r\n". Currently keeping it simple than efficient.
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*/
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static unsigned int
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msm_boot_uart_replace_lr_with_cr(char *data_in,
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msm_boot_uart_replace_lr_with_cr(const char *data_in,
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int num_of_chars,
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char *data_out, int *num_of_chars_out)
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{
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@ -193,7 +203,8 @@ msm_boot_uart_replace_lr_with_cr(char *data_in,
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* till space becomes available.
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*/
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static unsigned int
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msm_boot_uart_dm_write(char *data, unsigned int num_of_chars)
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msm_boot_uart_dm_write(const char *data, unsigned int num_of_chars,
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unsigned long base)
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{
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unsigned int tx_word_count = 0;
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unsigned int tx_char_left = 0, tx_char = 0;
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@ -201,7 +212,6 @@ msm_boot_uart_dm_write(char *data, unsigned int num_of_chars)
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int i = 0;
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char *tx_data = NULL;
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char new_data[1024];
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unsigned int base = gboard_param->uart_dm_base;
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if ((data == NULL) || (num_of_chars <= 0))
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return MSM_BOOT_UART_DM_E_INVAL;
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@ -258,7 +268,7 @@ msm_boot_uart_dm_write(char *data, unsigned int num_of_chars)
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* msm_boot_uart_dm_reset - resets UART controller
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* @base: UART controller base address
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*/
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static unsigned int msm_boot_uart_dm_reset(unsigned int base)
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static unsigned int msm_boot_uart_dm_reset(unsigned long base)
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{
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writel(MSM_BOOT_UART_DM_CMD_RESET_RX, MSM_BOOT_UART_DM_CR(base));
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writel(MSM_BOOT_UART_DM_CMD_RESET_TX, MSM_BOOT_UART_DM_CR(base));
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@ -273,7 +283,7 @@ static unsigned int msm_boot_uart_dm_reset(unsigned int base)
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* msm_boot_uart_dm_init - initilaizes UART controller
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* @uart_dm_base: UART controller base address
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*/
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static unsigned int msm_boot_uart_dm_init(unsigned int uart_dm_base)
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static unsigned int msm_boot_uart_dm_init(unsigned long uart_dm_base)
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{
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/* Configure UART mode registers MR1 and MR2 */
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/* Hardware flow control isn't supported */
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@ -338,56 +348,14 @@ static unsigned int msm_boot_uart_dm_init(unsigned int uart_dm_base)
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*
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* Initializes clocks, GPIO and UART controller.
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*/
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static void uart_dm_init(void)
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static void ipq_serial_init(struct ipq_serial_platdata *plat,
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unsigned long base)
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{
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unsigned int dm_base;
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#ifdef CONFIG_IPQ806X
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unsigned int gsbi_base;
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#endif
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dm_base = gboard_param->uart_dm_base;
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#ifdef CONFIG_IPQ806X
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gsbi_base = gboard_param->uart_gsbi_base;
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ipq_configure_gpio(gboard_param->dbg_uart_gpio, NO_OF_DBG_UART_GPIOS);
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/* Configure the uart clock */
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uart_clock_config(gboard_param->uart_gsbi,
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gboard_param->uart_mnd_value.m_value,
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gboard_param->uart_mnd_value.n_value,
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gboard_param->uart_mnd_value.d_value,
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gboard_param->clk_dummy);
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writel(GSBI_PROTOCOL_CODE_I2C_UART <<
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GSBI_CTRL_REG_PROTOCOL_CODE_S,
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GSBI_CTRL_REG(gsbi_base));
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#elif defined CONFIG_IPQ40XX
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qca_configure_gpio(gboard_param->dbg_uart_gpio, NO_OF_DBG_UART_GPIOS);
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writel(1, GCC_BLSP1_UART1_APPS_CBCR);
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#endif
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writel(UART_DM_CLK_RX_TX_BIT_RATE, MSM_BOOT_UART_DM_CSR(dm_base));
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writel(plat->bit_rate, MSM_BOOT_UART_DM_CSR(base));
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/* Intialize UART_DM */
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msm_boot_uart_dm_init(dm_base);
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}
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/**
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* serial_putc - transmits a character
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* @c: character to transmit
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*/
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void serial_putc(char c)
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{
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msm_boot_uart_dm_write(&c, 1);
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}
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/**
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* serial_puts - transmits a string of data
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* @s: string to transmit
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*/
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void serial_puts(const char *s)
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{
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while (*s != '\0')
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serial_putc(*s++);
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msm_boot_uart_dm_init(base);
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}
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/**
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@ -395,14 +363,17 @@ void serial_puts(const char *s)
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*
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* Returns 1 if data available, 0 otherwise
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*/
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int serial_tstc(void)
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static int ipq_serial_pending(struct udevice *dev, bool input)
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{
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struct ipq_serial_platdata *plat = dev->platdata;
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unsigned long base = plat->reg_base;
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/* Return if data is already read */
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if (valid_data)
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return 1;
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/* Read data from the FIFO */
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if (msm_boot_uart_dm_read(&word, &valid_data, 0) != MSM_BOOT_UART_DM_E_SUCCESS)
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if (msm_boot_uart_dm_read(&word, &valid_data, 0, base) != MSM_BOOT_UART_DM_E_SUCCESS)
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return 0;
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return 1;
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@ -413,11 +384,11 @@ int serial_tstc(void)
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*
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* Returns the character read from serial port.
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*/
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int serial_getc(void)
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static int ipq_serial_getc(struct udevice *dev)
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{
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int byte;
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while (!serial_tstc()) {
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while (!ipq_serial_pending(dev, true)) {
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WATCHDOG_RESET();
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/* wait for incoming data */
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}
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@ -432,16 +403,65 @@ int serial_getc(void)
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/*
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* serial_setbrg - sets serial baudarate
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*/
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void serial_setbrg(void)
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static int ipq_serial_setbrg(struct udevice *dev, int baudrate)
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{
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return;
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return 0;
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}
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/**
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* serial_init - initializes serial controller
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*/
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int serial_init(void)
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static int ipq_serial_putc(struct udevice *dev, const char ch)
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{
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uart_dm_init();
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return 0;
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struct ipq_serial_platdata *plat = dev->platdata;
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unsigned long base = plat->reg_base;
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return msm_boot_uart_dm_write(&ch, 1, base);
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}
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static int ipq_serial_probe(struct udevice *dev)
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{
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struct ipq_serial_platdata *plat = dev->platdata;
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unsigned long base = plat->reg_base;
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ipq_serial_init(plat, base);
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return 0;
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}
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static int ipq_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct ipq_serial_platdata *plat = dev->platdata;
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fdt_addr_t addr;
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addr = dev_get_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->reg_base = addr;
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plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
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plat->bit_rate = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"bit_rate", -1);
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return 0;
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}
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static const struct dm_serial_ops ipq_serial_ops = {
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.putc = ipq_serial_putc,
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.pending = ipq_serial_pending,
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.getc = ipq_serial_getc,
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.setbrg = ipq_serial_setbrg,
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};
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static const struct udevice_id ipq_serial_ids[] = {
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{ .compatible = "qca,ipq-uartdm" },
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{ }
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};
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U_BOOT_DRIVER(serial_ipq) = {
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.name = "serial_ipq",
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.id = UCLASS_SERIAL,
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.of_match = ipq_serial_ids,
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.ofdata_to_platdata = ipq_serial_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct ipq_serial_platdata),
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.probe = ipq_serial_probe,
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.ops = &ipq_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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