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qca: timer: added support for timer for ipq807x

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Added timer related registers in dts, processing in timer source code

Change-Id: I2496ae5cd9a0cdf6449b428a22c4ea5cadf51d88
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
This commit is contained in:
Manoharan Vijaya Raghavan 2016-03-02 15:18:41 +05:30
parent 3bdd8c2e59
commit 256e4709d3
7 changed files with 59 additions and 11 deletions
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2
arch/arm/Kconfig
View file

@ -427,6 +427,7 @@ config ARCH_IPQ807x
select DM_SERIAL
select CPU_V7
select SYS_GENERIC_BOARD
select QCA_COMMON
config ARCH_S5PC1XX
bool "Samsung S5PC1XX"
@ -853,6 +854,7 @@ source "board/vscom/baltos/Kconfig"
source "board/woodburn/Kconfig"
source "board/work-microwave/work_92105/Kconfig"
source "arch/arm/cpu/armv7/qca/common/Kconfig"
source "arch/arm/Kconfig.debug"
endmenu

1
arch/arm/cpu/armv7/Makefile
View file

@ -48,6 +48,7 @@ obj-$(CONFIG_MX7) += mx7/
obj-$(CONFIG_OMAP34XX) += omap3/
obj-$(CONFIG_OMAP44XX) += omap4/
obj-$(CONFIG_OMAP54XX) += omap5/
obj-$(CONFIG_QCA_COMMON) += qca/common/
obj-$(CONFIG_RMOBILE) += rmobile/
obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/

3
arch/arm/cpu/armv7/qca/common/Kconfig Normal file
View file

@ -0,0 +1,3 @@
config QCA_COMMON
bool "QCA Common IPs"

1
arch/arm/cpu/armv7/qca/common/Makefile Normal file
View file

@ -0,0 +1 @@
obj-y := timer.o

52
arch/arm/cpu/armv7/qca/common/timer.c
View file

@ -28,25 +28,59 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <asm/arch-ipq40xx/iomap.h>
#include <asm/io.h>
#include <common.h>
#include <asm/types.h>
#include <asm/arch-ipq40xx/timer.h>
#include <watchdog.h>
#include <fdtdec.h>
static unsigned long long timestamp;
static unsigned long long lastinc;
#define GPT_FREQ 48
#define GPT_FREQ_KHZ (GPT_FREQ * 1000)
#define GPT_FREQ_HZ (GPT_FREQ_KHZ * 1000) /* 48 MHz */
#define GPT_FREQ_HZ (ipq_timer.gpt_freq_hz)
#define GPT_FREQ_KHZ (GPT_FREQ_HZ / 1000)
#define GPT_FREQ (GPT_FREQ_KHZ / 1000)
#define TIMER_LOAD_VAL (ipq_timer.timer_load_val)
DECLARE_GLOBAL_DATA_PTR;
/* Information about timer */
static struct ipq_timer_platdata {
unsigned int gcnt_base;
unsigned int gcnt_cntcv_lo;
unsigned int gcnt_cntcv_hi;
unsigned int gpt_freq_hz;
unsigned int timer_load_val;
} ipq_timer;
/**
* timer_init - initialize timer
*/
int timer_init(void)
{
writel(1, GCNT_BASE);
int nodeoff;
nodeoff = fdt_path_offset(gd->fdt_blob, "/timer");
if (nodeoff < 0) {
WATCHDOG_RESET();
}
ipq_timer.gcnt_base = fdtdec_get_uint(gd->fdt_blob, nodeoff,
"gcnt_base", -1);
ipq_timer.gcnt_cntcv_lo = fdtdec_get_uint(gd->fdt_blob, nodeoff,
"gcnt_cntcv_lo", -1);
ipq_timer.gcnt_cntcv_hi = fdtdec_get_uint(gd->fdt_blob, nodeoff,
"gcnt_cntcv_hi", -1);
ipq_timer.gpt_freq_hz = fdtdec_get_uint(gd->fdt_blob, nodeoff,
"gpt_freq_hz", -1);
ipq_timer.timer_load_val = fdtdec_get_uint64(gd->fdt_blob, nodeoff,
"timer_load_val", -1);
writel(1, ipq_timer.gcnt_base);
return 0;
}
@ -71,9 +105,9 @@ static unsigned long long read_counter(void)
unsigned long vect_low;
repeat:
vect_hi1 = readl(GCNT_CNTCV_HI);
vect_low = readl(GCNT_CNTCV_LO);
vect_hi2 = readl(GCNT_CNTCV_HI);
vect_hi1 = readl(ipq_timer.gcnt_cntcv_hi);
vect_low = readl(ipq_timer.gcnt_cntcv_lo);
vect_hi2 = readl(ipq_timer.gcnt_cntcv_hi);
if (vect_hi1 != vect_hi2)
goto repeat;

9
arch/arm/dts/ipq807x-hk01.dtsi
View file

@ -20,5 +20,14 @@
reg = <0x78b0000 0x200>;
id = <2>;
};
timer {
gcnt_base = <0x4a1000>;
gcnt_cntcv_lo = <0x4a2000>;
gcnt_cntcv_hi = <0x4a2004>;
gpt_freq_hz = <48000000>;
timer_load_val = <0x00FFFFFF 0xFFFFFFFF>;
};
};

2
include/configs/ipq807x.h
View file

@ -41,8 +41,6 @@
* Size of malloc() pool
*/
#define CONFIG_SYS_TIMER_RATE 32768
/*
* select serial console configuration
*/