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https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-14 21:10:27 +01:00
ipq807x: mmc: Initial changes for compilable mmc driver
This patch has the initial changes required to make the qca_mmc driver buildable. Also added the Kconfig options required for the qca_mmc driver. Change-Id: I15c0e9288ae5c7ae361659dff1e84b619de989a8 Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
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6 changed files with 73 additions and 24 deletions
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@ -1,2 +1 @@
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#include <asm/arch/gpio.h>
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#include <asm-generic/gpio.h>
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@ -25,5 +25,9 @@ typedef struct {
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int qca_mmc_init(bd_t *, qca_mmc *);
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void board_mmc_deinit(void);
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#define MSM_SDC1_BASE 0x7824000
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#define MMC_IDENTIFY_MODE 0
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#define MMC_DATA_TRANSFER_MODE 1
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#define MMC_MODE_HC 0x800
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#endif /* __QCA_COMMON_H_ */
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@ -17,9 +17,12 @@
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#include <environment.h>
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#include "ipq807x.h"
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#include "../common/qca_common.h"
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DECLARE_GLOBAL_DATA_PTR;
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qca_mmc mmc_host;
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void enable_caches(void)
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{
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icache_enable();
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@ -51,3 +54,21 @@ void reset_cpu(unsigned long a)
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{
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while(1);
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}
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void emmc_clock_config(int mode)
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{
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/* TODO: To be filled */
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}
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int board_mmc_init(bd_t *bis)
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{
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int ret;
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mmc_host.base = MSM_SDC1_BASE;
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mmc_host.clk_mode = MMC_IDENTIFY_MODE;
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emmc_clock_config(mmc_host.clk_mode);
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ret = qca_mmc_init(bis, &mmc_host);
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return ret;
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}
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@ -25,6 +25,18 @@ config GENERIC_MMC
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appear as block devices in U-Boot and can support filesystems such
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as EXT4 and FAT.
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config SDHCI
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bool "Enable SDHCI controllers"
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depends on GENERIC_MMC
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help
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This enables SDHCI controllers support
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config SDHCI_QCOM
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bool "Enable Qualcomm SDHCI controllers"
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depends on SDHCI
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help
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This enables Qualcomm SDHCI controller support
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config ROCKCHIP_DWMMC
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bool "Rockchip SD/MMC controller support"
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depends on DM_MMC && OF_CONTROL
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@ -42,6 +42,7 @@ obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
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obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
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obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
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obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
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obj-$(CONFIG_SDHCI_QCOM) += qca_mmc.o
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
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@ -18,9 +18,8 @@
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#include <part.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/arch-qcom-common/clk.h>
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#include <asm-generic/errno.h>
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#include "../../board/qcom/common/qca_common.h"
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#include "../../board/qca/common/qca_common.h"
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#include "qca_mmc.h"
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static inline void qca_reg_wr_delay(qca_mmc *host)
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@ -229,7 +228,7 @@ void qca_set_ios(struct mmc *mmc)
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u32 clk = 0, pwr = 0;
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int mode;
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if (mmc->clock <= mmc->f_min) {
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if (mmc->clock <= mmc->cfg->f_min) {
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mode = MMC_IDENTIFY_MODE;
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} else {
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mode = MMC_DATA_TRANSFER_MODE;
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@ -285,37 +284,50 @@ int qca_mmc_start (struct mmc *mmc)
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return 0;
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}
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static struct mmc_ops qca_mmc_ops = {
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.send_cmd = qca_mmc_send_cmd,
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.set_ios = qca_set_ios,
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.init = qca_mmc_start
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};
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int qca_mmc_init(bd_t *bis, qca_mmc *host)
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{
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struct mmc_config *cfg;
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struct mmc *mmc;
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int ret = 0;
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mmc = malloc(sizeof(struct mmc));
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if (!mmc) {
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cfg = malloc(sizeof(struct mmc_config));
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if (!cfg) {
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return -ENOMEM;
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}
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memset(mmc, 0, sizeof(struct mmc));
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memset(cfg, 0, sizeof(struct mmc_config));
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sprintf(mmc->name, "qca_mmc");
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mmc->priv = host;
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mmc->send_cmd = qca_mmc_send_cmd;
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mmc->set_ios = qca_set_ios;
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mmc->init = qca_mmc_start;
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mmc->getcd = NULL;
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cfg->ops = &qca_mmc_ops;
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cfg->f_min = 400000;
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cfg->f_max = 52000000;
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cfg->b_max = 512;
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mmc->f_min = 400000;
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mmc->f_max = 52000000;
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mmc->b_max = 512;
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/* voltage either 2.7-3.6V or 1.70 -1.95V */
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mmc->voltages = 0x40FF8080;
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mmc->host_caps = MMC_MODE_8BIT;
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mmc->host_caps |= MMC_MODE_HC;
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cfg->voltages = 0x40FF8080;
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cfg->host_caps = MMC_MODE_8BIT;
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cfg->host_caps |= MMC_MODE_HC;
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mmc_register(mmc);
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host->mmc = mmc;
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host->dev_num = mmc->block_dev.dev;
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mmc = mmc_create(cfg, host);
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if (!mmc) {
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puts("mmc_create failed\n");
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free(cfg);
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ret = -ENODEV;
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} else {
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return 0;
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host->mmc = mmc;
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host->dev_num = mmc->block_dev.dev;
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mmc->has_init = 0;
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mmc->init_in_progress = 0;
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ret = mmc_init(mmc);
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if (ret)
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puts("mmc_init failed\n");
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}
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return ret;
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}
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