ipq807x: mmc: Initial changes for compilable mmc driver

This patch has the initial changes required to make the
qca_mmc driver buildable. Also added the Kconfig
options required for the qca_mmc driver.

Change-Id: I15c0e9288ae5c7ae361659dff1e84b619de989a8
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
This commit is contained in:
Vasudevan Murugesan 2016-04-05 18:38:16 +05:30
parent a8601af2d3
commit 80664c0da4
6 changed files with 73 additions and 24 deletions

View file

@ -1,2 +1 @@
#include <asm/arch/gpio.h>
#include <asm-generic/gpio.h>

View file

@ -25,5 +25,9 @@ typedef struct {
int qca_mmc_init(bd_t *, qca_mmc *);
void board_mmc_deinit(void);
#define MSM_SDC1_BASE 0x7824000
#define MMC_IDENTIFY_MODE 0
#define MMC_DATA_TRANSFER_MODE 1
#define MMC_MODE_HC 0x800
#endif /* __QCA_COMMON_H_ */

View file

@ -17,9 +17,12 @@
#include <environment.h>
#include "ipq807x.h"
#include "../common/qca_common.h"
DECLARE_GLOBAL_DATA_PTR;
qca_mmc mmc_host;
void enable_caches(void)
{
icache_enable();
@ -51,3 +54,21 @@ void reset_cpu(unsigned long a)
{
while(1);
}
void emmc_clock_config(int mode)
{
/* TODO: To be filled */
}
int board_mmc_init(bd_t *bis)
{
int ret;
mmc_host.base = MSM_SDC1_BASE;
mmc_host.clk_mode = MMC_IDENTIFY_MODE;
emmc_clock_config(mmc_host.clk_mode);
ret = qca_mmc_init(bis, &mmc_host);
return ret;
}

View file

@ -25,6 +25,18 @@ config GENERIC_MMC
appear as block devices in U-Boot and can support filesystems such
as EXT4 and FAT.
config SDHCI
bool "Enable SDHCI controllers"
depends on GENERIC_MMC
help
This enables SDHCI controllers support
config SDHCI_QCOM
bool "Enable Qualcomm SDHCI controllers"
depends on SDHCI
help
This enables Qualcomm SDHCI controller support
config ROCKCHIP_DWMMC
bool "Rockchip SD/MMC controller support"
depends on DM_MMC && OF_CONTROL

View file

@ -42,6 +42,7 @@ obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
obj-$(CONFIG_SDHCI_QCOM) += qca_mmc.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o

View file

@ -18,9 +18,8 @@
#include <part.h>
#include <malloc.h>
#include <asm/io.h>
#include <asm/arch-qcom-common/clk.h>
#include <asm-generic/errno.h>
#include "../../board/qcom/common/qca_common.h"
#include "../../board/qca/common/qca_common.h"
#include "qca_mmc.h"
static inline void qca_reg_wr_delay(qca_mmc *host)
@ -229,7 +228,7 @@ void qca_set_ios(struct mmc *mmc)
u32 clk = 0, pwr = 0;
int mode;
if (mmc->clock <= mmc->f_min) {
if (mmc->clock <= mmc->cfg->f_min) {
mode = MMC_IDENTIFY_MODE;
} else {
mode = MMC_DATA_TRANSFER_MODE;
@ -285,37 +284,50 @@ int qca_mmc_start (struct mmc *mmc)
return 0;
}
static struct mmc_ops qca_mmc_ops = {
.send_cmd = qca_mmc_send_cmd,
.set_ios = qca_set_ios,
.init = qca_mmc_start
};
int qca_mmc_init(bd_t *bis, qca_mmc *host)
{
struct mmc_config *cfg;
struct mmc *mmc;
int ret = 0;
mmc = malloc(sizeof(struct mmc));
if (!mmc) {
cfg = malloc(sizeof(struct mmc_config));
if (!cfg) {
return -ENOMEM;
}
memset(mmc, 0, sizeof(struct mmc));
memset(cfg, 0, sizeof(struct mmc_config));
sprintf(mmc->name, "qca_mmc");
mmc->priv = host;
mmc->send_cmd = qca_mmc_send_cmd;
mmc->set_ios = qca_set_ios;
mmc->init = qca_mmc_start;
mmc->getcd = NULL;
cfg->ops = &qca_mmc_ops;
cfg->f_min = 400000;
cfg->f_max = 52000000;
cfg->b_max = 512;
mmc->f_min = 400000;
mmc->f_max = 52000000;
mmc->b_max = 512;
/* voltage either 2.7-3.6V or 1.70 -1.95V */
mmc->voltages = 0x40FF8080;
mmc->host_caps = MMC_MODE_8BIT;
mmc->host_caps |= MMC_MODE_HC;
cfg->voltages = 0x40FF8080;
cfg->host_caps = MMC_MODE_8BIT;
cfg->host_caps |= MMC_MODE_HC;
mmc_register(mmc);
host->mmc = mmc;
host->dev_num = mmc->block_dev.dev;
mmc = mmc_create(cfg, host);
if (!mmc) {
puts("mmc_create failed\n");
free(cfg);
ret = -ENODEV;
} else {
return 0;
host->mmc = mmc;
host->dev_num = mmc->block_dev.dev;
mmc->has_init = 0;
mmc->init_in_progress = 0;
ret = mmc_init(mmc);
if (ret)
puts("mmc_init failed\n");
}
return ret;
}