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ipq807x: Enabled spi-nor flash support

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Change-Id: Id3b876e9d3c00268e608a2fcb76a30a38d965e48
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
This commit is contained in:
Vasudevan Murugesan 2016-04-21 19:44:02 +05:30
parent 1aa59e6721
commit 4cf0b0294a
2 changed files with 28 additions and 0 deletions
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8
drivers/mtd/spi/sf_params.c
View file

@ -96,7 +96,11 @@ const struct spi_flash_params spi_flash_params_table[] = {
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
#ifdef CONFIG_IPQ_RUMI
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 8192, RD_NORM, SECT_4K},
#else
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
#endif
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
@ -126,7 +130,11 @@ const struct spi_flash_params spi_flash_params_table[] = {
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
#ifdef CONFIG_IPQ_RUMI
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_NORM, SECT_4K},
#else
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
#endif
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},

20
include/configs/ipq807x.h
View file

@ -18,6 +18,11 @@
#include <generated/asm-offsets.h>
#endif
/*
* Support for IPQ807X RUMI
*/
#define CONFIG_IPQ_RUMI
/*
* Disabled for actual chip.
* #define CONFIG_RUMI
@ -79,6 +84,21 @@
#define CONFIG_MAX_RAM_BANK_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (64 << 20))
/*
* SPI Flash Configs
*/
#define CONFIG_QCA_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_GIGADEVICE
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SPI_FLASH_BAR 1
/*
* U-Boot Env Configs
*/