Commit graph

9775 commits

Author SHA1 Message Date
Linux Build Service Account
1f03ea71ae Merge "ipq6018: update q6v5 node fdt fixup for atf" 2022-01-05 00:08:13 -08:00
Linux Build Service Account
4aa902f171 Merge "ipq: Add support for failsafe boot" 2022-01-05 00:08:12 -08:00
Manikanta Mylavarapu
682a4ead16 ipq6018: update q6v5 node fdt fixup for atf
This change support both legacy and current node
configuration.

Change-Id: I2a930950472119210961238d39dd00f9482cbe6e
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
2022-01-04 11:34:39 +05:30
anusha
369ce9f09b ipq: Add support for failsafe boot
Add failsafe boot support to recover from system hang.

Signed-off-by: anusha <anusharao@codeaurora.org>
Change-Id: I49e28a4e88aa16e564065d06f8701dc4f6cb3555
2022-01-03 21:05:45 -08:00
Gokul Sriram Palanisamy
ce13c0c2fd arm: ipq807x: Update fdt fixup for SDX65 SSR GPIOs
Update ap2mdm and mdm2ap gpio fixup for Linux-5.4

Change-Id: I8813a85ed229c95dad4fbd11ec505496dbf7d93c
Signed-off-by: POOVENDHAN SELVARAJ <quic_poovendh@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
2021-12-30 09:47:59 -08:00
Linux Build Service Account
2304889c58 Merge "drivers: net: Disable RE bit for nssnoc clocks" 2021-12-15 12:10:58 -08:00
Linux Build Service Account
6f25ab30e6 Merge "arm: ipq807x: patch x65 status pinmux on linux-5.4" 2021-12-15 09:09:26 -08:00
Selvam Sathappan Periakaruppan
488378dfbc drivers: net: Disable RE bit for nssnoc clocks
Enabling the RE bit causes some issue in Kernel
when rcgr is configured.

Currently the RE bit is not set for these clocks
in Kernel as well and so reverting the same.

Change-Id: I12e29863531b64637d906026cab4374b49268cd0
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
2021-12-14 09:33:05 -08:00
Linux Build Service Account
2c734522cf Merge "drivers: net: ipq9574: Fix network configurations" 2021-12-06 23:38:46 -08:00
Selvam Sathappan Periakaruppan
e0726bab13 drivers: net: ipq9574: Fix network configurations
This patch updates the following:

1) Updates NSS NOC clock frequencies to expected clock rates
2) Add Debug prints during eth_halt which can help debug issues
3) Update ACL structure and configurations for ipq9574 platform
as required
4) Disable the MIB counters reset bit so that those counter
registers values can be dumped to check stats
5) Update VSI configurations for cases when BRIDGED_MODE config
is disabled
6) Update the VSI configuration to avoid flooding from one LAN
port to another

Change-Id: I39f20a57c08205fbeb669c93b6459cf8e184098d
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
2021-12-06 04:41:12 -08:00
Gokul Sriram Palanisamy
d615015278 arm: ipq807x: patch x65 status pinmux on linux-5.4
On Linux-5.4 dts, SDX status GPIO pinmux node has
changed. Add new patch instruction for the same.

Change-Id: I0235f2a2ee335c7f916644c87f5cd7ed16174554
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
2021-12-02 23:35:36 +05:30
Vandhiadevan Karunamoorthy
ee631ab742 ipq9574: Add support for DPR feature
The command dpr_execute <load_address_of_dpr_binary>
is defined for the user to initiate DPR processing.
Uboot will raise scm call to TZ and pass the DPR load address.

Change-Id: Ide4495b49485a4ac6b722f0cb7d423d6a93946ca
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-11-30 22:36:16 -08:00
Linux Build Service Account
784b8ffd81 Merge "ipq5018: Fixup fdt to pass qspi training offset to HLOS" 2021-11-11 22:37:06 -08:00
Rajkumar Ayyasamy
3783f390dd ipq5018: Fixup fdt to pass qspi training offset to HLOS
Change-Id: I8ba2442f4d47d02a7e8f3947c19208bb40c62ed6
Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
2021-11-09 17:02:54 +05:30
anusha
713b3ae36c ipq9574: Invoke mmc_init in set_uuid_bootargs
The MMC mode switch command gets timed out occassionally.
Due to this, set_uuid_bootargs fails and uboot doesn't
jump to kernel. This issue is seen only in norplusemmc boot.
In eMMC Boot, board_mmc_env_init is called which handles
timeout case. Added the same logic to set_uuid_bootargs.

Change-Id: Ie9eb91b00f28c23c136d88e3cb39572e59c759e7
Signed-off-by: anusha <anusharao@codeaurora.org>
2021-10-28 20:28:11 -07:00
Linux Build Service Account
b45d6d4fa5 Merge "ipq6018: update gadget_diag fdt fixup" 2021-10-28 12:38:56 -07:00
anusha
763f64bccc ipq: Pass HLOS partition info to TZ in secure_authenticate cmd
Change-Id: I82f10440c8d81c4ae591bdc5f8f5fdcf91f28719
Signed-off-by: anusha <anusharao@codeaurora.org>
2021-10-27 06:32:20 -07:00
Vandhiadevan Karunamoorthy
3abfd5c2d1 ipq6018: update gadget_diag fdt fixup
This change support both legacy and current node
configuration

Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Change-Id: I12551970f16ec09a648bac2ecb1a45edeffd997c
2021-10-27 18:40:47 +05:30
Linux Build Service Account
5f0dbcd5b1 Merge remote-tracking branch origin/win.coretech.1.0 into HEAD
Change-Id: If781dcc16344e303f237954f3025f8b10d510ff6
2021-10-04 16:38:03 +05:30
Karthick Shanmugham
63c2c3a2c5 ipq: Indicate SDx when host resets
Change-Id: I202725bffe1ecbdf69aeac4d99a6b6a010f6cbce
Signed-off-by: Karthick Shanmugham <kartshan@codeaurora.org>
2021-09-26 21:07:49 -07:00
Vandhiadevan Karunamoorthy
f1fc6e4c71 ipq9574: Pass HLOS partition info to TZ
Include SCM call to inform TZ whether HLOS boots from
primary or secondary partition

Change-Id: Ib1fa2b3c12762d1deed5b99f025c83870c142fa6
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-09-20 18:14:23 +05:30
anusha
8063318fa4 ipq9574: Update PCIE AUX clock source
Updated the source from gpll0_out_aux to gpll0_out_main

Change-Id: Iecaefbe03c02286823d1a67ea53b180bfd8d948e
Signed-off-by: anusha <anusharao@codeaurora.org>
2021-09-09 02:13:48 -07:00
Linux Build Service Account
a6c288098a Merge remote-tracking branch origin/win.coretech.1.0 into HEAD
Change-Id: I20c0dcf584bce3ac488c28fd3dc107c7f5766867
2021-09-06 10:44:52 +05:30
Kathiravan T
ff57de3611 Revert "ipq9574: add dload_warm_reset support"
This reverts commit 0488bd0d1f.

Change-Id: Ie576aa72e009058320aecbd70efbe2f292c026f6
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
2021-09-02 04:43:29 -07:00
Vandhiadevan Karunamoorthy
2bc07e0161 pci: ipq9574: Add SKU validation support
This changes add SKU validation support in PCI driver
the valdiation api given as weak for non SKU supported platform.

Change-Id: I32985be1e06e9cb07d28edfba50299bb7eaa3cc5
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-08-31 21:22:32 -07:00
Vandhiadevan Karunamoorthy
50781feff3 ipq9574: Update pci configuration
This change allign pci id with design.
This changes remove the manual id variable and use
alias id number instead.

Change-Id: I7ba481ee6e05b58a8481ccd89c6d40c4b3928e76
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-08-31 21:22:19 -07:00
Prasanna Kumar Thoorvas Samyrao Muralidharan
a4d1532bfb ipq807x: Patch x65 GPIO details based on env
Change-Id: I15464aea8696880086b1cb2bfa52e65964ecd297
Signed-off-by: Prasanna Kumar Thoorvas Samyrao Muralidharan <ptsm@codeaurora.org>
2021-08-31 20:29:48 +05:30
Selvam Sathappan Periakaruppan
01c2d98698 drivers: net: ipq9574: Add SKU Validation
Change-Id: I0993e36938eeb79ac1e810249e273c06ed5dce54
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-26 07:59:25 -07:00
Selvam Sathappan Periakaruppan
56525cc2a7 drivers: net: ipq9574: Add Support for SFP
Change-Id: I8cd09a85c03405de0c7e4b5d5ed3f5fc7fee8147
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-26 07:56:32 -07:00
Selvam Sathappan Periakaruppan
05b77e3907 ipq9574: Remove IMEM Clock config
IMEM is not needed in U-Boot. This patch removes the
IMEM Clock config.

Change-Id: I76c20b4d1fb83be958ff98edd9935aa234e6a67a
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-25 10:31:31 -07:00
Vandhiadevan Karunamoorthy
af18e13699 ipq9575: add SKU support
This change check fuse before initialize pci.

Change-Id: I2c5b17ff0c446aad7633ec35468983b5e1c85fa0
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-08-24 21:53:39 -07:00
Linux Build Service Account
7d72e805ac Merge "ipq9574: usb: 24 Mhz reference clock update" 2021-08-21 11:06:44 -07:00
Linux Build Service Account
4db2583af7 Merge "ipq9574: Fix PCIE PCS COM offset" 2021-08-20 21:06:54 -07:00
Praveenkumar I
af10e1fa4d ipq9574: usb: 24 Mhz reference clock update
Updated mock_utmi_clk to 24 MHz and use appropriate clock period.

Change-Id: I080d1d7e544b97d1911dfdc597f44fcb37a7d906
Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
2021-08-20 10:41:43 -07:00
Vandhiadevan Karunamoorthy
0488bd0d1f ipq9574: add dload_warm_reset support
This features skip crashdump path if its set
and disable sdi path

Change-Id: I9e51efc5940920e06671de231ed09f66e2cf4646
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-08-20 04:40:53 -07:00
Praveenkumar I
4730d3fa31 ipq9574: Fix PCIE PCS COM offset
Change-Id: Ifd0416940231b8923324aa0de1567a8cee5016f3
Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
2021-08-19 16:41:29 +05:30
Selvam Sathappan Periakaruppan
00277b03ad drivers: net: ipq9574: uniphy clock init update
Uniphy clk init and deinit creates additional delay in UBoot.
Falling back to Uniphy clk init during boot up and not doing
de-init during speed changes.

Change-Id: I10fb86e4b616f46c2a0c3066308e7c6a6325cf44
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-19 03:34:03 -07:00
Selvam Sathappan Periakaruppan
de094207d3 drivers: net: ipq9574: Move net functions inside EDMA config
Change-Id: I24e60a3726d01abcd27136f4c126652771a198ca
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-18 10:14:18 -07:00
Linux Build Service Account
929ee5398b Merge remote-tracking branch origin/win.coretech.1.0 into HEAD
Change-Id: I02e357adcfe906716a752ecd99b3cf0fecb7e62f
2021-08-17 12:44:22 +05:30
Selvam Sathappan Periakaruppan
4f92f7e93e drivers: net: ipq9574: Update Eth configurations
This patch updates the following:

1) Removes unnecessary TIMER and THRESHOLD configurations in EDMA
2) Adds Uniphy Clock deinit and init in eth_init (during each ping
& speed change)
3) Removes preheader configurations and calculations from EDMA
as there are no preheaders in ipq9574 platform (Instead there is
a secondary descriptor)
4) Add sufficient delay after uniphy reset
5) Remove CONFIG_IPQ9574_RUMI macro from network drivers
6) Change default mac_speed to 0
7) Fix the ppe sched. and tdm configuration
8) Reduce the block size to 1280 + headers for tftp (around 1326)
for timebeing without which timeouts were observed randomly during
TFTP (Note that the MTU is 1514 bytes)

Change-Id: I4004adfb2ae0dc98d65e458c15dafcff6523744b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-11 10:28:21 -07:00
Karthick Shanmugham
590a4b2d9a ipq806x: Disabling usb_init in recovery path for AK alone
This patch skips the usb_init during recovery path for AK platform alone.
No checks for usb_init for all other platforms

Change-Id: I3720f7e159d95bb6656df06ec9aeccfd02f3db01
Signed-off-by: Karthick Shanmugham <kartshan@codeaurora.org>
2021-08-11 16:04:35 +05:30
Selvam Sathappan Periakaruppan
ba61e78389 drivers: net: ipq9574: Add separate QCA8075 phy driver
Previous platforms assume qca8075 phy address starts from
0. This patch adds a separate qca8075 phy driver for ipq9574
platform and handles cases where qca8075 phy addr doesn't
start with 0.

Change-Id: I59a596d692b1663af638af358335056661bdf199
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-08 04:20:03 -07:00
Selvam Sathappan Periakaruppan
eeeee570e7 ipq9574: Fix eth init during boot up
This patch fixes the array initialization and
also updates the typo in Kconfig file.

Change-Id: I7fb06da17491a156bd4bd13771ce1f2583715dc5
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-08 04:19:58 -07:00
Selvam Sathappan Periakaruppan
29c2f25f72 drivers: net: ipq9574: Clean up drivers
This patch does the following:

1) Removes unused macros and functions
2) Updates EDMA Reset address and assert/de-assert values
3) Updates Port5 and Port6 address in uniphy clock config
4) Reduces delay to 500 us in usxgmii uniphy mode set
5) Disable clearing of mac counters

Change-Id: I7cc9b20bbd4f2367d9f405ae2e5652d6236476a9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-08 04:19:51 -07:00
Selvam Sathappan Periakaruppan
0679e63be7 ipq9574: Clean up eth initialization
This patch does the following:

1) Adds separate function for each init
2) Calls the above individual init functions from eth_init function
which is then called in board_eth_init which is called from the core
network driver stack during boot up.
3) Adds CMN_BLK init which is needed for NSS

Change-Id: I0e5c07bf42f3473b80f524470217879f81c22b1b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-01 04:15:19 -07:00
Selvam Sathappan Periakaruppan
a6631b0ee5 drivers: net: ipq9574: Update AQ Driver
This patch does the following:

1) Enables AQ Driver Compilation.
2) Updates malloc size to fixed value of 512 KB (size of ETHPHYFW Partition)
which is actually 1024 KB as per QSPI Nand Flash partition (considering the
bad block size also). While reading bad blocks will be skipped, and the
firmware size is not expected to exceed 512 KB and hence this size is updated.
Also note, the heap size is currently 1 MB and so if we try do malloc for 1 MB,
we might get failures during allocation.
3) Adds QSPI NAND Flash Support.

Change-Id: I5a6e19b1462b648523ce6b311128a447e34241b4
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-08-01 04:12:54 -07:00
Vandhiadevan Karunamoorthy
1139fab2a6 ipq9574: Add eMMC gpio initialization
Change-Id: I195549e196f30a40743a014cd7e092a824f6b4a0
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-07-28 19:53:35 +05:30
Vandhiadevan Karunamoorthy
44a15e92ad ipq9574: update usb phy sequence
Change-Id: I8d6707731b526c19dd1c1e5de3d55f46d2dfc08a
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
2021-07-28 10:39:31 +05:30
Selvam Sathappan Periakaruppan
027fa4db92 ipq9574: Enable NSS_NOC clocks required for ethernet
In order to access DDR from NSS Block, we require the
MEM NOC to be enabled. Without enabling this, NSS Block
will not be able to access the DDR.

Similarly, we also enable other NSS NOC clocks which
are required for accessing various blocks.

Change-Id: I3c470bd182516f3415ff3b7e523e9474e3e6ed41
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
2021-07-27 22:47:40 +05:30
Linux Build Service Account
85e6f1ca5a Merge "ipq9574: clock: Fix typo" 2021-07-26 11:13:09 -07:00