arm: ipq807x: Update fdt fixup for SDX65 SSR GPIOs

Update ap2mdm and mdm2ap gpio fixup for Linux-5.4

Change-Id: I8813a85ed229c95dad4fbd11ec505496dbf7d93c
Signed-off-by: POOVENDHAN SELVARAJ <quic_poovendh@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
This commit is contained in:
Gokul Sriram Palanisamy 2021-12-30 22:53:26 +05:30 committed by Gerrit - the friendly Code Review server
parent 93937d92f3
commit ce13c0c2fd

View file

@ -1036,6 +1036,9 @@ int sdx65_attached(void)
void fdt_fixup_sdx65_gpio(void *blob)
{
unsigned int machid = gd->bd->bi_arch_number;
int offset, len;
u32 *data;
if (machid != 0x08010400)
return;
@ -1044,17 +1047,41 @@ void fdt_fixup_sdx65_gpio(void *blob)
parse_fdt_fixup("/soc/pci@20000000/%add%x65_attached", blob);
parse_fdt_fixup("/soc/pci@20000000/%x65_attached%1", blob);
parse_fdt_fixup("/soc/pci@20000000/pcie0_rp/qcom,mhi@0/%mdm2ap%21", blob);
parse_fdt_fixup("/soc/pci@20000000/pcie0_rp/qcom,mhi@0/%ap2mdm%45", blob);
if (fdt_path_offset(blob, "/soc/pinctrl@1000000/ap2mdm_status/") >= 0) {
parse_fdt_fixup("/soc/pinctrl@1000000/ap2mdm_status/%pins%?gpio45", blob);
parse_fdt_fixup("/soc/pinctrl@1000000/mdm2ap_e911_status/%pins%?gpio22", blob);
} else if (fdt_path_offset(blob, "/soc/pinctrl@1000000/pcie_sdx_pinmux/") >= 0) {
/* On Linux-5.4, sdx status gpio pinmux node has changed */
parse_fdt_fixup("/soc/pinctrl@1000000/pcie_sdx_pinmux/ap2mdm_status/%pins%?gpio45", blob);
parse_fdt_fixup("/soc/pinctrl@1000000/pcie_sdx_pinmux/mdm2ap_e911_status/%pins%?gpio22", blob);
offset = fdt_path_offset(blob, "/soc/pci@20000000/pcie0_rp/qcom,mhi@0");
if(offset >= 0) {
data = (u32 *)fdt_getprop(blob, offset, "mdm2ap", &len);
if (data) {
parse_fdt_fixup("/soc/pci@20000000/pcie0_rp/qcom,mhi@0/%mdm2ap%21", blob);
} else {
data = (u32 *)fdt_getprop(blob, offset, "mdm2ap-gpio", &len);
if (data) {
data[1] = cpu_to_fdt32(21);
fdt_setprop_inplace(blob, offset, "mdm2ap-gpio", data, len);
}
}
data = (u32 *)fdt_getprop(blob, offset, "ap2mdm", &len);
if (data) {
parse_fdt_fixup("/soc/pci@20000000/pcie0_rp/qcom,mhi@0/%ap2mdm%45", blob);
} else {
data = (u32 *)fdt_getprop(blob, offset, "ap2mdm-gpio", &len);
if (data) {
data[1] = cpu_to_fdt32(45);
fdt_setprop_inplace(blob, offset, "ap2mdm-gpio", data, len);
}
}
}
if (fdt_path_offset(blob, "/soc/pinctrl@1000000/ap2mdm_status") >= 0)
parse_fdt_fixup("/soc/pinctrl@1000000/ap2mdm_status/%pins%?gpio45", blob);
else if (fdt_path_offset(blob, "/soc/pinctrl@1000000/pcie_sdx_pinmux/ap2mdm_status") >= 0)
parse_fdt_fixup("/soc/pinctrl@1000000/pcie_sdx_pinmux/ap2mdm_status/%pins%?gpio45", blob);
if (fdt_path_offset(blob, "/soc/pinctrl@1000000/mdm2ap_e911_status/") >= 0)
parse_fdt_fixup("/soc/pinctrl@1000000/mdm2ap_e911_status/%pins%?gpio22", blob);
else if (fdt_path_offset(blob, "/soc/pinctrl@1000000/pcie_sdx_pinmux/mdm2ap_e911_status") >= 0)
parse_fdt_fixup("/soc/pinctrl@1000000/pcie_sdx_pinmux/mdm2ap_e911_status/%pins%?gpio22", blob);
}
#ifdef CONFIG_USB_XHCI_IPQ