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ipq9574: Update pci configuration

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This change allign pci id with design.
This changes remove the manual id variable and use
alias id number instead.

Change-Id: I7ba481ee6e05b58a8481ccd89c6d40c4b3928e76
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
This commit is contained in:
Vandhiadevan Karunamoorthy 2021-08-26 07:52:48 +05:30 • committed by Gerrit - the friendly Code Review server
parent 8b02b5f5d3
commit 50781feff3
5 changed files with 161 additions and 138 deletions
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40
arch/arm/dts/ipq9574-al02-c1.dts
View file

@ -21,8 +21,10 @@
console = "/serial@78B1000";
uart2 = "/serial@78B2000";
usb0 = "/xhci@8a00000";
pci0 = "/pci@20000000";
pci1 = "/pci@18000000";
pci0 = "/pci@28000000";
pci1 = "/pci@10000000";
pci2 = "/pci@20000000";
pci3 = "/pci@18000000";
nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78B8000";
};
@ -126,7 +128,37 @@
};
};
pci0: pci@20000000 {
pci0: pci@28000000 {
status = "ok";
perst_gpio = <23>;
pci_gpio {
pci_rst {
gpio = <23>;
func = <0>;
pull = <GPIO_PULL_UP>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci1: pci@10000000 {
status = "ok";
perst_gpio = <26>;
pci_gpio {
pci_rst {
gpio = <26>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci2: pci@20000000 {
status = "ok";
perst_gpio = <29>;
pci_gpio {
@ -141,7 +173,7 @@
};
};
pci1: pci@18000000 {
pci3: pci@18000000 {
status = "ok";
perst_gpio = <32>;
pci_gpio {

72
arch/arm/dts/ipq9574-db-al01-c1.dts
View file

@ -21,10 +21,10 @@
console = "/serial@78B1000";
uart2 = "/serial@78B2000";
usb0 = "/xhci@8a00000";
pci0 = "/pci@20000000";
pci1 = "/pci@18000000";
pci2 = "/pci@28000000";
pci3 = "/pci@10000000";
pci0 = "/pci@28000000";
pci1 = "/pci@10000000";
pci2 = "/pci@20000000";
pci3 = "/pci@18000000";
nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78B8000";
};
@ -148,37 +148,7 @@
};
};
pci0: pci@20000000 {
status = "ok";
perst_gpio = <29>;
pci_gpio {
pci_rst {
gpio = <29>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci1: pci@18000000 {
status = "ok";
perst_gpio = <32>;
pci_gpio {
pci_rst {
gpio = <32>;
func = <0>;
pull = <GPIO_PULL_UP>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci2: pci@28000000 {
pci0: pci@28000000 {
status = "ok";
perst_gpio = <23>;
pci_gpio {
@ -193,7 +163,7 @@
};
};
pci3: pci@10000000 {
pci1: pci@10000000 {
status = "ok";
perst_gpio = <26>;
pci_gpio {
@ -208,6 +178,36 @@
};
};
pci2: pci@20000000 {
status = "ok";
perst_gpio = <29>;
pci_gpio {
pci_rst {
gpio = <29>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci3: pci@18000000 {
status = "ok";
perst_gpio = <32>;
pci_gpio {
pci_rst {
gpio = <32>;
func = <0>;
pull = <GPIO_PULL_UP>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
ess-switch {
switch_mac_mode0 = <PORT_WRAPPER_PSGMII>;
switch_mac_mode1 = <PORT_WRAPPER_USXGMII>;

72
arch/arm/dts/ipq9574-db-al02-c1.dts
View file

@ -20,10 +20,10 @@
aliases {
console = "/serial@78B1000";
uart2 = "/serial@78B2000";
pci0 = "/pci@20000000";
pci1 = "/pci@18000000";
pci2 = "/pci@28000000";
pci3 = "/pci@10000000";
pci0 = "/pci@28000000";
pci1 = "/pci@10000000";
pci2 = "/pci@20000000";
pci3 = "/pci@18000000";
usb0 = "/xhci@8a00000";
nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78B8000";
@ -148,37 +148,7 @@
};
};
pci0: pci@20000000 {
status = "ok";
perst_gpio = <29>;
pci_gpio {
pci_rst {
gpio = <29>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci1: pci@18000000 {
status = "ok";
perst_gpio = <32>;
pci_gpio {
pci_rst {
gpio = <32>;
func = <0>;
pull = <GPIO_PULL_UP>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci2: pci@28000000 {
pci0: pci@28000000 {
status = "ok";
perst_gpio = <23>;
pci_gpio {
@ -193,7 +163,7 @@
};
};
pci3: pci@10000000 {
pci1: pci@10000000 {
status = "ok";
perst_gpio = <26>;
pci_gpio {
@ -208,6 +178,36 @@
};
};
pci2: pci@20000000 {
status = "ok";
perst_gpio = <29>;
pci_gpio {
pci_rst {
gpio = <29>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
pci3: pci@18000000 {
status = "ok";
perst_gpio = <32>;
pci_gpio {
pci_rst {
gpio = <32>;
func = <0>;
pull = <GPIO_PULL_UP>;
oe = <GPIO_OD_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
drvstr = <GPIO_8MA>;
};
};
};
ess-switch {
switch_mac_mode0 = <PORT_WRAPPER_PSGMII>;
switch_mac_mode1 = <PORT_WRAPPER_SGMII_PLUS>;

88
arch/arm/dts/ipq9574-soc.dtsi
View file

@ -162,7 +162,7 @@
reg = <0x8a00000 0xcd00>;
};
pci@28000000 {
pci0: pci@28000000 {
compatible = "qcom,ipq9574-pcie";
#address-cells = <1>;
#size-cells = <1>;
@ -180,52 +180,9 @@
lane = <1>;
status = "disabled";
skip_phy_int = <0>;
id = <0>;
};
pci@20000000 {
compatible = "qcom,ipq9574-pcie";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x20000000 0xf1d
0x88000 0x3000
0x20000F20 0xa8
0x20001000 0x1000
0x20300000 0xd00000
0x20100000 0x100000
0x1829000 0x60
0x8c000 0x1000>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;
lane = <2>;
status = "disabled";
skip_phy_int = <0>;
id = <2>;
};
pci@18000000 {
compatible = "qcom,ipq9574-pcie";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x18000000 0xf1d
0xF0000 0x3000
0x18000F20 0xa8
0x18001000 0x1000
0x18300000 0xd00000
0x18100000 0x100000
0x182A000 0x60
0xF4000 0x1000>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;
lane = <2>;
status = "disabled";
skip_phy_int = <0>;
id = <3>;
};
pci@10000000 {
pci1: pci@10000000 {
compatible = "qcom,ipq9574-pcie";
#address-cells = <1>;
#size-cells = <1>;
@ -243,7 +200,46 @@
lane = <1>;
status = "disabled";
skip_phy_int = <0>;
id = <1>;
};
pci2: pci@20000000 {
compatible = "qcom,ipq9574-pcie";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x20000000 0xf1d
0x88000 0x3000
0x20000F20 0xa8
0x20001000 0x1000
0x20300000 0xd00000
0x20100000 0x100000
0x1829000 0x60
0x8c000 0x1000>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;
lane = <2>;
status = "disabled";
skip_phy_int = <0>;
};
pci3: pci@18000000 {
compatible = "qcom,ipq9574-pcie";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x18000000 0xf1d
0xF0000 0x3000
0x18000F20 0xa8
0x18001000 0x1000
0x18300000 0xd00000
0x18100000 0x100000
0x182A000 0x60
0xF4000 0x1000>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;
lane = <2>;
status = "disabled";
skip_phy_int = <0>;
};
timer {

27
board/qca/arm/ipq9574/ipq9574.c
View file

@ -478,7 +478,7 @@ int ipq_sku_pci_validation(int pci_id)
void board_pci_init(int id)
{
int node, gpio_node, pci_no;
int node, gpio_node;
char name[16];
snprintf(name, sizeof(name), "pci%d", id);
@ -488,24 +488,18 @@ void board_pci_init(int id)
return;
}
pci_no = fdtdec_get_int(gd->fdt_blob, node, "id", 0);
if (ipq_sku_pci_validation(pci_no)){
printf("PCIe%d disabled \n", pci_no);
}
gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "pci_gpio");
if (gpio_node >= 0)
qca_gpio_init(gpio_node);
pcie_v2_clock_init(pci_no);
pcie_v2_clock_init(id);
return;
}
void board_pci_deinit()
{
int node, gpio_node, i, err, pci_no, is_x2;
int node, gpio_node, i, err, is_x2;
char name[16];
struct fdt_resource parf;
struct fdt_resource pci_phy;
@ -517,17 +511,18 @@ void board_pci_deinit()
printf("Could not find PCI%d in device tree\n", i);
continue;
}
err = fdt_get_named_resource(gd->fdt_blob, node, "reg", "reg-names", "parf",
&parf);
err = fdt_get_named_resource(gd->fdt_blob, node, "reg",
"reg-names", "parf", &parf);
writel(0x0, parf.start + 0x358);
writel(0x1, parf.start + 0x40);
err = fdt_get_named_resource(gd->fdt_blob, node, "reg", "reg-names", "pci_phy",
&pci_phy);
err = fdt_get_named_resource(gd->fdt_blob, node, "reg",
"reg-names", "pci_phy", &pci_phy);
if (err < 0)
continue;
pci_no = fdtdec_get_int(gd->fdt_blob, node, "id", 0);
if ((pci_no == 0) || (pci_no == 1))
if ((i == 0) || (i == 1))
is_x2 = 0;
else
is_x2 = 1;
@ -539,7 +534,7 @@ void board_pci_deinit()
if (gpio_node >= 0)
qca_gpio_deinit(gpio_node);
pcie_v2_clock_deinit(pci_no);
pcie_v2_clock_deinit(i);
}
return ;