Currently if CONFIG_QCA8084_PHY is enabled means, it will build
all qca8084 functions required for both PHY & switch mode. But,
some ipq devices might uses anyone of them. So, add configs to
seperate the PHY & switch mode and define it in corresponding
defconfig file as per the need.
Also, some of the qca8084 functions will be used only for debug
purpose, those functions are moved under the config QCA8084_DEBUG.
Thereby, we can save some space in the u-boot.
Change-Id: I7e5f53869629a0c7cbbb12daf04ed782c9693623
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This size of clock identifier string is large, so which
in-turn reflects in the size of the qca8084_clk object file,
and thus increase uboot size. By reducing the clk identifier
string size, we can save around 0.9K.
Change-Id: Ic986155b6cc2692d67e9c855928ce8039d294d3f
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
Currently, bottom level apis such as qca8084 clk and pinconf
functions are defined as inline functions, which took around
1.3K memory in the uboot. So, update those functions to non-
inline functions to save that space.
Change-Id: I2972ca80d7df80a72d4a027e790400f391546d4b
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
In qca8084 phy mode, each phy is assigned to one mac in the ipq9574,
where as in the switch mode, only mac1 will used for all the 4 ports
of the qca8084, mac2-4 will be left unused. So, updated the
logic to update the link status of the individual ports, when qca8084
is in switch mode.
Change-Id: I128c3eafb7c85c0db9d252e047457ea8820df368
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch renames the GCC macro which was added
for QCA8084 PHY to fix the conflict with similar
macro defined in ipq5018 platform.
Additionally, this patch also moves all QCA8084
macro definitions in MDIO driver under QCA8084_PHY
config.
Change-Id: Icd62bf260ffeae64bf67c0c1a58afb6ac4999e22
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch adds initial support for qca8084 PHY
which is based on qca8081 PHY.
qca8084 PHY has support for 4x2.5G.
Change-Id: Ic767c19fad050e5ee9a97ad7fa50c1b6b27893dd
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch removes the redundant udelay's and
ipq_mdio_wait_busy calls which in turn reduces
the overall AQ FW Load time.
Change-Id: I31f3a940d743528ed212e8cccab522ac249a5a5a
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch does the following:
1) Adds support for AQR113C_B0 and AQR113C_B1 AQ PHY versions
which will be used in ipq9574 platform
2) Adds delay of 100 ms after FW download before calling phy
init which is necessary in ipq9574 platform without which the
init doesn't happen properly as expected
Change-Id: I50be933e68598ada5e3d9df71c3e3abcc79c52d2
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Removes unused/duplicate macro: NSS_CC_PORT1_RX_CBCR_ADDR
2) Remove CMN_BLK_INIT
3) Update MAX Ports to 6
4) Rename switch_mac_mode to switch_mac_mode0 in DTS and driver
5) Fix SYSNOC frequency configuration
6) Tx/Rx descs is initialized to 0 before use which is
needed because Alder DDR is not init to 0 by default.
Change-Id: Ide22e146f9c8ecb75585d0a8d04e426c463ad8c9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Add support for 3 switch_mac_modes in ipq9574 platform.
2) Update xpcs and soft_reset as needed for ipq9574 platform.
3) Support usecase where 5*1G ports can be supported as part
of Uniphy0 during when Uniphy1 won't be used.
Change-Id: I949db117fa3c8adb937c5c055eedcaa6ead0da07
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the VSI settings. The VSI Table size has
now changes from 3 word to 4 word and the same has been
accomodated. Without writing 4 words to that Table, the VSI
writes won't be processed by the H/W.
This patch updates the scheduling, TDM configuration
and the ppe port mux configuration as required for ipq95xx.
This patch also moves the configurations not required
for EMU Platform to !CONFIG_IPQ9574_RUMI.
Change-Id: Id54e40d26e80c36e7a61642d8494c30bbd3ea2a5
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This command helps to debug the phy issues.
Change-Id: If8354d6826795d9ef9d44112582d3b911963bda5
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
MDIO clock divider is set to 0x7 (counts to 8)
to produce 12.5MHz (100MHz/8) MDC frequency.
Change-Id: Ic7969aebf9fcbb14601ba8e56563959ab0b25657
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
ipq40xx, ipq807x hardware share the qca8033 phy. So the qca8033 phy
driver has been moved to common directory for use by both the
hardware.
Change-Id: Ic972f00770c9e3cbaf4d727df21f19cd926ddce2
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
ipq40xx, ipq807x hardware share the qca8075 phy. So the qca8075 phy
mdio, driver has been moved to common directory for use by both the
hardware.
Change-Id: Id6e9342438ffbdf8599860df6fbb39bba30429b3
Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org>
