Uniphy clk init and deinit creates additional delay in UBoot.
Falling back to Uniphy clk init during boot up and not doing
de-init during speed changes.
Change-Id: I10fb86e4b616f46c2a0c3066308e7c6a6325cf44
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Removes unnecessary TIMER and THRESHOLD configurations in EDMA
2) Adds Uniphy Clock deinit and init in eth_init (during each ping
& speed change)
3) Removes preheader configurations and calculations from EDMA
as there are no preheaders in ipq9574 platform (Instead there is
a secondary descriptor)
4) Add sufficient delay after uniphy reset
5) Remove CONFIG_IPQ9574_RUMI macro from network drivers
6) Change default mac_speed to 0
7) Fix the ppe sched. and tdm configuration
8) Reduce the block size to 1280 + headers for tftp (around 1326)
for timebeing without which timeouts were observed randomly during
TFTP (Note that the MTU is 1514 bytes)
Change-Id: I4004adfb2ae0dc98d65e458c15dafcff6523744b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch skips the usb_init during recovery path for AK platform alone.
No checks for usb_init for all other platforms
Change-Id: I3720f7e159d95bb6656df06ec9aeccfd02f3db01
Signed-off-by: Karthick Shanmugham <kartshan@codeaurora.org>
Previous platforms assume qca8075 phy address starts from
0. This patch adds a separate qca8075 phy driver for ipq9574
platform and handles cases where qca8075 phy addr doesn't
start with 0.
Change-Id: I59a596d692b1663af638af358335056661bdf199
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch fixes the array initialization and
also updates the typo in Kconfig file.
Change-Id: I7fb06da17491a156bd4bd13771ce1f2583715dc5
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Removes unused macros and functions
2) Updates EDMA Reset address and assert/de-assert values
3) Updates Port5 and Port6 address in uniphy clock config
4) Reduces delay to 500 us in usxgmii uniphy mode set
5) Disable clearing of mac counters
Change-Id: I7cc9b20bbd4f2367d9f405ae2e5652d6236476a9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Adds separate function for each init
2) Calls the above individual init functions from eth_init function
which is then called in board_eth_init which is called from the core
network driver stack during boot up.
3) Adds CMN_BLK init which is needed for NSS
Change-Id: I0e5c07bf42f3473b80f524470217879f81c22b1b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Enables AQ Driver Compilation.
2) Updates malloc size to fixed value of 512 KB (size of ETHPHYFW Partition)
which is actually 1024 KB as per QSPI Nand Flash partition (considering the
bad block size also). While reading bad blocks will be skipped, and the
firmware size is not expected to exceed 512 KB and hence this size is updated.
Also note, the heap size is currently 1 MB and so if we try do malloc for 1 MB,
we might get failures during allocation.
3) Adds QSPI NAND Flash Support.
Change-Id: I5a6e19b1462b648523ce6b311128a447e34241b4
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
In order to access DDR from NSS Block, we require the
MEM NOC to be enabled. Without enabling this, NSS Block
will not be able to access the DDR.
Similarly, we also enable other NSS NOC clocks which
are required for accessing various blocks.
Change-Id: I3c470bd182516f3415ff3b7e523e9474e3e6ed41
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Removes unused/duplicate macro: NSS_CC_PORT1_RX_CBCR_ADDR
2) Remove CMN_BLK_INIT
3) Update MAX Ports to 6
4) Rename switch_mac_mode to switch_mac_mode0 in DTS and driver
5) Fix SYSNOC frequency configuration
6) Tx/Rx descs is initialized to 0 before use which is
needed because Alder DDR is not init to 0 by default.
Change-Id: Ide22e146f9c8ecb75585d0a8d04e426c463ad8c9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates GPIO configs using macros
which makes it more readable and easy to understand
or modify the configurations in future as required.
Change-Id: I785008072947035a580b0b39c43cbaf51e77a386
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Updates drive strength of all PHY GPIOs to 8MA
2) Updates MDC GPIO_PULL to "NO_PULL" and MDIO GPIO_PULL
to "PULL_UP"
3) Removes redundant GPIO_OE bit configuration
Change-Id: Ic33ccbb8413b5b99a9718ad67ebbc069982f44db
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the QCA PHY names and its references
accordingly.
Change-Id: I5d301fcecc49793387a50487bf2e713a5a9288e8
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This change skip USB init if EUD is enable.
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Change-Id: I26b4177b1b4fdf08ab3fbff81a71eb09c3b8b4a3
This patch sets the function select as mdc_mdio and also
adds AQUANTIA, QCA80xx PHY ASSERT and DE-ASSERT support.
Change-Id: Ib606b51342df4e80d705271cc661f6fbe1664ed0
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org
During boot flow, when u-boot enters into u-boot,
eth init must be done. This patch adds support for
the same.
Change-Id: I00c39308e2f9afde59abae5b8a71fa281a7b3b51
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
