DB-AL02 variants by default has support for 4x1G, 1x2.5G and
1x10G ethernet ports.
Change-Id: Ic3821acce4f743582292dc9655da8d238c3f6709
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
The main features of DB-AL02-C1 are as below:
Flash: SPI NOR, QSPI NAND
RAM: DDR4
PCIe: M.2 SSD
Ethernet: 1x10G, 1x2.5G, 5x1G
USB: 1xUSB3
PMIC: I2C based MPS
Only change in DB-AL02-C2 is that it can support:
Flash: eMMC with rework
Other features are same as DB-AL02-C1
Change-Id: Ia52dffb1ecd832d89bbe183bd8d32bf2d0351d90
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This change enable compressed dtb support for memory
optimization.
Change-Id: I692b4cbfe339910c9bb67da6bb442ba01b3a177e
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Uniphy clk init and deinit creates additional delay in UBoot.
Falling back to Uniphy clk init during boot up and not doing
de-init during speed changes.
Change-Id: I10fb86e4b616f46c2a0c3066308e7c6a6325cf44
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch clears the ubi_initialized flag after doing ubi_exit since
there can be chance to ubi_int failure, but still ubi_initialized flag
will be set. This will result in doing ubi_exit again and uboot crash.
This patch also doing put_mtd_device after deleting mtd partition to
make the ref count to zero.
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Change-Id: I5a875ec82266db6b09045602b5d1b3fe47d4bd58
This patch updates the following:
1) Removes unnecessary TIMER and THRESHOLD configurations in EDMA
2) Adds Uniphy Clock deinit and init in eth_init (during each ping
& speed change)
3) Removes preheader configurations and calculations from EDMA
as there are no preheaders in ipq9574 platform (Instead there is
a secondary descriptor)
4) Add sufficient delay after uniphy reset
5) Remove CONFIG_IPQ9574_RUMI macro from network drivers
6) Change default mac_speed to 0
7) Fix the ppe sched. and tdm configuration
8) Reduce the block size to 1280 + headers for tftp (around 1326)
for timebeing without which timeouts were observed randomly during
TFTP (Note that the MTU is 1514 bytes)
Change-Id: I4004adfb2ae0dc98d65e458c15dafcff6523744b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch skips the usb_init during recovery path for AK platform alone.
No checks for usb_init for all other platforms
Change-Id: I3720f7e159d95bb6656df06ec9aeccfd02f3db01
Signed-off-by: Karthick Shanmugham <kartshan@codeaurora.org>
By default DB-AL01 supports 4 Malibu, 1 AQ and 1 Napa.
This patch updates the nodes accordingly to support this
default configuration.
Change-Id: I4fbf97ed65e1f38d0bb50a5e82746bf2d807fa66
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Previous platforms assume qca8075 phy address starts from
0. This patch adds a separate qca8075 phy driver for ipq9574
platform and handles cases where qca8075 phy addr doesn't
start with 0.
Change-Id: I59a596d692b1663af638af358335056661bdf199
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch fixes the array initialization and
also updates the typo in Kconfig file.
Change-Id: I7fb06da17491a156bd4bd13771ce1f2583715dc5
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Removes unused macros and functions
2) Updates EDMA Reset address and assert/de-assert values
3) Updates Port5 and Port6 address in uniphy clock config
4) Reduces delay to 500 us in usxgmii uniphy mode set
5) Disable clearing of mac counters
Change-Id: I7cc9b20bbd4f2367d9f405ae2e5652d6236476a9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This change also remove emulation dts since
build issue due to i2c duplicate
Change-Id: I28e0ffa1dd275c6ba416ded91756589ffe886631
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
This patch does the following:
1) Adds support for AQR113C_B0 and AQR113C_B1 AQ PHY versions
which will be used in ipq9574 platform
2) Adds delay of 100 ms after FW download before calling phy
init which is necessary in ipq9574 platform without which the
init doesn't happen properly as expected
Change-Id: I50be933e68598ada5e3d9df71c3e3abcc79c52d2
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Adds separate function for each init
2) Calls the above individual init functions from eth_init function
which is then called in board_eth_init which is called from the core
network driver stack during boot up.
3) Adds CMN_BLK init which is needed for NSS
Change-Id: I0e5c07bf42f3473b80f524470217879f81c22b1b
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the macro used for modes and also additionally
increases the delay between uniphy reset as needed for ipq9574
platform
Change-Id: Ide565e071963e17abd4f8f7e5d6270849d729b21
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Updates per port port mac reset
2) Updates XGMAC based on port instead of based on Uniphy as needed
for ipq9574 platform
3) uniphy_port5_clock_source_set -> If uniphy1 is not used, then
it is assumed that the first uniphy supports 5 Malibu and so accordingly
clock source is set by calling this function in that scenario
Change-Id: I978043cfa277fa02dadee5070b94f7a77ed81a5f
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch does the following:
1) Enables AQ Driver Compilation.
2) Updates malloc size to fixed value of 512 KB (size of ETHPHYFW Partition)
which is actually 1024 KB as per QSPI Nand Flash partition (considering the
bad block size also). While reading bad blocks will be skipped, and the
firmware size is not expected to exceed 512 KB and hence this size is updated.
Also note, the heap size is currently 1 MB and so if we try do malloc for 1 MB,
we might get failures during allocation.
3) Adds QSPI NAND Flash Support.
Change-Id: I5a6e19b1462b648523ce6b311128a447e34241b4
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
In order to access DDR from NSS Block, we require the
MEM NOC to be enabled. Without enabling this, NSS Block
will not be able to access the DDR.
Similarly, we also enable other NSS NOC clocks which
are required for accessing various blocks.
Change-Id: I3c470bd182516f3415ff3b7e523e9474e3e6ed41
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch updates the following:
1) Removes unused/duplicate macro: NSS_CC_PORT1_RX_CBCR_ADDR
2) Remove CMN_BLK_INIT
3) Update MAX Ports to 6
4) Rename switch_mac_mode to switch_mac_mode0 in DTS and driver
5) Fix SYSNOC frequency configuration
6) Tx/Rx descs is initialized to 0 before use which is
needed because Alder DDR is not init to 0 by default.
Change-Id: Ide22e146f9c8ecb75585d0a8d04e426c463ad8c9
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This patch removes RUMI flag which will enable the
PHY, clock, reset, etc. needed for RDPs.
Change-Id: I5459281967cacb6362c5be846ccc377b7ce5ef3d
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
