This patch updates the edma init, ppe port mux
and uniphy config to enable support for the NAPA
ports.
Change-Id: I638d3251b5843e5491cca9eea6859a5840d8567a
Signed-off-by: speriaka <speriaka@codeaurora.org>
This patch adds ppe configs to support all
ipq6018 RDPs
Change-Id: Ief77106f46c2023f0f29322588850c1d1018d30a
Signed-off-by: speriaka <speriaka@codeaurora.org>
This device is non onfi device, so adding the device id
and oob information in the nand_ids table.
1.pagesize:2048 bytes
2.oob size:128bytes
3.Ecc:8bits for 512 bytes
4.Manufacturer & device id: 0x98, 0xaC
Change-Id: I43f2ffb33b82b6dbf9da7adbef8e4e93f6d94c87
Signed-off-by: sameeruddin shaik <samesh@codeaurora.org>
This change is to add support for Macronix-(MX25U51245G) nor
flash device.
The total density of this device is 64 MiB. Sector size 64K.
64K sector we are cosidering due to 64K sector size works with
CMD_ERASE_64K.
Total number of sector for this device will 1024 because,
64K * 1024 = 64MiB.
Change-Id: Ia1f2117bc42457e4b3c25934ff1fdcb798e4ea6f
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
This change is to add support for Macronix-(MX66U1G45GMI00) nor
flash device.
The total density of this device is 128 MiB. Sector size 64K.
64K sector we are cosidering due to 64K sector size works with
CMD_ERASE_64K.
Total number of sector for this device will 2048 because,
64K * 2048 = 128MiB.
Change-Id: I63bcd4bd5c979a82ca8c45d480acc41208a886ef
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
In ipq807x platform, there is a limitation that the
minimum packet size must be 33 bytes. The same has been
removed for ipq6018 platform. This patch removes the
padding to make the min packet size as 33 bytes
Change-Id: Ifc68672ecf7d5eadab3ffb4a93a37f5cb23feaeb
Signed-off-by: speriaka <speriaka@codeaurora.org>
This change will fix the following compiler warnings for AK and DK targets.
1.Wimplicit-function-declaration
2.Wdiscarded-qualifiers
3.Wstrict-prototypes
4.Wmaybe-uninitialized
5.Wunused-variable
6.Wint-conversion
Change-Id: I364904283172ccb19602ae1b6deceb8c61ea7638
Signed-off-by: sameeruddin shaik <samesh@codeaurora.org>
There is a change in reference clock(XO) frequency of
ipq6018(24MHz) from ipq807x(19.2MHz). Accordingly,
updated the phy init sequence of PCIe.
Change-Id: I86230187a46fec16a87acfaa17cfa27dc1eb728c
Signed-off-by: Balaji Prakash J <bjagadee@codeaurora.org>
This device is a non onfi device, so adding the device id and
oob details to nand_ids table.
This device is non onfi device, so adding the device id
and oob information in the nand_ids table.
1.pagesize:2048 bytes
2.oob size:128bytes
3.Ecc:8bits for 512 bytes
4.Man & dev id: 0x98 0xa1
Change-Id: I69763ea28fc3f81a74cacad4338b6d55c42d93b6
Signed-off-by: sameeruddin shaik <samesh@codeaurora.org>
eMMC part THGBMNG5D1LBAIT (Toshiba 4GB) is taking long time for
the secure trim.This leads to erase timeout. Manufacturer ID based
quirk is added for the specific part to use trim instead of secure
trim for block erase.
without this change we can see the error erase timeout and erase failed.
error:
MMC erase: dev # 0, block # 6690, count 2047 ... sdhci_send_command:
MMC: 0 busy timeout increasing to: 2000 ms.
sdhci_send_command: MMC: 0 busy timeout increasing to: 4000 ms.
timeout.
mmc erase failed
-1 blocks erased: ERROR
Change-Id: I1126690400b274bb4735750584d7fb4b105e6618
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
This change will handle masking of DAT inhibit bit of
present state register. This status bit is genarated if
either the DAT Line Active or Read Transfer Active is set to
1. If this bit is 0, it indicates the host controller can issue
the next command.
Commands with busy signal belong to Command Inhibit(DAT).
e.g (R1b, R5b type).
Changing from 1 to 0 generates a transfer complete interrupt
in normal interrupt status register.
If this bit value is 1: Cannot issue command which uses DAT line.
If this bit value is 0: Can issue command which uses DAT line.
This change is masking SDHCI_DATA_INHIBIT bit only if card is in
busy state.
Without this change we can get the erase timeout error.
error:
MMC erase: dev # 0, block # 27682, count 16383 ...
sdhci_send_command: MMC: 0 busy timeout increasing to: 2000 ms.
Change-Id: I0612e576c09a7fd077bed1a1ee717afcddfa7e87
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
Moved Aquantia, QCA8033, QCA8075 and QCA8081
PHY configs to defconfig.
For tiny u-boot variant, except QCA8075 all
other PHYs are disabled.
Change-Id: Iaafa848bf7d578bfa3bcdaf0cfcb815ecfef067f
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Some spi nand flash uses single byte read id(9FH) command,
for those devices the sequence is
byte1 byte2 byte3 byte4
9FH MID DID DID
some other spi nand flashes uses two byte read id(9F 00H) command
for those devices the sequence is
byte1 byte2 byte3 byte4
9FH A7-A0 MID DID
The first byte is the actual command and the second byte is a dummy byte.
For devices which uses new sequence, we need to pass
appropriate read id command with dummy byte.
Change-Id: Idf2e8740f8341596cd8f58d22d5e33a4b4972a31
Signed-off-by: Antony Arun T <antothom@codeaurora.org>
This change will clear the divider value while doing deinit of
SD devices. In-order to clear the divider value we have to write
into register GCC_SDCC1_MISC.
Writing 0x0 to this register will clear the divider value which is
set, while doing initialization got SD devices.
Without this change, while kernel bootup we can see the below error.
error:
[3.529917] mmc0: Skipping voltage switch
[4.131741] mmc0: error -110 whilst initialising SD card.
Change-Id: Ifeca94ae09532a4b506e645cc9254e438179c886
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
This change adds drive-strength property for I2C GPIOs and
modify config_i2c_gpio function to get the drvstr value from dts.
Change-Id: Ieece9e2f9d6abc115a50d87bc512004d3efcad0f
Signed-off-by: Pavithra Palanisamy <pavip@codeaurora.org>
