ipq: Fix compiler warnings in u-boot-2016

This change will fix the following compiler warnings for AK and DK targets.
1.Wimplicit-function-declaration
2.Wdiscarded-qualifiers
3.Wstrict-prototypes
4.Wmaybe-uninitialized
5.Wunused-variable
6.Wint-conversion

Change-Id: I364904283172ccb19602ae1b6deceb8c61ea7638
Signed-off-by: sameeruddin shaik <samesh@codeaurora.org>

arch/arm/include/asm/arch-ipq806x/clk.h

@@ -131,7 +131,12 @@ void usb_ss_utmi_clock_config(unsigned int usb_port, unsigned int m,
 		unsigned int n, unsigned int d);
 
 void i2c_clock_config(void);
-
+void emmc_clock_config(int mode);
+void nand_clock_config(void);
+void pcie_clock_config(pci_clk_offset_t *offset);
+void pcie_clock_shutdown(pci_clk_offset_t *offset);
+void emmc_clock_reset(void);
+void emmc_clock_disable(void);
 /* Uart specific clock settings */
 void uart_pll_vote_clk_enable(void);
 void uart_clock_config(unsigned int gsbi_port, unsigned int m, unsigned int n,

arch/arm/include/asm/arch-qca-common/iomap.h

@@ -20,9 +20,6 @@
 #define UART2_DM_BASE		0x078b0000
 #define UART1_DM_BASE		0x078af000
 #define I2C0_BASE		0x078B7000
-#define TLMM_BASE		0x01000000
-#define GPIO_CONFIG_ADDR(x) (TLMM_BASE + (x)*0x1000)
-#define GPIO_IN_OUT_ADDR(x) (TLMM_BASE + 0x4 + (x)*0x1000)
 
 #define GCNT_PSHOLD		0x004AB000
 

arch/arm/include/asm/arch-qca-common/qca_common.h

@@ -56,6 +56,13 @@ typedef struct {
 } add_node_t;
 
 int qca_mmc_init(bd_t *, qca_mmc *);
+
+#if defined(CONFIG_QCA_MMC) && !defined(CONFIG_SDHCI_SUPPORT)
+int board_mmc_env_init(qca_mmc mmc_host);
+#endif
+
+int ipq_board_usb_init(void);
+int spi_nand_init(void);
 void board_mmc_deinit(void);
 void board_pci_deinit(void);
 void set_flash_secondary_type(qca_smem_flash_info_t *);

arch/arm/include/asm/arch-qca-common/uart.h

@@ -53,7 +53,7 @@ extern void dsb(void);
                                               }
 
 extern void __udelay(unsigned long usec);
-
+void ipq_serial_wait_tx_empty(void);
 
 enum MSM_BOOT_UART_DM_PARITY_MODE {
         MSM_BOOT_UART_DM_NO_PARITY,

board/qca/arm/ipq40xx/ipq40xx.c

@@ -249,7 +249,7 @@ int board_eth_init(bd_t *bis)
 	}
 	edma_cfg->unit = fdtdec_get_uint(gd->fdt_blob, node, "unit", 0);
 	edma_cfg->phy = fdtdec_get_uint(gd->fdt_blob, node, "phy", 0);
-	strcpy(edma_cfg->phy_name, fdt_getprop(gd->fdt_blob, node, "phy_name", &len));
+	strcpy((char *)edma_cfg->phy_name, fdt_getprop(gd->fdt_blob, node, "phy_name", &len));
 
 	status = ipq40xx_edma_init(edma_cfg);
 	return status;
@@ -273,7 +273,7 @@ void emmc_sdhci_init(void)
 
 int board_mmc_init(bd_t *bis)
 {
-	int ret;
+	int ret = 0;
 	int node, gpio_node;
 	fdt_addr_t base;
 	qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
@@ -333,7 +333,7 @@ void board_mmc_deinit(void)
 #endif
 
 
-static void pcie_clock_init()
+static void pcie_clock_init(void)
 {
 
 	/* Enable PCIE CLKS */
@@ -627,7 +627,7 @@ static int scm_boot_addr_already_set;
 extern int get_cpu_id(void);
 static volatile int core_var;
 
-volatile void bring_secondary_core_down(unsigned int state)
+void bring_secondary_core_down(unsigned int state)
 {
 	int current_cpu_id;
 

board/qca/arm/ipq806x/Makefile

@@ -1,4 +1,5 @@
 ccflags-y += -I$(srctree)/board/qca/arm/common/
+ccflags-y += -I$(srctree)/drivers/spi/
 
 obj-y	+= ipq806x.o
 

board/qca/arm/ipq806x/ipq806x.c

@@ -33,6 +33,9 @@
 #include <asm/arch-qca-common/iomap.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <mmc.h>
+#include <spi.h>
+#include "ipq_spi.h"
 
 #define DLOAD_MAGIC_COOKIE_1 0xE47B337D
 #define DLOAD_MAGIC_COOKIE_2 0x0501CAB0
@@ -204,11 +207,11 @@ void ipq_uboot_fdt_fixup(void)
 		/*
 		 * Open in place with a new length.
 		 */
-		ret = fdt_open_into(gd->fdt_blob, gd->fdt_blob, len);
+		ret = fdt_open_into(gd->fdt_blob, (void *)gd->fdt_blob, len);
 		if (ret)
 			 debug("uboot-fdt-fixup: Cannot expand FDT: %s\n", fdt_strerror(ret));
 
-		ret = fdt_setprop(gd->fdt_blob, 0, "config_name",
+		ret = fdt_setprop((void *)gd->fdt_blob, 0, "config_name",
 				config, (strlen(config)+1));
 		if (ret)
 			debug("uboot-fdt-fixup: unable to set config_name(%d)\n", ret);
@@ -220,7 +223,7 @@ int board_mmc_init(bd_t *bis)
 {
 	int node, gpio_node;
 	int ret = -ENODEV;
-	u32 *emmc_base;
+	const u32 *emmc_base;
 	int len;
 	qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
 
@@ -233,7 +236,7 @@ int board_mmc_init(bd_t *bis)
 
 	emmc_base = fdt_getprop(gd->fdt_blob, node, "reg", &len);
 
-	if (emmc_base == FDT_ADDR_T_NONE) {
+	if ((u32)emmc_base == FDT_ADDR_T_NONE) {
 		printf("No valid SDCC base address found in device tree\n");
 		goto out;
         }
@@ -257,7 +260,7 @@ out:
 void board_nand_init(void)
 {
 	int node, gpio_node;
-	u32 *nand_base;
+	const u32 *nand_base;
 	struct ipq_nand ipq_nand;
 	int len;
 
@@ -270,7 +273,7 @@ void board_nand_init(void)
 
 	nand_base = fdt_getprop(gd->fdt_blob, node, "reg", &len);
 
-	if (nand_base == FDT_ADDR_T_NONE) {
+	if ((u32)nand_base == FDT_ADDR_T_NONE) {
 		printf("No valid NAND base address found in device tree\n");
 		goto spi_init;
         }
@@ -346,7 +349,7 @@ int board_eth_init(bd_t *bis)
 			phy_name_ptr = (char*)fdt_getprop(gd->fdt_blob, offset,
 					"phy_name", &phy_name_len);
 
-			strncpy(gmac_cfg[loop].phy_name, phy_name_ptr, phy_name_len);
+			strncpy((char *)gmac_cfg[loop].phy_name, phy_name_ptr, phy_name_len);
 
 		}
 	}
@@ -439,7 +442,7 @@ void qca_serial_init(struct ipq_serial_platdata *plat)
 
 }
 
-void ipq_wifi_pci_power_enable()
+void ipq_wifi_pci_power_enable(void)
 {
 	int offset;
 	u32 gpio;
@@ -457,7 +460,7 @@ void ipq_wifi_pci_power_enable()
 	}
 }
 
-static void ipq_wifi_pci_power_disable()
+static void ipq_wifi_pci_power_disable(void)
 {
 	int offset;
 	u32 gpio;
@@ -517,7 +520,7 @@ void board_pci_init(int id)
 
 void board_pci_deinit()
 {
-	int node, gpio_node, i, gpio;
+	int node, i;
 	char name[16];
 	struct fdt_resource parf;
 	struct fdt_resource pci_rst;
@@ -1098,7 +1101,6 @@ static int krait_release_secondary(void)
 }
 int bring_sec_core_up(unsigned int cpuid, unsigned int entry, unsigned int arg)
 {
-	int err = 0;
 	dcache_old_status = dcache_status();
 	if (!secondary_core_already_reset) {
 		secondary_core_already_reset = 1;

board/qca/arm/ipq806x/ipq806x.h

@@ -213,6 +213,7 @@ typedef enum {
 } smem_mem_type_t;
 
 unsigned smem_read_alloc_entry(smem_mem_type_t type, void *buf, int len);
+int ipq_get_tz_version(char *version_name, int buf_size);
 /* Reserved-memory node names*/
 extern const char *rsvd_node;
 extern const char *del_node[];

drivers/mtd/nand/ipq_nand.c

@@ -1755,9 +1755,9 @@ static int nand_get_info(struct mtd_info *mtd, uint32_t flash_id)
 int ipq_nand_scan(struct mtd_info *mtd)
 {
 	int ret;
-	uint32_t nand_id1;
-	uint32_t nand_id2;
-	uint32_t onfi_sig;
+	uint32_t nand_id1 = 0;
+	uint32_t nand_id2 = 0;
+	uint32_t onfi_sig = 0;
 	struct nand_chip *chip = MTD_NAND_CHIP(mtd);
 	struct ipq_nand_dev *dev = MTD_IPQ_NAND_DEV(mtd);
 	struct ebi2nd_regs *regs = dev->regs;
@@ -2098,7 +2098,7 @@ void qpic_bam_reset(struct ebi2nd_regs *regs)
 		status = val & SW_RESET_DONE_SYNC;
 		count++;
 		if (count > NAND_READY_TIMEOUT)
-			return -ETIMEDOUT;
+			return;
 		udelay(10);
 	} while (!status);
 
@@ -2213,22 +2213,22 @@ static int do_ipq_nand_cmd(cmd_tbl_t *cmdtp, int flag,
 {
 	int ret;
 	enum ipq_nand_layout layout;
-	int node, gpio_node;
-	u32 *nand_base;
+	int node;
+	const u32 *nand_base;
 	struct ipq_nand ipq_nand;
 	int len;
 
 	node = fdt_path_offset(gd->fdt_blob, "nand");
 	if (node < 0) {
 		printf("Could not find nand-flash in device tree\n");
-		return;
+		return -ENXIO;
 	}
 
 	nand_base = fdt_getprop(gd->fdt_blob, node, "reg", &len);
 
-	if (nand_base == FDT_ADDR_T_NONE) {
+	if ((u32)nand_base == FDT_ADDR_T_NONE) {
 		printf("No valid NAND base address found in device tree\n");
-		return;
+		return -EFAULT;
 	}
 
 	if (argc != 2)

drivers/mtd/spi/sf_internal.h

@@ -244,4 +244,6 @@ void spi_flash_mtd_unregister(void);
  */
 int spi_flash_scan(struct spi_flash *flash);
 
+int spi_nand_flash_probe(struct spi_slave *spi, struct spi_flash *flash,
+			 u8 *idcode);
 #endif /* _SF_INTERNAL_H_ */

drivers/mtd/spi/spi_flash.c

@@ -574,7 +574,6 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 static int spi_nor_generic_init(struct spi_slave *spi, struct spi_flash *flash,
 			u8 *idcode)
 {
-	int ret;
 	unsigned short jedec;
 	qca_smem_flash_info_t sfi;
 

drivers/mtd/spi/spi_nand.c

@@ -20,6 +20,7 @@
 #include "spi_nand_dev.h"
 #include <malloc.h>
 #include "spi.h"
+#include "sf_internal.h"
 #include <watchdog.h>
 
 #define CONFIG_SF_DEFAULT_SPEED		(48 * 1000 * 1000)

drivers/mtd/spi/spi_nand_dev.h

@@ -14,7 +14,10 @@
 #ifndef SPI_NAND_DEV_H
 #define SPI_NAND_DEV_H
 #define MTD_MAX_OOBFREE_ENTRIES_LARGE	32
+#ifdef MTD_MAX_ECCPOS_ENTRIES_LARGE
+#undef MTD_MAX_ECCPOS_ENTRIES_LARGE
 #define MTD_MAX_ECCPOS_ENTRIES_LARGE	640
+#endif
 #define INT_MAX				((int)(~0U>>1))
 
 /* Flash opcodes. */

drivers/net/ipq40xx/ipq40xx_ess_sw.c

@@ -136,7 +136,7 @@ int ipq40xx_ess_sw_init(ipq40xx_edma_board_cfg_t *cfg)
 		ipq40xx_ess_sw_wr(S17_P4LOOKUP_CTRL_REG, 0x34006f);;
 		break;
 	default:
-		printf("ess cfg not supported for %x machid\n",
+		printf("ess cfg not supported for %lx machid\n",
 					gd->bd->bi_arch_number);
 		return -1;
 	}

drivers/spi/ipq_spi.c

@@ -14,6 +14,7 @@
 #include <common.h>
 #include <fdtdec.h>
 #include <watchdog.h>
+#include <console.h>
 #include <spi.h>
 #include <malloc.h>
 #include <asm/io.h>

include/configs/ipq40xx.h

@@ -130,9 +130,9 @@ typedef struct {
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_ENV_OFFSET		board_env_offset
-#define CONFIG_ENV_SIZE_MAX		(256 << 10) /* 256 KB */
+#define CONFIG_ENV_SIZE		CONFIG_ENV_SIZE_MAX
 #define CONFIG_ENV_RANGE		board_env_range
-#define CONFIG_ENV_SIZE			(256 << 10) /* 256 KB */
+#define CONFIG_ENV_SIZE_MAX		(256 << 10) /* 256 KB */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE_MAX + (2048 << 10))
 
 #define CONFIG_CMD_MEMTEST

include/sdhci.h

@@ -291,6 +291,10 @@ struct sdhci_host {
 	struct mmc_config cfg;
 };
 
+#if defined(CONFIG_QCA_MMC) && defined(CONFIG_SDHCI_SUPPORT)
+int board_mmc_env_init(struct sdhci_host mmc_host);
+#endif
+
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
 
 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)