Enabling and disabling in-band auto-negotation is already supported on
RTL93xx. However, so far the advertisement is left unchanged at the
default of 0x1a0 (full duplex + pause + asymmetric pause).
Instead, set the advertisement to reflect the current configuration for
1000Base-X and 2500Base-X. Nothing needs to be done for SGMII, as the
advertisement register is ignored in that case.
Testing shows that negotiation of flow control works for 1000Base-X and
2500Base-X (tested with RTL930x on both ends of the link).
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21869
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a new SerDes operation for restarting in-band negotiation including
an implemenation for RTL93xx, and call it from .pcs_an_restart.
This is a prerequisite for configuration of the in-band advertisement,
as changing it requires triggering a restart of auto-negotiation.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21869
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 78bf3a5f44 ("realtek: dsa: Fix rate control initialization") enabled
code setting up the "storm control" feature. This casued a speed regression
on rtl838x, reducing the effective max speed per port from line rate to around
500 Mbits/s.
Storm control is a policy feature with a number of input parameters depending
on use case and environment. It is not possible to define a meaningful static
policy in the driver. The problem isn't just the arbitrary limits in the
current code. Such features require userspace interfaces.
Drop this code for now. It wasn't missed while it was disabled.
Cc: Sven Eckelmann <se@simonwunderlich.de>
Fixes: 78bf3a5f44 ("realtek: dsa: Fix rate control initialization")
Link: https://github.com/openwrt/openwrt/issues/21692
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21877
Signed-off-by: Robert Marko <robimarko@gmail.com>
DSA tagging currently works with a tuned trailer tagging. That means:
- realtek target uses tag_trailer for tagging
- there is a patch for the trailer tagger to write the target port not
as a bitfield but as an integer
Make the tagging independent from upstream and hacky patches by providing
a new downstream driver. This can be aligned easier for future development.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21815
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SoC specific configuration structure is currently manually
assigned depending on the family_id. This will be removed in
the future. Make use of device_get_match_data() instead.
While we are here rename the structure prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21866
Signed-off-by: Robert Marko <robimarko@gmail.com>
Bit 15 of the rtl838x SMI_GLB_CTRL register is set early during mdio reset
and never cleared. There is no need to set it again.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21868
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 17f12695d0 ("realtek: mdio: rtl838x: activate combo PHY media detection")
dropped setting bit 15 of the SMI_GLB_CTRL register without any explanation. This
broke the Netgear GS108Tv3, causing phy patching to fail:
Firmware loaded. Size 1184, magic: 83808380
Realtek RTL8218B (internal) 1b000000.switchcore:mdio-controller-mii:08: patch
Realtek RTL8218B (internal) 1b000000.switchcore:mdio-controller-mii:08: package not ready for patch.
Realtek RTL8218B (internal) 1b000000.switchcore:mdio-controller-mii:0f: probe with driver Realtek RTL8218B (internal) failed with error -5
None of the internal phys was able to detect a link after this error.
Some rtl8380 devices, like the Zyxel GS1900-10HP A1, were not affected by the bug
because their boot loader always sets bit 15. The bug could also be worked around
on affected devices by running "rtk network on" before booting OpenWrt, setting
bit 15 as a side effect.
Cc: Markus Stockhausen <markus.stockhausen@gmx.de>
Cc: Robert Marko <robimarko@gmail.com>
Fixes: 17f12695d0 ("realtek: mdio: rtl838x: activate combo PHY media detection")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21868
Signed-off-by: Robert Marko <robimarko@gmail.com>
The internal RTL8218B gets detected cleanly. No need for
additional checks of the bus address or the SoC type.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21857
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add everything that's needed to have a standalone setup of the XSGMII
mode without having to rely on previous U-boot setup. This includes
patch sequences for the SerDes and extensions of symbol error reset and
reading.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The XSGMII mode is special in several regards. The inband
autonegotiation for this mode is called 'XSG N-way'. It is controlled
using different bits and location, and using XSG operations.
Add support for this by enhancing the set_autoneg implementation shared
by RTL930x and RTL931x. This can stay shared since it works the same for
both variants.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Instead of having all kinds of SerDes-related operations in the global
pcs config structure, there's now a SerDes ops structure which is
intended to cover and separate this.
Move the set_autoneg hook to the SerDes ops to adhere to this desired
separation. Calling the operation is further encapsulated with a small
convenience helper.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This header is deprecated and typically platform_device.h should be
used.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21164
[Adapted the lantiq patches a bit]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Do not derive the number of hardware receive rings from the SoC
family. Instead add the information to the configuration
structure. Make use of it during ethernet driver probing.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21706
Signed-off-by: Robert Marko <robimarko@gmail.com>
For packets trapped to the CPU for a special reason (not normal
forward), the RTL931x tag decoding always print a log message with level
INFO. This is not needed and just spams the log, e.g. when LLDP packets
are running through the network, each of them causes a log message.
Make that a debug message instead of an info message. We can keep it,
just change when it's printed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21844
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove the unneeded sw_xxx() macros.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of regmap in the RTL93xx reset functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of regmap in RTL83xx reset functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some straight forward conversion ...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop legacy sw_xxx() macros for RTL931x devices. While we are here
reorganize the access and avoid masked access where possible. So the
code is easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop legacy sw_xxx() macros for RTL930x devices. While we are here
reorganize the access and avoid masked access where possible. So the
code is easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop legacy sw_xxx() macros for RTL839x devices. While we are here
reorganize the access and avoid masked access where possible. So the
code is easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Increase readability by replacing more numbers and bit operations
with macros in order to give them distinct, expressive names.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21786
Signed-off-by: Robert Marko <robimarko@gmail.com>
So far the function prefix rtl83xx_ is used for functions which are
exclusive to RTL8390_FAMILY_ID but also for ones shared between
RTL8390_FAMILY_ID/RTL9300_FAMILY_ID/RTL9310_FAMILY_ID.
For a more fitting, precise use of rtl83xx_ rename the ones in dsa.c
which are also used by RTL9300_FAMILY_ID and RTL9310_FAMILY_ID
to rtldsa_.
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21786
Signed-off-by: Robert Marko <robimarko@gmail.com>
For the IPv4 unknown multicast flood portmask the first byte should be
for the higher port numbers and the following byte for the lower port
numbers, just like for the L2 unknown multicast flood portmask or the
IPv6 unknown multicast flood portmasks, too. Not the other way around.
Fix the debug output here by adjusting the offsets accordingly.
Fixes: 27029277f9 ("realtek: add switch driver support for the RTL93XX based switches")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/21786
Signed-off-by: Robert Marko <robimarko@gmail.com>
Avoid to reconfigure a SerDes when it has been configured for a mode
before. This usually applies to switches which drive multiple ports on a
single SerDes. For those, the phylink subsystem triggers PCS
configuration everytime although it's a single SerDes. For example, on
switches with XSGMII-connected RTL8218D the particular SerDes is
configured eight times but only a single run is needed.
Add a proper check to pcs_config which checks the mode stored in the
SerDes instance against the requested mode. Other 'settings' should be
executed though, e.g. setting autoneg. While at it, drop the check if
there is a 'setup_serdes' implementation. It's just a driver-internal
interface and all variants implement this now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21763
Signed-off-by: Robert Marko <robimarko@gmail.com>
All variant-specific setup_serdes functions currently make equal use of
the mapping from the interface mode to the hardware mode. To reduce
redundancy, move this mapping to the generic pcs_config, from where the
setup_serdes implementations are called.
This includes slightly changing the setup_serdes signature and some
debug messages.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21763
Signed-off-by: Robert Marko <robimarko@gmail.com>
The linux kernel printk has a MAC address specifier `%pM` that can be
used to pretty-print MAC addresses. We should use this specifier when
printing MAC addresses for humans since that ensure the appearance that
people are used to.
Fixes#21796
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21812
Signed-off-by: Robert Marko <robimarko@gmail.com>
"features" describes the currently active device options and
"hw_features" describes all possible ones. So hw_features must
be a superset of features. Fix that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21778
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove all old structures and defines that are no longer needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21778
Signed-off-by: Robert Marko <robimarko@gmail.com>
Provide a new transmit function. It is cleaner and closer to
upstream than what we have now. The basic features are:
- Avoid memory moving and keep data in the SKBs
- Only protect really critcal parts by a lock as transmit
queues will be only called once by the kernel
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21778
Signed-off-by: Robert Marko <robimarko@gmail.com>
The operating system has enough features to control the transmit
queues. There is no need to provide a hard coded distribution
function. Especially differentiating between a round robin for
RTL83xx and high/low priority for RTL93xx makes no sense. All
devices have the same low/high priority queues.
Simply present two "generic" queues to the kernel.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21778
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ethernet driver will get a new transmit function. As a first
step add the required structures and initialize them.
To get an idea: In the future the transmit buffer will hold only
the needed packet header information. The real data is kept in the
SKBs. So only pointers will be changed and memory moving can be
avoided. The SoC will transfer packet data directly from the SKBs.
Additionally a new transmit lock will be established that is
separated from the current driver lock. This is only needed
to guard the "kick-the-engine" command. So contention of the old
global lock can be reduced.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21778
Signed-off-by: Robert Marko <robimarko@gmail.com>
Ethernet transmit handling processes data synchronously via a
packet buffer. As soon as it kicks the SoC to send the packet
no more post processing is needed. Especially there is no need
for transmit completion interrupts. Disable them to reduce the
CPU load.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21778
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop legacy sw_xxx() macros for rtl838x devices. While we are here
reorganize the access and aovid masked access where possible. So the
code is easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
As a first step convert the central run command over to regmap.
Additional info: The command masks where changed because
sw_xxx() dont care about the to be set or to be cleared bits
(aka mask). In regmap the mask must always be a superset of the
to be set bits.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
To make use of regmap in the command function adapt its signature
so it has access to the control structure via the bus.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
For regmap conversion the read/write functions need access to the
control structure (aka bus->priv). Add the bus to the parameters list.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
To convert the existing sw_xxx() commands the bus needs a regmap.
This is derived from the parent mfd node like in all other Realtek
drivers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
Port 21 definition was missed during addition of LGS328C.
Add it to the dts.
Fixes: 853d73f ("realtek: add support for Linksys LGS328C")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21793
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is some special logic used for certain writes to digital pages for
RTL93xx SerDes, especially when configuring the XSGMII mode. For
RTL930x this applies to SerDes 2 and 3, for RTL93xx to more. In this case,
a dual-read/write to SDS and SDS + 1 is done. While the corresponding
mapping from front to back SDS for RTL931x is currently covered in the
SerDes MDIO driver, it isn't for RTL930x.
To cover these special cases and provide a clear interface on that,
introduce an XSG write SerDes operation. All these dual-read/write cases
can be expressed with such an XSG operation whose internal semantics are
defined for each switchcore family.
This could be done just with plain dual read/write calls however this
isn't a clean approach and may be confusing while comparing our
functionality with the SDK, especially for RTL930x.
In practice, if this isn't handled correctly, only half of the ports of an
XSGMII-connected RTL8218D do work because some required values aren't
applied for the background SerDes 3.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21592
Signed-off-by: Robert Marko <robimarko@gmail.com>
For RTL930x, the SerDes MDIO driver performed a slight SerDes ID mapping
on certain conditions. Instead of keeping this mapping in the MDIO and
try to extend it for further quirks, lets just be a plain MDIO here and
let the user (PCS) deal with these complex quirks.
Drop the mapping from the SerDes MDIO driver and move it to the PCS
driver by leveraging the previously introduced SerDes operations
structure. Define separate ops which incorporate this mapping and use
those instead of the generic implementations.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21592
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a dedicated structure for SerDes operations. This will be used for
several common operations currently called individually in various
places of the code.
Start with defining the basic read and write operations for a SerDes in
this structure. Use generic implementations of these operations for all
variants (RTL83xx, RTL93xx) for now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21592
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for Hasivo S1100WP-8GT-SE switch.
Device specification
--------------------
SoC Type: Realtek RTL9303
RAM: Samsung K4B2G1646F-BYMA (256MB DDR3 SDRAM)
Flash: Fudan FM25Q128A (16 MB)
Ethernet: 8x RTL8221B 10/100/1000/2500Mbps PHY
LEDs: 2 LEDs + 4 LEDs/port
1x power green (no control)
1x system green (via RLT9303 GPIO)
3x RJ45 LEDs/port (via HC595 shift registers on LED spi)
1x Green
1x Green/Orange
1x Orange LED/port for PoE status (below RJ45, on STC8)
Button: Reset
USB ports: None
Bootloader: Realtek U-Boot 2011.12.(3.6.6.55087) (Nov 13 2022 - 14:37:31)
Fan: None installed (but board provision for temp/FET/fan)
POE: 2x HS104PTI for 802.3af/at/bt PoE (Not yet working)
Installing OpenWrt
------------------
1. UART RJ45 requires soldering a connector to the empty footprint (RJ1).
(Amphenol RJHSEE380 or similar)
2. Connect to UART 38400@8n1, using Cisco Console Rollover cable (RS232)
3. Set computer IP to 192.168.0.111, and plug in with 2.5Gbps
4. Enter bootloader by pressing esc key during boot
5. Enter password `Hs2021cfgmg`
6. Type `XXXX` to get into U-Boot
7. Type `rtk network on`
8. Use tftp if you have a 2.5G link (other speeds won't work).
If serial, you can increase baudrate in uboot with `setenv baudrate 115200`
9.1. `tftpboot 0x84f00000 <openwrt-initramfs-filename>`
9.2. Otherwise use serial transfer (Y modem): `loady 0x84f00000`
10. `bootm 0x84f00000`
Now you should be in OpenWRT, and can use sysupgrade to install.
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21576
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
XikeStor SKS8300-8T is a 8 ports Multi-Gig switch, based on the RTL9303.
Specifications:
- SoC : Realtek RTL9303
- RAM : DDR3 512 MiB
- Flash : SPI-NOR 32 MiB (Macronix)
- CPU : 800MHz
- Ethernet : 8× 1G/2.5G/5G/10G Base-T RJ45 ports (RTL8261N)
- Keys (GPIO) : 1x
- UART : "Console" port on the front panel
- type : RS-232C
- connector : RJ-45
- settings : 115200 8N1
- Power : 12 VDC, 4A
- Temperature sensor : LM75 or compatible
- Fan controller : SensyLink CTF2302
Flash instruction using initramfs image:
1. Prepare TFTP server & connect to serial port.
2. Connect your computer to one of the RJ45 ports on SKS8300-8T
3. Power on SKS8300-8T and interrupt autoboot with Shift + A.
4. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
5. Set the boot command to enable network on boot.
> setenv bootcmd 'mw.l 0x8401da94 0; rtk network on; boota'
6. Set switch IP and TFTP server IP (optional, adjust to your setup).
> setenv ipaddr <ip>
> setenv serverip <ip>
7. Download initramfs image from TFTP server.
> tftpboot 0x83000000 <image name>
8. Boot with the downloaded image.
> bootm 0x83000000
9. With rambooted OpenWrt, backup the stock firmware if needed.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.
In OpenWrt, it is necessary to execute "rtk network on" to enable full
networking functionality. However, the internal U-Boot initialization
(which shares logic with "rtk network init" initializing MAC only and
configures the fan controller) sets a flag at memory address 0x8401da94.
Once this flag is set, any subsequent calls to "rtk network on" are
blocked. To bypass this, resetting 0x8401da94 to 0 by step 5, ensuring
that the network can be properly initialized later. This specific
address was confirmed in U-Boot 2011.12.(3.6.11.55242) (Jan 06 2025 -
14:39:46) by decompiling the function that references the "rtk_mac_init"
string.
Reverting to stock firmware:
1. Connect to serial port.
2. Power on SKS8300-8T and interrupt autoboot with Shift + A.
3. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
4. Set the boot command to the firmware default.
> setenv bootcmd boota
5. Enable network.
> rtk network on
6. Boot OpenWrt.
> boota
7. Download latest firmware from XikeStor and upload to your device.
8. Write firmware with 'sysupgrade -F'.
9. After reboot, stock firmware should boot automatically.
Co-authored-by: Samy Younsi <kame@duck.com>
Signed-off-by: FUKAYA Toshikuni <toshiq2@neenana.org>
Link: https://github.com/openwrt/openwrt/pull/21511
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some of the code forgot to use the register defines for page
selection. Replace the hard coded values with their define.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21716
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL8214C configuration is currently useless.
- It uses register 29 (write only companion of ext. page register 30)
- "configuration" only reads registers 2/3 and writes a message
- "configuration" is run during probing
Drop the useless coding. As this was the last consumer drop register
29 define too.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21716
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL931X CMU code was only capable of setting up ring PLL. This is
fine so far as most modes use this PLL type. Other modes are not handled
by the code, neither here nor in the SDK. Though, the SDK has the needed
sequence to setup the LC PLL. Using LC PLL seems to be handled somewhere
else.
Include the small sequence from the SDK to have it, though not used yet.
This could be helpful for further development which goes beyond the SDK.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
The implementations for CMU management for RTL930x and RTL931x differ in
their terminology but not that much in their technical aspect. For both
it seems to be the case that two adjacent SerDes share a CMU. This CMU
contains a ring PLL for low speeds (capable of 1G/2.5G) and an LC PLL for
high speeds (capable of 1G/2.5G/10G).
Introduce an enum for the PLL type, used for both RTL93xx variants.
Align the naming of internal variables, especially in the RTL931x
implementation. Rename cmu_type to pll_type because this is much more
accurate. Use 'force_' instead of 'frc_' to make clear what it means.
Also rename the function from 'cmu_type_set' to 'config_cmu' because it
obviously does more than just setting the CMU type but rather configures
the CMU.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
