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realtek: mdio: convert rtl838x i/o to regmap

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Drop legacy sw_xxx() macros for rtl838x devices. While we are here
reorganize the access and aovid masked access where possible. So the
code is easier to read.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen 2026-01-27 14:32:50 +01:00 • committed by Robert Marko
parent 3200085a70
commit b59a4c97c9
1 changed files with 27 additions and 22 deletions
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49
target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
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@ -226,63 +226,68 @@ static int rtmdio_run_cmd(struct mii_bus *bus, int cmd, int mask, int regnum, in
return ret;
}
/* RTL838x specific MDIO functions */
static int rtmdio_838x_run_cmd(struct mii_bus *bus, int cmd)
{
return rtmdio_run_cmd(bus, cmd, RTMDIO_838X_CMD_MASK,
RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1, RTMDIO_838X_CMD_FAIL);
}
/* Reads a register in a page from the PHY */
static int rtmdio_838x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg, u32 *val)
{
u32 park_page = 0x1f;
struct rtmdio_ctrl *ctrl = bus->priv;
u32 park_page = 31;
int err;
sw_w32_mask(0xffff0000, port << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(reg << 20 | page << 3 | park_page << 15, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0, BIT(port));
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2, port << 16);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1,
reg << 20 | park_page << 15 | page << 3);
err = rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_READ_C22);
if (!err)
*val = sw_r32(RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
err = regmap_read(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2, val);
if (!err)
*val &= GENMASK(15, 0);
return err;
}
/* Write to a register in a page of the PHY */
static int rtmdio_838x_write_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg, u32 val)
{
u32 park_page = 0x1f;
struct rtmdio_ctrl *ctrl = bus->priv;
u32 park_page = 31;
sw_w32(BIT(port), RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff0000, val << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(reg << 20 | page << 3 | park_page << 15, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0, BIT(port));
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2, val << 16);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1,
reg << 20 | park_page << 15 | page << 3);
return rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_WRITE_C22);
}
/* Read an mmd register of a PHY */
static int rtmdio_838x_read_mmd_phy(struct mii_bus *bus, u32 port, u32 addr, u32 reg, u32 *val)
{
struct rtmdio_ctrl *ctrl = bus->priv;
int err;
sw_w32(1 << port, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff0000, port << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(addr << 16 | reg, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0, BIT(port));
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2, port << 16);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3, addr << 16 | reg);
err = rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_READ_C45);
if (!err)
*val = sw_r32(RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
err = regmap_read(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2, val);
if (!err)
*val &= GENMASK(15, 0);
return err;
}
/* Write to an mmd register of a PHY */
static int rtmdio_838x_write_mmd_phy(struct mii_bus *bus, u32 port, u32 addr, u32 reg, u32 val)
{
sw_w32(1 << port, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff0000, val << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32_mask(0x1f << 16, addr << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
sw_w32_mask(0xffff, reg, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
struct rtmdio_ctrl *ctrl = bus->priv;
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0, BIT(port));
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2, val << 16);
regmap_write(ctrl->map, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3, addr << 16 | reg);
return rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_WRITE_C45);
}