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realtek: dsa: rtl838x: drop redundant SMI_GLB_CTRL accesses

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Bit 15 of the rtl838x SMI_GLB_CTRL register is set early during mdio reset
and never cleared.  There is no need to set it again.

Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21868
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Bjørn Mork 2026-02-04 16:02:08 +01:00 • committed by Robert Marko
parent 054785b161
commit 47ce4d8a71
2 changed files with 2 additions and 9 deletions
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9
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
View file

@ -366,14 +366,9 @@ static int rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
/* Disable MAC polling the PHY so that we can start configuration */
priv->r->set_port_reg_le(0ULL, priv->r->smi_poll_ctrl);
/* Enable PHY control via SoC */
if (priv->family_id == RTL8380_FAMILY_ID) {
/* Enable PHY control by telling SoC that "PHY patching is done" */
sw_w32_mask(0, BIT(15), RTL838X_SMI_GLB_CTRL);
} else if (priv->family_id == RTL8390_FAMILY_ID) {
/* Disable PHY polling via SoC */
/* Disable PHY polling via SoC */
if (priv->family_id == RTL8390_FAMILY_ID)
sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL);
}
return 0;
}

2
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c
View file

@ -60,8 +60,6 @@ static void rtldsa_enable_phy_polling(struct rtl838x_switch_priv *priv)
/* PHY update complete, there is no global PHY polling enable bit on the 93xx */
if (priv->family_id == RTL8390_FAMILY_ID)
sw_w32_mask(0, BIT(7), RTL839X_SMI_GLB_CTRL);
else if (priv->family_id == RTL8380_FAMILY_ID)
sw_w32_mask(0, BIT(15), RTL838X_SMI_GLB_CTRL);
}
const struct rtldsa_mib_list_item rtldsa_838x_mib_list[] = {