This patch adds support to power cycle the SDX device during
the IPQ crash scenario by toggling the full_power_on and reset
gpios.
Change-Id: Ifac2db5480c13456ef50b6d779691c5bf41f21b2
Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Add skip_pci_mask environment variable to skip pci enumeration
based on the bitmask. Also, removing the pci3 dts entry from
the RDP437 & RDP461 to skip pci3 enumeration.
Example - setenv skip_pci_mask 0xc
The above command will skip pci enumeration of bus 2 & 3.
Change-Id: Iff50acca07ffc026bed84a0d2372e6de0a3ba3a9
Signed-off-by: Amandeep Singh <quic_amansing@quicinc.com>
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
After mibib reload kernel and rootfs info have to be reloaded using
get_kernel_fs_part_details function otherwise partitions
will be marked as bad offset
Change-Id: I9a0ec847b65ff10ec7b54b65929efd034a25d278
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
With this change, Add option to support
prefixing crash dump files with timestamp prefix
Change-Id: I30343e6d7dc58376264dd34a4a3cd25bb34e65c6
Signed-off-by: Saahil Tomar <quic_saahtoma@quicinc.com>
This change will read calibration data from the 0:ART partition and
apply it to the appropriate registers.
Change-Id: Ic9360c0fce229c1d1867ee897b811abc56d2b1c7
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
IPQ5332-DB-MI03.1
Flash: NOR and NAND / emmc (option)
Features:
1 Lane PCIe Gen3 [pci0]
2 Lane PCIe Gen3 [pci1]
1 USB 2.0
Change-Id: Iff6bd9cb0faa1d5c78c3468b80bc7b0dfe984e79
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
> For Miami, passed both address and size as args in scm call.
Change-Id: Ie5d4ff5e6770eddcd566d99cc24efc322b0f2e37
Signed-off-by: quic_abilj <quic_abilj@quicinc.com>
When xbl logs are disabled no logs came in uart console
due to gcc_blsp1_ahb_clk in disabled state.
This patch enables gcc_blsp1_ahb_clk in u-boot to avoid this issue.
Change-Id: I161b003096544e54d3d230027c2665e8fa3d0f5e
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This change creates Al02-c9 dts file to help with pci enumeration
Change-Id: I9a743de8ebbdc3f4ee43c14204ab1244e8945a12
Signed-off-by: Saahil Tomar <quic_saahtoma@quicinc.com>
This patch enables i2c usb and pci in AP-MI01.1 and AP-DB-MI02.1
it enables usb and pci in AP-DB-MI01.1
Change-Id: I0f32fb9c2f44088034bd908c947cfe77ceb524b3
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
This patch enables i2c usb and pci in AP-MI01.2 and AP-MI01.4.
Change-Id: I4f09485fcbad4247aa75676cb72dc4345405fdfc
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
Added QCA8084 by-pass mode support on MI01.1 RDP
Change-Id: I1a14729cac5463675f9cb0d15df3da76746aa81e
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch enables support for USB 2.0 in AP-MI01.2
Change-Id: I4f848a403f3aae45a9f1cfa136781fbc7a37c35a
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
The pcie AUX clock source changed to XO as per
GCC frequency plan
Change-Id: If032831d3a9523ec214a62cbed2950ee5839920e
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
mi01.2-qcn9160-c1 is derived from mi01.2.
This variant disables pci0 (enables usb3.0)
and supports qcn9160 on pcie2 port.
Change-Id: Ie0e2cd7f039fab9f80788f135c80285e61b00310
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
added boot type based nand or emmc flash selection.
So machid based flash selection becomes obsolete.
Change-Id: I96fa43d31d23397fa249e02f62b905d6e4e67770
Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
Updating the AL02-C7 configuration to support QCA8084 PHY
instead of QCA8075 PHY
Change-Id: Ie838d913caeb9dd933c6bd9fbdf8ee58563bdb7a
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
This patch adds support to enable flash using machid
Change-Id: I745a941d4219dc4cd29be96876710e15185ecb8f
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This patch adds support for new board variant AL02-C19.
This board variant consists of one internal radio,
Waikiki 5G in pci slot 0, Waikiki 6G in pci slot 2 and
SDX in pci slot 3.
Change-Id: I43e3b5890f6bd8f6d182e4c3acc540a89f9c4a34
Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Bootconfig partition can have the MAGIC value 0xA3A3A1A1
if try_mode is enabled. Update the checks in smem APIs
Change-Id: I2fb71ff5812468f3f5ecd0153c35cab7d8e4bb44
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
This changes includes update the Speed clock,
common clock update and dts nodes.
Change-Id: I673e8ccf191048fef966a8f6cd84858e1a3b824f
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
