This change is a duplicate version of a tiny profile
with an updated load address and smem layout
Change-Id: I16ceb46547382961e9e91a26af3862057093d3b2
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This patch adds config_name for AP-MI04.1-C2 RDP to support
the OpenWrt version 23.05
Change-Id: I7198ad3a73fd8a58022a133cba9494d8af458566
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This patch enables qca8x8x switch support on ipq6018.
Change-Id: I5e037071dad112558682255f99bac2adb2b411b5
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch enables CMD_ZIP and GZIP_COMPRESSED
Change-Id: Ice534ca96b284528494b651b58ac3dbba509a0a7
Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com>
Instead of updating the config_names in fdt_blob,
the config_names are maintained locally this avoids
the fdt_blob resizing
Change-Id: Ib1d6fecd973394363012564a8fc9e84d36fc7462
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
ipq5332 is a TME-L based platform in which before
encrypt/decrypt, we are required to derive a key
handle.
This patch adds support for the same.
Change-Id: I28b327611b62381542086d6d599c4a0195525aca
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
In Q6, we are seeing rare PCIe enumeration failure and suspecting
U-boot PCIe enumeration (Gen1) could impact. Hence skipping the PCIe
enumeration during the board_init based on CONFIG_IPQ_PCI_INIT_DEFER
config and added it after autoboot is stopped.
Change-Id: I79d0d0aef2eeea9bf49157f405a29f23b3c2239d
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
Changing the CONFIG_IPQ_FDT_HIGH address for ipq807x
platform to avoid the DT blob load address from
overlapping with the tzapp_data(0x4A300000) region.
The kernel created a 2MB readonly mapping of the
DT blob. Due to this the mapping will also extend
into the tzapp(0x4A400000) region, which is TZ
protected.
Hence changing the FDT high address to from 0x4a400000
to 0x4a200000 to avoid access violation issues.
Change-Id: I3283c0afdec8ab126ea109c7ca9184a9ea577f16
Signed-off-by: Hariharan K <quic_harihk@quicinc.com>
This patch also skips adding clean marker if rootfs_data
size is less than 1MB
Change-Id: I3687a1d9954dfc319f6b3880556169269a72c4ea
Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
during NOR rootfs image flashing , each block in the
remaning space (rootfs_data) will be updated with jffs2 clean marker
Change-Id: I324ee3d61b427533473ebed6653ae8716b31600b
Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
Remove support for all SPI flash part
except for GD25LB128D (GIGADEVICE).
Also remove driver support (if any) for
part manufacturer other than GIGADEVICE.
Change-Id: Iaa16f4b20df069aef46def441fe770ef20fc50c4
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
updated load addr from 0x44000000 to 0x50000000
Note: In tiny build load add remains same as 0x44000000
Change-Id: Ic0665b59f00878c73b160cfe2b3b9d37adeb586d
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
SHA1, SHA256 and MD5 are enabled by default.
Added below configs to configure them easily.
CONFIG_FIT_DISABLE_MD5
CONFIG_FIT_DISABLE_SHA1
CONFIG_FIT_DISABLE_SHA256
SHA1 hash verification was used for FIT image
verification along with CRC32. Added a check
in FIT image hash verification to skip SHA1,
if TINY profile is enabled.
Change-Id: Ie3dbcde46b30938e693e8060218aa9834513bcff
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This changes enable both PHY and switch configure
simultaneously and also switch can be configure
to any port.
And also these changes enable dual MDIO bus support.
Change-Id: Ib86c8a15abb9a7a35aa86d87cef78ad917dd1a00
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
The CRASHDUMP RESET bit of TCSR_BOOT_MISC_DETECT Register
has to be set in the crashdump collection path before reset
from u-boot for the TZ to differentiate between the
normal reset and crashdump reset from u-boot and
to retain the crash reason.
Change-Id: Ic74cec02bf749925e599ee12205257480a234064
Signed-off-by: Priyanka MA <quic_priyma@quicnic.com>
This config is needed to enable mmc protection
based on gpt readonly attribute.
Usecase:
1. In emmc partition xml, set readonly attribute
of a partition to true.
2. Generate partition bin, flash and reboot.
3. From uboot, read & write the partition.
4. Write should not go through. Crc32 checksum of
the content before & after write should match.
Change-Id: I161f594f13c88b6d22c4b4932399d18eeb951372
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
These are used in multiple places so update them to use a shared #define.
Change-Id: I3cc304f04c56c9d1a22df46e68f601b5acd2b34e
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
added boot type based nand or emmc flash selection.
So machid based flash selection becomes obsolete.
Change-Id: I96fa43d31d23397fa249e02f62b905d6e4e67770
Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
The CRASHDUMP RESET bit of TCSR_BOOT_MISC_DETECT Register
has to be set before reset from u-boot in the
crashdump collection path for TZ to differentiate between the
normal reset and crashdump reset from u-boot and
to retain the crash reason.
Change-Id: Ib623bfeab15d1bc230f4a8824218f1a3c4368fbb
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
TCSR_BOOT_MISC_REG bits are not properly managed
for DLOAD implementation. Modify only necessary
bits to enable availability for new feature
implementations using TCSR_BOOT_MISC_REG.
Change-Id: I888a1bf6ce3654b0453c9ec2f87b4d5ff2a20de0
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
