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net: ipq5332: update clk & TDM configuration

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This changes update TDM and uniphy clk config

Change-Id: I7235713e130d07bb46e5c325bdfa3dd47da1e55c
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This commit is contained in:
Vandhiadevan Karunamoorthy 2022-11-18 00:07:26 +05:30 • committed by Gerrit - the friendly Code Review server
parent b6f164cdea
commit a0b5416f43
4 changed files with 36 additions and 13 deletions
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24
drivers/net/ipq5332/ipq5332_edma.c
View file

@ -979,25 +979,25 @@ static int ipq5332_eth_init(struct eth_device *eth_dev, bd_t *this)
phy_addr, &curr_speed[i]);
phy_get_ops->phy_get_duplex(priv->mac_unit,
phy_addr, &duplex);
}
if (status == 0) {
linkup++;
if (old_speed[i] == curr_speed[i]) {
print_eth_info(priv->mac_unit, i,
lstatus[status],
curr_speed[i],
dp[duplex]);
continue;
} else {
old_speed[i] = curr_speed[i];
}
} else {
if (status == 0) {
linkup++;
if (old_speed[i] == curr_speed[i]) {
print_eth_info(priv->mac_unit, i,
lstatus[status],
curr_speed[i],
dp[duplex]);
continue;
} else {
old_speed[i] = curr_speed[i];
}
} else {
print_eth_info(priv->mac_unit, i,
lstatus[status],
curr_speed[i],
dp[duplex]);
continue;
}
#endif

21
drivers/net/ipq5332/ipq5332_ppe.c
View file

@ -298,6 +298,10 @@ void ipq5332_port_mac_clock_reset(int port)
reg_val = readl(NSS_CC_UNIPHY_PORT1_RX_CBCR + 0x4 + (port * 0x8));
reg_val &= ~GCC_PORT1_ARES;
writel(reg_val, NSS_CC_UNIPHY_PORT1_RX_CBCR + 0x4 + (port * 0x8));
/* Enabel UNIPHY port clk */
writel(0x1, (NSS_CC_UNIPHY_PORT1_RX_CBCR + (port * 0x8)));
writel(0x1, (NSS_CC_UNIPHY_PORT1_TX_CBCR + (port * 0x8)));
}
void ipq5332_speed_clock_set(int port_id, int clk[4])
@ -508,6 +512,23 @@ static void ipq5332_ppe_tdm_configuration(void)
ipq5332_ppe_reg_write(0xc1b0, 0x31);
ipq5332_ppe_reg_write(0xc1c0, 0x22);
ipq5332_ppe_reg_write(0xc1d0, 0x32);
ipq5332_ppe_reg_write(0xb000, 0x8000001E);
writel(0x20,(void *)0x3a47a000);
writel(0x12,(void *)0x3a47a010);
writel(0x1 ,(void *)0x3a47a020);
writel(0x2 ,(void *)0x3a47a030);
writel(0x10,(void *)0x3a47a040);
writel(0x21,(void *)0x3a47a050);
writel(0x2 ,(void *)0x3a47a060);
writel(0x10,(void *)0x3a47a070);
writel(0x12,(void *)0x3a47a080);
writel(0x1 ,(void *)0x3a47a090);
writel(0xa ,(void *)0x3a400000);
writel(0x303,(void *)0x3a026100);
writel(0x303,(void *)0x3a026104);
writel(0x303,(void *)0x3a026108);
#else
ipq5332_ppe_reg_write(0xc000, 0x20);
ipq5332_ppe_reg_write(0xc010, 0x32);

3
drivers/net/ipq5332/ipq5332_ppe.h
View file

@ -263,3 +263,6 @@ union ipo_action_u {
#define NSS_CC_PORT1_RX_CMD_RCGR 0x39B00450
#define GCC_PORT1_ARES 1 << 2
#define NSS_CC_PPE_BCR 0x39B003E4
#define NSS_CC_UNIPHY_PORT1_RX_CBCR 0x39B004B4
#define NSS_CC_UNIPHY_PORT1_TX_CBCR 0x39B004B8

1
include/configs/ipq5332.h
View file

@ -21,7 +21,6 @@
#endif
#define CONFIG_IPQ5332
#define CONFIG_IPQ5332_RUMI
#undef CONFIG_QCA_DISABLE_SCM
#define CONFIG_SPI_FLASH_CYPRESS
#define CONFIG_SYS_NO_FLASH