mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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drivers: net: ipq9574: update QCA8084 config
This changes enable both PHY and switch configure simultaneously and also switch can be configure to any port. And also these changes enable dual MDIO bus support. Change-Id: Ib86c8a15abb9a7a35aa86d87cef78ad917dd1a00 Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This commit is contained in:
Vandhiadevan Karunamoorthy
parent
b0e133d937
commit
72b0604461
4 changed files with 89 additions and 23 deletions
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@ -22,7 +22,7 @@
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/* Overriding config to support QCA8084 Switch instead of
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* QCA8084 PHY
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*/
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qca8084_switch_enable = <1>;
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qca8084_swt_port = <0>;
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switch_mac_mode0 = <PORT_WRAPPER_SGMII_PLUS>;
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qca8084_swt_info {
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@ -47,6 +47,7 @@ static struct ipq9574_eth_dev *ipq9574_edma_dev[IPQ9574_EDMA_DEV];
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uchar ipq9574_def_enetaddr[6] = {0x00, 0x03, 0x7F, 0xBA, 0xDB, 0xAD};
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phy_info_t *phy_info[IPQ9574_PHY_MAX] = {0};
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phy_info_t *swt_info[QCA8084_MAX_PORTS] = {0};
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mdio_info_t *mdio_info[IPQ9574_PHY_MAX] = {0};
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int sgmii_mode[2] = {0};
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extern void ipq_phy_addr_fixup(void);
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@ -60,6 +61,7 @@ extern int ipq_qca8033_phy_init(struct phy_ops **ops, u32 phy_id);
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extern int ipq_qca8081_phy_init(struct phy_ops **ops, u32 phy_id);
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extern int ipq_qca_aquantia_phy_init(struct phy_ops **ops, u32 phy_id);
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extern int ipq_board_fw_download(unsigned int phy_addr);
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extern void ipq_set_mdio_mode(const int mode, const int bus);
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#ifdef CONFIG_QCA8084_PHY_MODE
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extern void ipq_qca8084_phy_hw_init(struct phy_ops **ops, u32 phy_addr);
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@ -74,7 +76,7 @@ extern void ipq_qca8084_switch_hw_reset(int gpio);
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#endif /* CONFIG_QCA8084_SWT_MODE */
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static int tftp_acl_our_port;
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static int qca8084_swt_enb = 0;
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static int qca8084_swt_port = -1;
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/*
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* EDMA hardware instance
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@ -934,6 +936,11 @@ static int ipq9574_eth_init(struct eth_device *eth_dev, bd_t *this)
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* else we will return with -1;
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*/
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for (i = 0; i < IPQ9574_PHY_MAX; i++) {
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/*
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* set mdio mode and bus no
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*/
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ipq_set_mdio_mode(mdio_info[i]->mode, mdio_info[i]->bus_no);
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if (current_active_port != -1 && i != current_active_port) {
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ipq9574_gmac_port_disable(i);
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ppe_port_bridge_txmac_set(i + 1, 1);
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@ -996,10 +1003,9 @@ static int ipq9574_eth_init(struct eth_device *eth_dev, bd_t *this)
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return sfp_mode;
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}
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#ifdef CONFIG_QCA8084_SWT_MODE
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} else if (qca8084_swt_enb && (phy_info[i]->phy_type == QCA8084_PHY_TYPE)) {
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} else if ((qca8084_swt_port == i)&& (phy_info[i]->phy_type == QCA8084_PHY_TYPE)) {
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if (!ipq_qca8084_link_update(swt_info))
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linkup++;
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i = PORT3;
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continue;
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#endif /* CONFIG_QCA8084_SWT_MODE */
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} else {
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@ -1308,7 +1314,7 @@ static int ipq9574_eth_init(struct eth_device *eth_dev, bd_t *this)
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ipq9574_speed_clock_set(i, clk);
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#ifdef CONFIG_QCA8084_PHY_MODE
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if (!qca8084_swt_enb && (phy_info[i]->phy_type == QCA8084_PHY_TYPE))
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if ((qca8084_swt_port != i) && (phy_info[i]->phy_type == QCA8084_PHY_TYPE))
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qca8084_phy_uqxgmii_speed_fixup(phy_info[i]->phy_address,
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i + 1, status, curr_speed[i]);
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#endif /* CONFIG_QCA8084_PHY_MODE */
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@ -1318,7 +1324,7 @@ static int ipq9574_eth_init(struct eth_device *eth_dev, bd_t *this)
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if (i == aquantia_port[0] || i == aquantia_port[1] ||
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i == aquantia_port[2] ||
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((phy_info[i]->phy_type == QCA8084_PHY_TYPE) &&
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(!qca8084_swt_enb))) {
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(qca8084_swt_port != i))) {
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ipq9574_uxsgmii_speed_set(i, mac_speed, duplex, status);
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}
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else if ((i == sfp_port[0] || i == sfp_port[1] || i == sfp_port[2]) && sgmii_fiber == 0)
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@ -1911,6 +1917,27 @@ void get_phy_address(int offset, phy_info_t * phy_info[])
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}
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}
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void get_mdio_info(int offset, mdio_info_t * mdio_info[])
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{
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int mode;
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int bus_no;
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int i;
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for (i = 0; i < IPQ9574_PHY_MAX; i++)
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mdio_info[i] = ipq9574_alloc_mem(sizeof(mdio_info_t));
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i = 0;
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for (offset = fdt_first_subnode(gd->fdt_blob, offset); offset > 0;
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offset = fdt_next_subnode(gd->fdt_blob, offset)) {
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mode = fdtdec_get_uint(gd->fdt_blob,
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offset, "mdio_mode", 0);
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bus_no = fdtdec_get_uint(gd->fdt_blob,
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offset, "bus_no", 0);
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mdio_info[i]->mode = mode;
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mdio_info[i]->bus_no = bus_no;
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++i;
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}
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}
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int ipq9574_edma_init(void *edma_board_cfg)
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{
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struct eth_device *dev[IPQ9574_EDMA_DEV];
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@ -1956,9 +1983,9 @@ int ipq9574_edma_init(void *edma_board_cfg)
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}
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#ifdef CONFIG_QCA8084_SWT_MODE
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qca8084_swt_enb = fdtdec_get_uint(gd->fdt_blob, node, "qca8084_switch_enable", 0);
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qca8084_swt_port = fdtdec_get_uint(gd->fdt_blob, node, "qca8084_swt_port", -1);
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qca8084_gpio = fdtdec_get_uint(gd->fdt_blob, node, "qca808x_gpio", 0);
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if (qca8084_swt_enb) {
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if (qca8084_swt_port != -1) {
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if (qca8084_gpio)
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ipq_qca8084_switch_hw_reset(qca8084_gpio);
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}
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@ -1969,8 +1996,14 @@ int ipq9574_edma_init(void *edma_board_cfg)
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#endif
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phy_node = fdt_path_offset(gd->fdt_blob, "/ess-switch/port_phyinfo");
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if (phy_node >= 0)
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if (phy_node >= 0) {
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get_phy_address(phy_node, phy_info);
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}
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phy_node = fdt_path_offset(gd->fdt_blob, "/ess-switch/port_phyinfo");
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if (phy_node >= 0) {
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get_mdio_info(phy_node, mdio_info);
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}
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mode = fdtdec_get_uint(gd->fdt_blob, node, "switch_mac_mode0", -1);
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if (mode < 0) {
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@ -2069,6 +2102,13 @@ int ipq9574_edma_init(void *edma_board_cfg)
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goto init_failed;
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for (phy_id = 0; phy_id < IPQ9574_PHY_MAX; phy_id++) {
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ipq_set_mdio_mode(mdio_info[phy_id]->mode,
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mdio_info[phy_id]->bus_no);
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if(phy_info[phy_id]->phy_type == UNUSED_PHY_TYPE)
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continue;
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if (phy_node >= 0) {
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phy_addr = phy_info[phy_id]->phy_address;
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#ifdef CONFIG_QCA8084_PHY
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@ -2079,10 +2119,14 @@ int ipq9574_edma_init(void *edma_board_cfg)
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goto init_failed;
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}
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#ifdef CONFIG_QCA8084_PHY
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if (phy_type == QCA8084_PHY_TYPE && !qca8084_init_done) {
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ipq_phy_addr_fixup();
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ipq_clock_init();
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qca8084_init_done = 1;
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if (phy_type == QCA8084_PHY_TYPE) {
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if ((qca8084_swt_port == phy_id) ||
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!qca8084_init_done) {
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ipq_phy_addr_fixup();
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ipq_clock_init();
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if (qca8084_swt_port != phy_id)
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qca8084_init_done = 1;
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}
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}
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#endif
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@ -2130,7 +2174,8 @@ int ipq9574_edma_init(void *edma_board_cfg)
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#endif
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#ifdef CONFIG_QCA8084_PHY_MODE
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case QCA8084_PHY:
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ipq_qca8084_phy_hw_init(&ipq9574_edma_dev[i]->ops[phy_id], phy_addr);
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if (qca8084_swt_port != phy_id)
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ipq_qca8084_phy_hw_init(&ipq9574_edma_dev[i]->ops[phy_id], phy_addr);
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break;
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#endif
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#ifdef CONFIG_IPQ9574_QCA_AQUANTIA_PHY
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@ -2164,22 +2209,33 @@ int ipq9574_edma_init(void *edma_board_cfg)
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#ifdef CONFIG_QCA8084_SWT_MODE
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/** QCA8084 switch specific configurations */
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if (qca8084_swt_enb) {
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if (qca8084_swt_port != -1) {
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ipq_set_mdio_mode(mdio_info[qca8084_swt_port]->mode,
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mdio_info[qca8084_swt_port]->bus_no);
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/** Force speed alder 1st port for QCA8084 switch mode */
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switch (swt_info[0]->forced_speed) {
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case FAL_SPEED_1000:
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case FAL_SPEED_2500:
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clk[0] = 0x201;
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clk[1] = 0x0;
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clk[2] = 0x301;
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clk[3] = 0x0;
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if (qca8084_swt_port == 4) {
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clk[0] = 0x401;
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clk[1] = 0x0;
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clk[2] = 0x501;
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clk[3] = 0x0;
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} else {
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clk[0] = 0x201;
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clk[1] = 0x0;
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clk[2] = 0x301;
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clk[3] = 0x0;
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}
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pr_debug("Force speed Alder 1st PORT for QCA8084 switch mode \n");
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ipq9574_speed_clock_set(PORT0, clk);
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ipq9574_speed_clock_set(
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qca8084_swt_port, clk);
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/** Force Link-speed: 1000M
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* Force Link-status: enable */
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ipq9574_pqsgmii_speed_set(PORT0, 0x2, 0x0);
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ipq9574_pqsgmii_speed_set(
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qca8084_swt_port,
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0x2, 0x0);
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break;
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default:
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@ -2190,7 +2246,7 @@ int ipq9574_edma_init(void *edma_board_cfg)
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ret = ipq_qca8084_hw_init(swt_info);
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if (ret < 0) {
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printf("Error: ipq_qca8084_hw_init failed \n");
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goto init_failed;
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qca8084_swt_port = -1;
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}
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}
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#endif
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@ -475,6 +475,9 @@ void ipq9574_uxsgmii_speed_set(int port, int speed, int duplex,
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switch(port) {
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case 0:
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case 1:
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case 2:
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case 3:
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uniphy_index = PPE_UNIPHY_INSTANCE0;
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break;
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case 4:
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@ -402,4 +402,11 @@ extern loff_t board_env_size;
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#undef CONFIG_BOOTM_RTEMS
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#undef CONFIG_BOOTM_VXWORKS
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#define CONFIG_BITBANGMII
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#ifdef CONFIG_BITBANGMII
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#define CONFIG_IPQ_QTI_BIT_BANGMII
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#define GPIO_IN_OUT_BIT 9
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#define CONFIG_BITBANGMII_MULTI
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#endif
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#endif /* _IPQ9574_H */
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