The MX35UF4GE4AD-Z4I part has 256 bytes of spare
size. Updating the correct info in the nand table.
Change-Id: Ic3c71d870db8f7e54d0aeb0de27e1812f0fdff7d
Signed-off-by: Hariharan K <quic_harihk@quicinc.com>
This patch enables qca8x8x switch support on ipq6018.
Change-Id: I5e037071dad112558682255f99bac2adb2b411b5
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This changes clean and disable edma before
jumping to kernel.
Change-Id: I324a9b410fb94e1e01e63ad77c46b5129bc76e54
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This patch skips uniphy configuration if it is already
configured with the requested mode.
Change-Id: I4aa1f249a5393881f83e35f3016259986085921c
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
Fix pci_find_ipq_devices(), which is checking all the PCIe hose from
the given ID and if searching device is not present, it moves till
the last PCIe hose and finds the device. This leads to duplicate
entries if unknown devices are also present. Instead it should
check only the selected PCIe hose and return success or failure.
Add QCN6432 in PCI device list so that list_pci command can show it.
Change-Id: I1fd1af9a760354f558680889dd5804abd6145dea
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
during recovery mode dcache will not be available.
So, skip dcache disable and enable during
network transfer
Change-Id: Icc89c846580ebcd73332061a55ae9d8c15fa2b1a
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
skip printing the partition info in smem if it exceeds flash size for
both nand and nor cases.
Change-Id: I446a3300865fbf543b6e585f918f747a1b75a15c
Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com>
Remove support for all SPI flash part
except for GD25LB128D (GIGADEVICE).
Also remove driver support (if any) for
part manufacturer other than GIGADEVICE.
Change-Id: Iaa16f4b20df069aef46def441fe770ef20fc50c4
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
Changing the data type of phy_chip_id1 and phy_chip_id2 from
32-bit to 16-bit and initializing them to 0 to avoid any junk
value while shifting and concatenating them to form the final
phy_chip_id.
Change-Id: If96b01db9ec2b3c0a259ea3c98516d1f18a898ce
Signed-off-by: Hariharan K <quic_harihk@quicinc.com>
This change will add support for giga device
GD5F2GM7REYIG spi nand support.
Change-Id: I97772e0a8210bd5a6d41e10bbfbdd75b44e53108
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
update the port clock setting for qca8084 PHY with respect to
10M speed configuration.
Change-Id: I16403b155f31f37a6bdf828150ca2d0923a29f3e
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
Previously 100M speed is not working in port 4 of MHT
by-pass mode. SGMII speed fixup required to dynamically
adjust the gcc clock based on the link-speed.
Still, this is requried only for port 4, because remaining
ports (1-3) will be taken care from switch core. So, added
speed fix for the by-mode support.
Change-Id: I495aad4b64de12ae7f57c0bdb9e0def08ad38681
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch adds the winbond W25N512GW and W25N02KWZEIR devices
and fixes the W25N01GWZEIG device id from 0xBA to 0xBA21,
W25N02JWZEIF device id from 0xBF to 0xBF22 and
W25N01JW device id from 0xBC to 0xBC21
Change-Id: Ic91800386446263477af06c6d39d9051a2dde3b9
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This changes updates the gcc common clk initialise
steps and adds support for obtaining bitmap
details from dts.
Change-Id: I55e895989823a4fbb97c638ad937ca48c00519c5
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This change set SGMII mode and force mode based on
dts entries.
Change-Id: Ideaa1bb77fe8fb37a7e6b907a987f6dcac54917f
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This changes enable both PHY and switch configure
simultaneously and also switch can be configure
to any port.
And also these changes enable dual MDIO bus support.
Change-Id: Ib86c8a15abb9a7a35aa86d87cef78ad917dd1a00
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
Add skip_pci_mask environment variable to skip pci enumeration
based on the bitmask. Also, removing the pci3 dts entry from
the RDP437 & RDP461 to skip pci3 enumeration.
Example - setenv skip_pci_mask 0xc
The above command will skip pci enumeration of bus 2 & 3.
Change-Id: Iff50acca07ffc026bed84a0d2372e6de0a3ba3a9
Signed-off-by: Amandeep Singh <quic_amansing@quicinc.com>
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
Added JTAG ID, Serial number and Part type read.
Change-Id: Ia03724116230a157fc33406a97c641e3b5750d6a
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
It has the capacity of 1Gbit, i.e., 128MB, so
the number of blocks has been updated to 1024.
1Gbits = 128MB = 2048(page) * 64 (pages per block) * 1024 (blocks)
Change-Id: I552776e4e151d16782db915c3ebae874c5c02696
Signed-off-by: Gurumoorthy Santhakumar <quic_gsanthak@quicinc.com>
Added new config called CONFIG_QCA8084_BYPASS_MODE and moved
all the qca8084 by-pass mode related code under it.
Change-Id: I4157960989cd67576803d494594869265fc81745
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
