Commit graph

8809 commits

Author SHA1 Message Date
Ram Kumar D
457bfcfd2f driver: net: add qca8084 by-pass mode support on MI01.1 RDP
Added QCA8084 by-pass mode support on MI01.1 RDP

Change-Id: I1a14729cac5463675f9cb0d15df3da76746aa81e
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-11-30 09:45:42 +05:30
Linux Build Service Account
24f263d138 Merge "board: ipq5332: remove rumi flags." 2022-11-29 04:49:54 -08:00
Linux Build Service Account
5561bf340e Merge "drivers: net: ipq5332: Updated SFP and MHT config" 2022-11-29 04:49:52 -08:00
Linux Build Service Account
cfa5533c35 Merge "drivers: net: Update typo in MHT" 2022-11-28 14:00:14 -08:00
Linux Build Service Account
9b9aa73681 Merge "Merge branch '2021-02-15-fix-CVE-2021-27097-CVE-2021-27138' Fix CVE-2021-27097 and CVE-2021-27138. For more details see http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-27097 and http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-27138" 2022-11-28 01:46:31 -08:00
Vandhiadevan Karunamoorthy
c77f44b731 board: ipq5332: remove rumi flags.
Change-Id: I84ae7f2c6e8852c879aebc3538a8782c5b335d28
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-11-28 14:46:13 +05:30
Vandhiadevan Karunamoorthy
66dadd051f drivers: net: ipq5332: Updated SFP and MHT config
These changes update config as like below.
1.Config 100M, 1G as GMAC, 2.5G as XGMAC
2.Config MHT as XGMAC.

Change-Id: I0566f3a3d364931e8c8173c3604160f24c2439be
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-11-28 12:10:01 +05:30
Vandhiadevan Karunamoorthy
7c8bcaa2c0 drivers: net: Update typo in MHT
Change-Id: I44bc1e88b82eedff8e72ea4027b8d99b40178463
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-11-27 22:24:33 -08:00
Linux Build Service Account
80c1793ace Merge "pci: ipq9574: Update QCN9224 fuse blow and read" 2022-11-25 11:27:18 -08:00
Praveenkumar I
f89bc531be pci: ipq9574: Update QCN9224 fuse blow and read
Added QCN92xx's SoC global reset and MHI reset in the fuse blow path.
So, the fuse blow can be retried after any failed attempts.

Added ANTI ROLLBACK fuse read.

Change-Id: Ibf255390ffc2086fcbfa9041dc0bcb612f8d9a4e
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
2022-11-25 11:39:09 +05:30
Tom Rini
af3ad1d289 Merge branch '2021-02-15-fix-CVE-2021-27097-CVE-2021-27138'
Fix CVE-2021-27097 and CVE-2021-27138.  For more details see
http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-27097 and
http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-27138

Change-Id: I8f1f03a7e4b1d0bc9d8db51b6a08219f0c47fc2d
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
2022-11-24 00:57:50 -08:00
Vandhiadevan Karunamoorthy
a0b5416f43 net: ipq5332: update clk & TDM configuration
This changes update TDM and uniphy clk config

Change-Id: I7235713e130d07bb46e5c325bdfa3dd47da1e55c
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-11-17 20:12:44 -08:00
Vandhiadevan Karunamoorthy
87487dce1f drivers: net: ipq5332: update MHT switch config
Change-Id: I0ce008fffa08927ffbc58f860ddd0f6be6d76e14
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-11-16 11:20:00 +05:30
Vandhiadevan Karunamoorthy
8fe934032c board: ipq5332: update ethernet configuration
This changes includes update the Speed clock,
common clock update and dts nodes.

Change-Id: I673e8ccf191048fef966a8f6cd84858e1a3b824f
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-11-12 07:14:17 -08:00
Gokul Sriram Palanisamy
d820c5abbc drivers: net: ipq5018: Add SFP 1G and 2.5G Support
Only one SFP port can be enabled at time with
either SGMII or SGMII PLUS mode.

Mode shall be specified from dts for 1G or 2.5G
support respectively. Add below change to enable
SFP as this change is not mainlined.

gmac_cfg {
	gmac2_cfg {
		unit = <1>;
		base = <0x39D00000>;

-		phy_address = <0x1c>;
-		napa_gpio = <39>;
		/*
		 * 6 - SGMII_PLUS (2.5G),
		 * 8 - SGMII_FIBER (1G)
		 */
+               switch_mac_mode = <8>;
+               sfp_tx_gpio = <27>;
+               sfp_rx_gpio = <29>;
	};
};

Change-Id: I507be2b84b1f932802659abffa3288e304e0d411
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
2022-11-07 18:26:58 -08:00
Linux Build Service Account
2cc0af4c3e Merge "pci: ipq9574: Add new command to list the qcn9224 fuses" 2022-11-04 13:33:57 -07:00
Praveenkumar I
2cc20dc1c6 pci: ipq9574: Add new command to list the qcn9224 fuses
"list_qcn9224_fuse" command will print the OEM ID, Secure boot enable
and OEM PK hash details of QCN9224 from all attached PCIe slots.

Change-Id: I87be2f58bcef6898a00f4e179c87f2dcb93a2604
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
2022-11-04 11:35:15 +05:30
Vandhiadevan Karunamoorthy
bc5f3cca5a board: arm: ipq5332: update ethernet configuration
Change-Id: If66707a68ddf5681016acd95332d4056b31fb3fc
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-10-25 23:38:48 -07:00
Timple Raj M
95e16ef259 ipq5332: replace soc name from devsoc to ipq5332 in all file contents
Change-Id: Id5dd98e749bfd229e2c6e9d1944db397d2380cb1
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
2022-10-12 22:31:53 -07:00
Timple Raj M
b12ecdc358 ipq5332: rename files from devsoc to ipq5332
Change-Id: I2a45b4017f98e725b6432e954040c154a39db663
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
2022-10-12 22:31:40 -07:00
Timple Raj M
61c9cf3505 driver: nand: qpic_nand: Add support for giga device spi nand
This change will  add support for giga device GD5F1GM7REYIG
spi nand support.

Change-Id: Ie32cb6824bd0fbcf04449fa070005b7fa323c025
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
2022-10-11 11:23:34 +05:30
Vandhiadevan Karunamoorthy
d18ca4451a drivers: net: ipq9574: Enable usxgmii in UNIPHY0
This change adds usxgmii support in UNIPHY0.
Earlier it was supported up to PSGMII with 4 ports.

With these changes,
UNIPHY0 supports either of the 2 modes mentioned below.
	1. PSGMII with 4 ports
	2. USXGMII with 1 port

Change-Id: Ic4ca62e3ef74d275cda92d86b459d204ee4325ed
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
2022-10-09 22:27:29 -07:00
Praveenkumar I
4a3be8755b pci: ipq9574: Add a new command to list the PCIe device details
Change-Id: I6da44fbd966d8c45ba9b4adb447d415ee15628ce
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
2022-09-27 16:22:05 +05:30
Praveenkumar I
32ad9dcb99 pci: ipq: Add sec.dat fusing support for qcn9224
This change adds a new command to support the qcn9224 fusing.
Fuser blower binary should be transfered via tftp to Host and
using fuse_qcn9224 command, binary can be transfered to qcn9224.
qcn9224 will take care of the fusing.

sample command:
tftpboot fuse_blower.bin
fuse_qcn9224 0

Change-Id: Ie8cd73a2d49799100bd1f717cdc4b8dad070f9bd
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
2022-09-27 12:01:38 +05:30
Linux Build Service Account
daa18ac311 Merge "drivers: net: ipq6018: Removing the additional rx buffer allocation" 2022-09-10 00:51:40 -07:00
Linux Build Service Account
43ddaeef85 Merge "drivers: net: ipq9574: Removing the additional rx buffer allocation" 2022-09-09 22:10:46 -07:00
devi priya
067984e4b5 drivers: net: ipq6018: Removing the additional rx buffer allocation
During long run tests on image download in u-boot, 
EDMA crash was observed as the SKB buffer address 
returned by the RX descriptor was corrupted and was 
pointing to an invalid address:
clean_rx: p: 14 c: 0 skb: 61763b10
WARN: src_info_type:0x0. Drop skb:61763b10

The reason for corruption seems to be the RX buffer allocation that was
happening twice before initiating the EDMA for the next transaction.
This change removes the additional allocation of the Rx buffer which is
not needed.

Change-Id: I4a5b404527469ff3b981749aa4e05080f55807cd
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
2022-09-08 12:54:07 +05:30
devi priya
2ff1847823 drivers: net: ipq9574: Removing the additional rx buffer allocation
During long run tests on image download in u-boot, 
EDMA crash was observed as the SKB buffer address 
returned by the RX descriptor was corrupted and was 
pointing to an invalid address:
clean_rx: p: 14 c: 0 skb: 61763b10
WARN: src_info_type:0x0. Drop skb:61763b10

The reason for corruption seems to be the RX buffer allocation that was
happening twice before initiating the EDMA for the next transaction.
This change removes the additional allocation of the Rx buffer which is
not needed.

Change-Id: I919024df8131fe87640ecc0d481b61012742efbf
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
2022-09-08 12:52:01 +05:30
Md Sadre Alam
01e894db8c drivers: i2c: Fix i2c bus clock issue
This change will fix i2c bus clock issue .

Change-Id: I0d0d424b79cf853b7109c57ad77236f51a2296c6
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
2022-09-05 02:21:55 -07:00
Ram Kumar D
8142f374a4 ipq: updated 32-bit RW support for mii & mdio utils
Change-Id: I50e2bf13cfde82e46cc9068e241f89aa7944bbe6
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-08-02 22:08:44 -07:00
Linux Build Service Account
2aff3b1ee5 Merge "pci: ipq9574: Add a new command to detect the qcn9224 version" 2022-07-28 10:47:06 -07:00
Praveenkumar I
032831ac58 pci: ipq9574: Add a new command to detect the qcn9224 version
This patch adds a new command support to detect the qcn9224 version.
Based on "detect_qcn9224" command, change configures the BAR0 on EP,
does the window mapping and reads the HW version register. Version
value will be populated in "qcn9224_version" env. Version env will
be zero if there is no qcn9224 attach.

Change-Id: I4f4477590b439f31b46cb0b895dc0d9f8279a064
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
2022-07-28 14:48:25 +05:30
Linux Build Service Account
e2b3415a66 Merge "drivers: net: ipq6018: Add optional active_port env support" 2022-07-22 13:47:23 -07:00
Linux Build Service Account
4550a00065 Merge "drivers: net: ipq807x: Add optional active_port env support" 2022-07-22 10:06:23 -07:00
Ram Kumar D
b5cd432c3a driver: net: ipq6018: add port 5 non-bridged support
vsi port configuration for the port 5 was missed out.
So added it.

Change-Id: I5180112786eb0a6d96ac71246beb0b39f5e166aa
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-20 11:11:12 +05:30
Ram Kumar D
17e16a28d3 drivers: net: ipq6018: Add optional active_port env support
This patch adds support for active_port env. With this
change in ipq6018, the end user has an option to
enable & maintain only 1 active ethernet port. There
are no multi-port use case in U-Boot and when multiple
ports were enabled for Kernel usecases, there were some
timeout issues in some special cases during crashdump
collection.

active_port can be used to configure the port which
will be used for TFTP download/upload in u-boot in
those setups. Example: To set Port2 as active_port
following command can be used:

setenv active_port 2 && savee

Note that, the active_port range is from 0 to 4 (there
are a total of 5 ports in ipq6018).

Change-Id: I5e41269ebab8eef96efeeb65f1324cacc9d56710
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-19 13:22:08 +05:30
Ram Kumar D
157ffcfdd2 drivers: net: ipq807x: Add optional active_port env support
This patch adds support for active_port env. With this
change in ipq807x, the end user has an option to
enable & maintain only 1 active ethernet port. There
are no multi-port use case in U-Boot and when multiple
ports were enabled for Kernel usecases, there were some
timeout issues in some special cases during crashdump
collection.

active_port can be used to configure the port which
will be used for TFTP download/upload in u-boot in
those setups. Example: To set Port2 as active_port
following command can be used:

setenv active_port 2 && savee

Note that, the active_port range is from 0 to 5 (there
are a total of 6 ports in ipq807x).

Change-Id: I1840cbeb2529cb2d47547852283a215aea551a4f
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-19 11:43:07 +05:30
Ram Kumar D
b8611c7623 driver: net: qca8084: add seperate configs for PHY & switch
Currently if CONFIG_QCA8084_PHY is enabled means, it will build
all qca8084 functions required for both PHY & switch mode. But,
some ipq devices might uses anyone of them. So, add configs to
seperate the PHY & switch mode and define it in corresponding
defconfig file as per the need.

Also, some of the qca8084 functions will be used only for debug
purpose, those functions are moved under the config QCA8084_DEBUG.

Thereby, we can save some space in the u-boot.

Change-Id: I7e5f53869629a0c7cbbb12daf04ed782c9693623
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-11 13:15:03 +05:30
Ram Kumar D
5fa35de070 driver: net: qca8084: reduce clk identifier string size
This size of clock identifier string is large, so which
in-turn reflects in the size of the qca8084_clk object file,
and thus increase uboot size. By reducing the clk identifier
string size, we can save around 0.9K.

Change-Id: Ic986155b6cc2692d67e9c855928ce8039d294d3f
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-11 10:55:15 +05:30
Ram Kumar D
75bc424247 driver: net: qca8084: change inline func to non-inline func
Currently, bottom level apis such as qca8084 clk and pinconf
functions are defined as inline functions, which took around
1.3K memory in the uboot. So, update those functions to non-
inline functions to save that space.

Change-Id: I2972ca80d7df80a72d4a027e790400f391546d4b
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-11 10:54:48 +05:30
Ram Kumar D
b717c79249 drivers: net: devsoc: enable init non-cache buf support
This changes initialize non-cache buffer every time
before edma configuration.

Change-Id: I3a4f84076516feeb7b578a7543d6e68d788c8931
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-08 08:54:45 +05:30
Ram Kumar D
b9cbde2bac driver: net: devsoc: removed the extra ports and uniphy
In devsoc, we have 2 ports and 2 uniphys, so removed the extra
ports and uniphy configurations from the source. Also, updated
the clock src configuration with respect available uniphys and
removed the SFP port support.

Change-Id: I557bd6d215508c190a3e733a0304873ecd02eb24
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-05 09:01:13 +05:30
Ram Kumar D
9a6c369849 driver: net: devsoc: add support for S17C switch
Change-Id: If7ccaf9b63b68b0635f955228b161040ab5618cb
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-05 09:01:13 +05:30
Ram Kumar D
498754d0eb drivers: net: devsoc: Add support for QCA8084 switch mode
Change-Id: Ibc6517c39f0f9a24e18e62a6810b529b2d60afcf
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-05 09:01:13 +05:30
Ram Kumar D
3a42e3475f drivers: net: devsoc: add aquantia PHY support
Change-Id: I4671838eae0d0d7d47bb15a31235b686dc34dccb
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-07-05 09:01:13 +05:30
Ram Kumar D
5fc0b17e2f driver: net: ipq9574: change the qca8084 link update logic
In qca8084 phy mode, each phy is assigned to one mac in the ipq9574,
where as in the switch mode, only mac1 will used for all the 4 ports
of the qca8084, mac2-4 will be left unused. So, updated the
logic to update the link status of the individual ports, when qca8084
is in switch mode.

Change-Id: I128c3eafb7c85c0db9d252e047457ea8820df368
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-06-29 12:01:54 +05:30
Ram Kumar D
0b04ce17b5 drivers: net: ipq9574: Add support for QCA8084 switch mode
Change-Id: I315fd246c59bf134e41752e01d2866589c64aeb8
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-06-15 23:09:38 -07:00
Ram Kumar D
cfc0877b85 drivers: net: Add switch mode support for QCA8084
Change-Id: I3e00ee6e54dadcae9c45bc157c6391e6f0dbda55
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-06-15 23:09:14 -07:00
Ram Kumar D
0782010934 drivers: net: ipq: correct the efuse for ES QCA8084 chip
Change-Id: Ice70f4b1b16eb43e7224bbc8f258ec1dae452f23
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-06-13 11:43:24 +05:30
Ram Kumar D
a95cba141c drivers: net: devsoc: added eth support for devsoc
Change-Id: I4d646c1a89d90febd573ae92980e0c665b1dc060
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
2022-05-31 23:52:34 +05:30