This change enables u-boot support for AP.DK07.1-C4 configuration.
AP.DK07.1-C4 enables QCA402x IOT support
Change-Id: I5982b8f8783755b03d11c878f8108d71e6ace6d1
Signed-off-by: Gitanjali Krishna <gitanjal@codeaurora.org>
This patch enables the support to authenticate the signed images
before flashing through the 'secure_authenticate' command.
Also, changes have been done for compatibility with the 64Bit TZ variants.
Change-Id: I0972b481b826c9594367eda31a2e9c87566db705
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
Add environment variable in uboot and device-tree node
in kernel as "flash_type" to expose current boot mode.
Change-Id: I15d4547f135f187a157dd7b303fc31f2df77cec2
Signed-off-by: Pavithra Palanisamy <pavip@codeaurora.org>
The ONFI NAND device specifies the required ECC correction in its
param page but for non ONFI device, we don't have such info.
The QPIC NAND contoller can use 8 bit ECC if the chip has required
number of spare bytes. This patch calculates the minimum required
spare bytes for using 8 bit ECC and select the same, if non ONFI
device has required number of spare bytes otherwise 4 bit ECC
will be used.
Change-Id: If7c718f4288eee16857171335897e3209a05fd0b
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
This change is for mounting the rootfs partition in kernel based
on UUID(Universally Unique IDentifier). In embedded system it is
common to store rootfs on SD card or eMMC. Typically the kernel
command line has like: root=/dev/mmcblk0p20 to tell the kernel
where to look for rootfs partition. The problem in this approach
is the eMMC device number can vary based on wether the SD card
present or not in the SD card slot. Also depending on kernel version
the eMMC device number can vary. This means passing the eMMC device
for specifying the rootfs location is not robust approach.
If SD card first get detected then the base minor 0 is assigned to
SD card and kernel will try to mount rootfs from SD card and if
there is no rootfs present on SD card then kernel fail to mount the
rootfs.
Change-Id: Ia9e6dded61292bed8a10a40fd3cb86f4026393eb
Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
Invokes TZ (via scm call) to pull Core-1 out of reset if
crash magic is set. TZ saves the register contents in the
NSS TCM, which is saved from U-Boot as CPU1_REG.BIN as part
of the crash dump saving procedure.
Change-Id: I8e1404fb354a47ae69d70d13a79f45bd4eb1c450
Signed-off-by: Antony Arun T <antothom@codeaurora.org>
If the dump_to_flash environment variable is set with the proper
offset in u-boot, crashdump data will be stored to flash memory.
Otherwise it will be stored in tftp server.
Change-Id: I10ac1016e3dfe6a2fa11a0a67c5774b29c3df67a
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Made the necessary changes to retrieve the tz version through
SCM call and append the same to device tree.
Change-Id: I890f82a4ec03bb9c24eccce09fdeba9d948e1c71
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
If crashdump magic is found, should not allow user
to access u-boot prompt as tz will be in unsecure state.
Change-Id: Icdc94c33fb87664857bafa981950f9768794cf11
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
ipq806x has different alignment of smem_ram_ptable structure when
compared to ipq40xx / ipq807x, which leads to fetching of wrong
information.
This patch addresses the issue by moving the above structure to
board specific.
Change-Id: If7bf2fc54243fc38d1b0a5c9e6f6ba6f9641c700
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
If crashdump magic is found, should not allow user
to access u-boot prompt as tz will be in unsecure state.
Change-Id: I081e84eceada7ffe72d9b4fa4f0425535e4aabde
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Some of the newer nand parts can have bit flips in an erased
page due to the process technology used. In this case, qpic
nand controller is not able to identify that page as an erased
page. In case of bitflips, the ECC engine tries to correct the
data and then it generates the uncorrectable error. Now, this
data is not equal to original raw data.
Following logic is being added to identify the erased
codeword bitflips.
1. Maintain the bitmasks for the codewords which generated
uncorrectable error.
2. Read the raw data again in temp buffer and count the
number of zeros. Since spare bytes are unused in ECC layout and
won’t affect ECC correctability so no need to count number of
zero in spare bytes.
3. If the number of zero is below ECC correctability then it
can be treated as erased CW. In this case, make all the data/oob
of actual user buffers as 0xff.
Change-Id: Ie0427c6802e2e41234137e0fbbf51c5a50a35946
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
This patch does minor code reorganization to store spare, ecc and
bbm bytes in nand device structure which will be useful in
subsequent patches.
Change-Id: Id44c53e204a874569968764798c346a609695acf
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Following are the major issues in current implementation for
checking the read errors
1. For checking the erased CW, NAND_ERASED_CW_DETECT_STATUS
is being read inside qpic_nand_check_status. The
qpic_nand_check_status will be called after complete page read
so reading status register won’t help in getting the register
value after each CW reads.
2. The mtd layer expects the driver to return non-negative
integer representing the maximum number of bitflips that were
corrected on any one ecc region. The mtd layer takes care of
returning EUCLEAN based on returned number.
3. mtd->ecc_stats is only applicable when ECC engine is
doing ECC correction. For raw reads, the stats should not be
incremented.
Now the changes have been done to reorganize the error handling
1. schedule the NAND_ERASED_CW_DETECT_STATUS reading after
every CW read and check the same if ECC engine generates
uncorrectable error.
2. For raw read, the ECC engine will never generate the
uncorrectable error or erased CW so check only
NAND_FLASH_STATUS.
3. The qpic_nand_read_oob should return the maximum number
of bitflips that were corrected on any one ecc region so
introduce the max_bitflips for maintaining the same.
4. The read should return the complete data in case of
BADMSG so move the BADMSG check in the main read function.
Change-Id: Ibef56294ace00d7cd67b501f623fb1d3aeb2c6ec
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
1. ecc strength can be assigned in mtd structure itself so
remove the ecc_width from qpic nand dev structure
2. Initialize bitflip_threshold with 3*4 of ecc strength so
that MTD layer will return EUCLEAN if number of ecc correction
are more than bitflip_threshold.
Change-Id: Ieafd1957b89a05f9dd0fdfe829712d8891bd6a48
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
NANDC_RESULT_BAD_PAGE is not being returned by any operation, so
it can be removed.
Change-Id: Ia90e4e6b7ef7577d069d312d51083b50f49bf980
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
This patch enables SDHCI mode and also supports
data transfer using ADMA method.
Change-Id: Ia3187fec9024ad0972ca720cf0b9ddc6a59b906c
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
Reset command must be the first command issued to all
targets after the NAND flash device is powered on.
Change-Id: I617dc5b0ad8d72705dcf20f1cb554134b166e533
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
This SMEM type is to determine the spi flash addr is in 3 byte
or 4 byte.
Change-Id: I705a9c5c6f760b93e112a873ead41cd76520501b
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Added a separate dumpinfo entry for
Secure boot to skip secure region.
Change-Id: Ib3836a851e8b0603a9c08013de293dcbe8e3c0fb
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
NSS-IMEM region is copied to a dynamic address
region in DRAM during kernel crash to avoid
NSS dump corruption.
This patch includes support to save the NSS dump
from the dynamic DRAM region to file in host machine.
Change-Id: I6131da890dc8bde382a3d2511ea930cd76c1f79e
Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
Updated number of alternate partitions and
alternate partition data structure to match
smem entry.
Change-Id: I62484e369ed3d35037237fde2d71f9af045e438a
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Added scm_call wrapper to support fuseipq
command to work with 64 bit scm_call.
Change-Id: Ie1fd2925e9f7ed5b3eb57eb44b1c360d0d7de916
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
The QPIC XFER STEPS will not be configured in non NAND boot
mode and the data transfer speed will be very slow. Now this
patch reads the timing parameter from ONFI page and configures
the NAND XFER STEPS registers for highest supported ONFI mode.
For NON ONFI device, it will configure to default mode.
Change-Id: I2daf4a92255307efc53db9bb7fe2f02e8c00c3fa
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
ipq40xx, ipq807x hardware share the qca8075 phy. So the qca8075 phy
mdio, driver has been moved to common directory for use by both the
hardware.
Change-Id: Id6e9342438ffbdf8599860df6fbb39bba30429b3
Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org>
flash_secondary_type is specific to ipq8064. Initialization of this
parameter is moved into boards specific file.
Change-Id: If1a0e44e3d0a674ce497de045d9c5095b67bc913
Signed-off-by: Gokul Sriram Palanisamy <gpalan@codeaurora.org>
Added the ipq807x ethernet edma, ppe driver support
Change-Id: Ibcac04d8a60c1ca74549834b70735a6f15b58358
Signed-off-by: Aditya Kumar Patra S <apatr@codeaurora.org>
This patch enables qca_mmc driver and
also has the changes required for emmc
support
Change-Id: Icc8d807caffced79d6ca576fe6220c522ebda3f7
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
Added the ipq807x ethernet edma, ppe, gmac driver support
in the u-boot
Change-Id: I1d8ddd19f2c3d3765adda2253d3b71876142aa59
Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org>
