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ipq40xx: Device tree support for AP.DK07.1-C4

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This change enables u-boot support for AP.DK07.1-C4 configuration.
AP.DK07.1-C4 enables QCA402x IOT support

Change-Id: I5982b8f8783755b03d11c878f8108d71e6ace6d1
Signed-off-by: Gitanjali Krishna <gitanjal@codeaurora.org>
This commit is contained in:
Gitanjali Krishna 2018-06-05 16:38:14 -07:00
parent 4459f567fa
commit 3cc4f89b3d
5 changed files with 73 additions and 0 deletions
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1
arch/arm/dts/Makefile
View file

@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_IPQ40xx) += ipq40xx-dk01-c1.dtb \
ipq40xx-dk07-c1.dtb \
ipq40xx-dk07-c2.dtb \
ipq40xx-dk07-c3.dtb \
ipq40xx-dk07-c4.dtb \
ipq40xx-dk01-s1.dtb \
ipq40xx-dk06-c1.dtb

69
arch/arm/dts/ipq40xx-dk07-c4.dts Normal file
View file

@ -0,0 +1,69 @@
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk07.dtsi"
/ {
machid = <0x8010306>;
ddr_size = <512>;
config_name = "config@ap.dk07.1-c4";
spi {
status = "ok";
spi_gpio {
gpio1 {
gpio = <12>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <13>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <14>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <15>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};

1
arch/arm/include/asm/mach-types.h
View file

@ -1134,6 +1134,7 @@ extern unsigned int __machine_arch_type;
#define MACH_TYPE_IPQ40XX_AP_DK07_1_C1 0x8010006
#define MACH_TYPE_IPQ40XX_AP_DK07_1_C2 0x8010106
#define MACH_TYPE_IPQ40XX_AP_DK07_1_C3 0x8010206
#define MACH_TYPE_IPQ40XX_AP_DK07_1_C4 0x8010306
#define MACH_TYPE_IPQ40XX_DB_DK01_1_C1 0x1010002
#define MACH_TYPE_IPQ40XX_DB_DK02_1_C1 0x1010003
#define MACH_TYPE_IPQ40XX_TB832 0x1010004

1
board/qca/arm/ipq40xx/ipq40xx.c
View file

@ -222,6 +222,7 @@ int board_eth_init(bd_t *bis)
case MACH_TYPE_IPQ40XX_AP_DK07_1_C1:
case MACH_TYPE_IPQ40XX_AP_DK07_1_C2:
case MACH_TYPE_IPQ40XX_AP_DK07_1_C3:
case MACH_TYPE_IPQ40XX_AP_DK07_1_C4:
/* 8075 out of reset */
mdelay(1);
gpio_set_value(41, 1);

1
drivers/net/ipq40xx/ipq40xx_ess_sw.c
View file

@ -79,6 +79,7 @@ int ipq40xx_ess_sw_init(ipq40xx_edma_board_cfg_t *cfg)
case MACH_TYPE_IPQ40XX_AP_DK07_1_C1:
case MACH_TYPE_IPQ40XX_AP_DK07_1_C2:
case MACH_TYPE_IPQ40XX_AP_DK07_1_C3:
case MACH_TYPE_IPQ40XX_AP_DK07_1_C4:
ipq40xx_ess_sw_wr(S17_P0LOOKUP_CTRL_REG, 0x140000);
ipq40xx_ess_sw_wr(S17_P1LOOKUP_CTRL_REG, 0x140000);