mirror/u-boot-2016
1
0
Fork 0
mirror of https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git synced 2026-03-06 17:30:35 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

mtd: nand: qcom: store the number of spare, ecc and bbm bytes

Browse source 
This patch does minor code reorganization to store spare, ecc and
bbm bytes in nand device structure which will be useful in
subsequent patches.

Change-Id: Id44c53e204a874569968764798c346a609695acf
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
This commit is contained in:
Abhishek Sahu 2017-11-07 14:27:20 +05:30 • committed by Gerrit - the friendly Code Review server
parent e2d3adc527
commit 698a7e98e0
2 changed files with 21 additions and 20 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/arm/include/asm/arch-qca-common/qpic_nand.h
View file

@ -430,6 +430,9 @@ struct qpic_nand_dev {
unsigned cw_size;
unsigned cws_per_page;
unsigned bad_blk_loc;
unsigned ecc_bytes_hw;
unsigned spare_bytes;
unsigned bbm_size;
unsigned dev_cfg;
uint32_t cfg0;
uint32_t cfg1;

38
drivers/mtd/nand/qpic_nand.c
View file

@ -636,35 +636,33 @@ qpic_nand_save_config(struct mtd_info *mtd)
dev->ecc_bch_cfg |= (1 << NAND_DEV0_ECC_MODE_SHIFT);
if (dev->widebus) {
/* spare size bytes in each CW */
dev->cfg0 |= (0 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT);
/* parity bytes in each CW */
dev->ecc_bch_cfg |= (14 <<
NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT);
dev->ecc_bytes_hw = 14;
dev->spare_bytes = 0;
dev->bbm_size = 2;
} else {
/* spare size bytes in each CW */
dev->cfg0 |= (2 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT);
/* parity bytes in each CW */
dev->ecc_bch_cfg |= (13 <<
NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT);
dev->ecc_bytes_hw = 13;
dev->spare_bytes = 2;
dev->bbm_size = 1;
}
} else {
dev->cw_size = NAND_CW_SIZE_4_BIT_ECC;
if (dev->widebus) {
/* spare size bytes in each CW */
dev->cfg0 |= (2 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT);
/* parity bytes in each CW */
dev->ecc_bch_cfg |= (8 <<
NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT);
dev->ecc_bytes_hw = 8;
dev->spare_bytes = 2;
dev->bbm_size = 2;
} else {
/* spare size bytes in each CW */
dev->cfg0 |= (4 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT);
/* parity bytes in each CW */
dev->ecc_bch_cfg |= (7 <<
NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT);
dev->ecc_bytes_hw = 7;
dev->spare_bytes = 4;
dev->bbm_size = 1;
}
}
/* spare size bytes in each CW */
dev->cfg0 |= dev->spare_bytes << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT;
/* parity bytes in each CW */
dev->ecc_bch_cfg |=
dev->ecc_bytes_hw << NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT;
qpic_oob_size = dev->cw_size * dev->cws_per_page - mtd->writesize;
if (mtd->oobsize < qpic_oob_size) {