Commit graph

33913 commits

Author SHA1 Message Date
Markus Stockhausen
adbb9a6423 realtek: dsa: rtl83xx: fix init section mismatch
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Compilation currently spits this message:

WARNING: modpost: vmlinux: section mismatch in reference:
rtl83xx_sw_probe+0x6a4 (section: .text.rtl83xx_sw_probe)
-> rtl83xx_setup_qos (section: .init.text)

That means that we have a "normal" function caller (can be
called during the whole uptime) and a "initialization" function
callee (only available during init.

Fix this and directly fix the unwanted family checks.

Fixes: a91c3ab ("realtek: dsa: avoid use-after-free")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21690
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-25 13:58:48 +01:00
Jonas Jelonek
19e1e508ea
realtek: mdio: add more Aquantia PHY IDs
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Add a PHY ID for Aquantia AQR813 which is an Octa-PHY found in some
Realtek switches.

Add another PHY ID for another revision of AQR113C, also found in some
Realtek switches.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21515
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-25 12:12:16 +01:00
Jonas Jelonek
4fa27cb325
realtek: mdio: apply phy polling config for RTL931x
Apply the PHY polling configuration for RTL931x too, as previously
implemented for RTL930x. This is needed for several PHYs on that
platform to function properly.

Add another flag called 'force_res' to the phy_info struct which is for
RTL931x only. The SDK mentions this as a flag to force polling the
Realtek proprietary PHY status resolution register. Effectively, this
changes the polling to proprietary format instead of standard format,
and sets an enable bit in another private polling register field.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21515
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-25 12:12:15 +01:00
Jonas Jelonek
322041ffeb
realtek: mdio: enhance reading phy id
Reading the PHY ID to assign a PHY config is currently simple. For C45
two MDIO reads of a hardcoded MMD are done to get the standard PHY ID
registers. MMD 31 (MMD_VEND2) is used for that purpose, assuming there
will be a valid PHY ID stored in this MMD in all cases. However, with
Aquantia AQR813 there's at least one example for which this isn't true.
This PHY returns 0 for the PHY ID in MMD_VEND2, instead MMD_VEND1 would
have the correct ID.

Enhance reading the PHY by accessing a common set of MMDs of which most
PHY at least implement one and have a valid PHY ID in. To keep overhead
low, do not scan all MMDs. As soon as a valid PHY ID is found, exit and
use that. This is similar to the kernel logic, jsut reduced to fewer
MMDs.

Also handle possible errors coming from MDIO reads to avoid reading garbage.

While at it, move reading the PHY ID to a separate function to not
pollute the poll fixup retrievel function.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21515
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-25 12:12:15 +01:00
Chukun Pan
cf84e8ee86 rockchip: add HINLINK H66K / H68K support
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Hardware (common):
- RK3568 SoC
- 2/4GB LPDDR4
- 1x HDMI Type A
- 3.5mm jack with mic
- 1x PCIE 2.0 WiFi slot
- 1x USB 3.0, 2x USB 2.0
- 2x 2.5GbE RTL8125B Ethernet
- MicroSD card slot / eMMC 32GB

Additions to HINLINK H68K:
- 2x 1GbE RTL8211F/YT8531 Ethernet

Installation:
  Use dd or balenaEtcher to flash the firmware.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/21270
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 23:46:23 +01:00
Markus Stockhausen
48b4160329 realtek: mdio: drop driver lock
The Realtek mdio driver does not need to track a separate lock.
Rely on the default kernel mdio bus lock instead.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 23:40:24 +01:00
Markus Stockhausen
5c0e415a4b realtek: mdio: use generic bus command function for RTL931x
Refactor RTL931x mdio commands to use the new helper function.
Remove unneeded goto and debug statements.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 23:40:24 +01:00
Markus Stockhausen
4eeac83917 realtek: mdio: use generic bus command function for RTL930x
Refactor RTL930x mdio commands to use the new helper function.
Remove unneeded goto and debug statements.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 23:40:24 +01:00
Markus Stockhausen
a89c72daf5 realtek: mdio: use generic bus command function for RTL839x
Refactor RTL839x mdio commands to use the new helper function.
Remove unneeded goto and debug statements.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 23:40:24 +01:00
Markus Stockhausen
ff17bb7839 realtek: mdio: use generic bus command function for RTL838x
The Realtek mdio bus works similar for all devices with only
minor family specific differences. Basically command issuing
follows a generic style. Write command type and a trigger.
Afterwards wait until the trigger flag goes back to zero (aka
"command complete"). Unify this sequence in a central helper.

RTL838x read/write callers of this helper use a strange style of
error handling by issuing goto statements. Refactor this for better
readability. Additionally remove all debug prints. These are not
needed as the central read/write handlers provide a common logging
mechanism.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 23:40:24 +01:00
Thomas Richard
2530c99981 loongarch64: set PREEMPT_NONE as default preemption model
Loongarch64 currently uses the PREEMPT_VOLUNTARY model, which is not
aligned with OpenWrt's default. Switch to PREEMPT_NONE for consistency with
OpenWrt's default configuration. Preemption model selection is now
available via menuconfig for further customization.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/21413
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 22:54:29 +01:00
Thomas Richard
777fc28040 mediatek: mt7623: set PREEMPT_NONE as default model
Mediatek/mt7623 currently uses the PREEMPT model, which is not aligned with
OpenWrt's default. Switch to PREEMPT_NONE for consistency with OpenWrt's
default configuration. Preemption model selection is now available via
menuconfig for further customization.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/21413
[Added some config options again]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 22:54:16 +01:00
Thomas Richard
e47c21acfc gemini: set PREEMPT_NONE as default preemption model
Gemini currently uses the PREEMPT model, which is not aligned with
OpenWrt's default. Switch to PREEMPT_NONE for consistency with OpenWrt's
default configuration. Preemption model selection is now available via
menuconfig for further customization.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/21413
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 22:52:49 +01:00
Thomas Richard
6924c16745 layerscape: set PREEMPT_NONE as default preemption model
Layerscape currently uses the PREEMPT model, which is not aligned with
OpenWrt's default. Switch to PREEMPT_NONE for consistency with
OpenWrt's default configuration. Preemption model selection is now
available via menuconfig for further customization.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/21413
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 22:52:49 +01:00
Frank Wunderlich
02b2dd3508 mediatek: filogic: add 8GB builds for BPI-R4
Add builds for Bananapi R4 with 8GB RAM.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://github.com/openwrt/openwrt/pull/21437
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 22:10:57 +01:00
John Audia
2228b7048c kernel: bump 6.12 to 6.12.67
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.67

Manually rebased:
  rockchip/patches-6.12/160-01-phy-rockchip-inno-usb2-Simplify-rockchip-usbgrf-handling.patch

Build system: x86/64
Build-tested: flogic/glinet_gl-mt6000
Run-tested: flogic/glinet_gl-mt6000

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/21629
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 21:36:10 +01:00
Maxim Anisimov
46ff60ce02 mediatek: enable wan led for Keenetic KN-(3711/3811)
The indicator is unused by default and not associated
with the wan port. So let’s fix this.

Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 20:59:40 +01:00
Maxim Anisimov
9bcfe7b76f mediatek: simplify nvmem mac for Keenetic KN-(3811/3911)
This is a cosmetic change. There is no need to use mac
address increment/decrement in the dts on these devices,
so this can be simplified.

Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 20:59:40 +01:00
Maxim Anisimov
299105441a mediatek: drop spi cal for Keenetic KN-(3711/3811/3911)
In the original DTS from the device firmware, there are
no entries that enable SPI calibration. Therefore, it
should be disabled.

Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 20:59:40 +01:00
Maxim Anisimov
5c195add76 mediatek: fix label mac for Keenetic KN-(3711/3811/3911)
Keenetic devices always use the WAN port MAC address as
the MAC address printed on the label.

Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 20:59:40 +01:00
Linus Walleij
0b0cd4efe2 gemini: support upgrade on reference designs
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The Gemini reference design-derived devices uses a partition
format which is predictable and we can exploit this to offer
some proper upgrade path.

The kernel for these contains a hack to use this partition
format unaltered by combining the partitions "Kern" and "Ramdisk"
to one image with all of the kernel+ramdisk in memory.

Then the "Application" which is used for the rootfs go into its
own partition.

Standard flash layout:
Kern         2048k |
Ramdisk      6144k | = 9216k
Application  6144k | = 15360k

Following the pattern of the factory image we create three
images named zImage, rd.gz and hddapp.tgz (these filenames
are misleading! They are just required by the old firmware.)
and flash each individually with "mtd" during upgrades.

Since the IB-4220-V has a different layout with a bigger kernel
space we parameterize this so we can handle this too. (More
fixes are needed for that device though.)

A way to upgrade older OpenWrt on these platforms to the latest
and greatest will be to copy the file
target/linux/gemini/base-files/lib/upgrade/platform.sh
to /lib/upgrade/platform.sh
on your running system and then run sysupgrade from the image
produced after this patch.

The script is picky to sanity check the partitions before
commencing upgrade.

This was tested with a full sysupgrade on the iTian SQ201.

Link: https://github.com/openwrt/openwrt/pull/21680
Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-01-24 17:29:17 +01:00
Markus Stockhausen
372f2563f6 realtek: phy: fix RTL8214FC fibre/copper initialization
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A phy is configured in two stages

- phy_probe() for setup of structures
- config_init() for device setup (after reset)

RTL8214FC is a combo phy and the currently active port can be switched
with the SFP helper functions that are triggered during SFP insertion
and removal. In case a fibre SFP is inserted while booting the SFP
trigger is run between the above mentioned stages. During the final
setup in config_init() the phy is reset to the copper port. Thus no
link is available on fibre and the SFP must be reinserted for normal
operation.

For a consistent behaviour the fibre/copper port setup must run before
the SFP probing and not afterwards. Move the setup code from config_init()
into phy_probe().

Fixes: 10ae743 ("realtek: phy: simplify RTL8214FC configuration")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21582
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-24 11:44:10 +01:00
Markus Stockhausen
45fb8f9739 realtek: phy: optimize RTL8214FC register usage during media set
There are some shortcomings in rtl8214fc_media_set()

- It always uses the mdio raw page (4095) of RTL838x for writes.
  That is wrong when the phy is attached to an RTL839x (raw = 8191)
- It uses the internal write only extended page companion (29)
- The extended page content is not preserved

Fix the three issues.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21582
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-24 11:44:10 +01:00
Markus Stockhausen
121f4d90d0 realtek: phy: save RTL8214FC extended page during power set
Changing the fibre/copper power of a RTL8214FC changes the
extended page via register 29. This is the write only companion
of register 30. The register is afterwards overwritten to 0.

Use the proper extended page register 30 and preserve its content
during the operation.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21582
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-24 11:44:09 +01:00
Markus Stockhausen
07bb4f5115 realtek: phy: convert confusing BMCR_PDOWN usage for RTL8214FC
Bit 11 of registers 16, 19, 20, 21 in page 0x266 denotes if a port
of a RTL8214FC is set/favoured to fibre (0) or copper (1). For unknown
reasons the bit was mixed with BMCR_PDOWN. Convert this to a meaningful
define.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21582
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-24 11:44:09 +01:00
Markus Stockhausen
17f12695d0 realtek: mdio: rtl838x: activate combo PHY media detection
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There is a misunderstanding about BIT(7) aka EX_PHY_MAN_24_27 in
SMI_GLB_CTRL register. The SDK sets/clears it at different places and
it is not clear what it is for. Observation shows that it is essential
for a working MAC_LINK_MEDIA_STS register.

A RTL838x device has usally two configurations

- port 24/26 are 2 serdes driven fiber ports
- port 24-27 are 4 PHY driven combo ports

In the combo case the above bit must be set so that a switch between
copper and fiber can be detected. Cleanup the MDIO initialization
and remove the unneeded bit handling in the DSA driver.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21653
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-24 11:04:55 +01:00
George Sapkin
5f889eaacd imagebuilder: fix parsing ABI for apk packages
Fix parsing ABI when package has multiple tags and apk returns them in a
single line.

Fixes: 31cdd13d ("imagebuilder: add ABI suffix to packages when using apk")
Signed-off-by: George Sapkin <george@sapk.in>
Link: https://github.com/openwrt/openwrt/pull/21660
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-24 11:02:18 +01:00
Hauke Mehrtens
a4285d7cc0 lantiq: AVM Fritz 736x: fix PCIe reset GPIO
The vr9.dtsi configures the GPIO 38 as reset GPIO. Also the fon LED is
configured on GPIO 38. This conflicts and makes the probing of the PCIe
controller fail in OpenWrt 25.12.

The AVM GPL source code configured GPIO 21 as PCIe reset.

Fixes: https://github.com/openwrt/openwrt/issues/21562
Link: https://github.com/openwrt/openwrt/pull/21641
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-24 01:40:11 +01:00
Linus Walleij
8dec72061f gemini: Fix up the rootfs device for SQ201
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The rootfs partition is /dev/mtdblock3, fix it up.

Link: https://github.com/openwrt/openwrt/pull/21662
Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-01-23 23:50:19 +01:00
Linus Walleij
92682593d5 gemini: Add DTS fix from upstream kernel
This contains small but important DTS fixes for the
RedBoot partitions.

Link: https://github.com/openwrt/openwrt/pull/21662
Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-01-23 23:49:37 +01:00
George Sapkin
7bb79b9d53 imagebuilder: skip repository file when standalone
Standalone image builder doesn't have a repositories file as all
packages are included, which causes:

ERROR: failed to read repositories: PATH_TO_BUILDER/repositories: No such file or directory

The images are still built, so this is more of an informational error.

Pass related argument to apk only when CONFIG_IB_STANDALONE is not set.

Fixes: a8d17c21 ("imagebuilder: actually support IB from buildbot")
Signed-off-by: George Sapkin <george@sapk.in>
Link: https://github.com/openwrt/openwrt/pull/21658
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-23 22:14:06 +01:00
Robert Marko
19e097e18a microchipsw: update DTS with the latest pending upstream
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Update the DTS to the latest pending upstream version, it looks like this
should get merged soon upstream.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-23 10:55:29 +01:00
Gabriel Roper
088f6e563e d1: Enable LED driver for D1 builds
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This enables the kernel configuration option
to build the SUN50I_A100 driver, which is
the one driver used by the D1 for the RGB
LED controller.

Signed-off-by: Gabriel Roper <lockheedmaniac@gmail.com>
2026-01-23 10:35:36 +01:00
Gabriel Roper
12992dcb7e d1: Add device tree configuration for D1 RGB LED Controller
This adds the device tree patches written by Samuel Holland
to the kernel. The driver was merged into mainline Linux in 6.8,
but the device tree patches were never merged into mainline.

Signed-off-by: Gabriel Roper <lockheedmaniac@gmail.com>
2026-01-23 10:35:36 +01:00
Chukun Pan
8dccd1e44f d1: refresh kernel config
Run 'make kernel_oldconfig' to get an up-to-date config.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
2026-01-23 10:35:36 +01:00
Chukun Pan
1e7950a45d d1: enable overlay support
Add the loop module and mkfs tool to use f2fs/ext4
based overlays. This fixes the following bug:

mount_root: unable to create loop device
mount_root: no usable overlay filesystem found, using tmpfs overlay

Fixes: 99545b4bb1 ("d1: add new target")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
2026-01-23 10:35:36 +01:00
Chukun Pan
81580cc92c d1: enable usbgadget feature
The USB of most d1 devices works in otg or peripheral mode.
Enable this feature to use usbgadget and fix musb errors:

musb-sunxi 4100000.usb: Invalid or missing 'dr_mode' property
musb-sunxi 4100000.usb: probe with driver musb-sunxi failed with error -22

Fixes: 99545b4bb1 ("d1: add new target")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
2026-01-23 10:35:36 +01:00
Rosen Penev
45f3543385 ath79: rb91x_nand: fix some issues in probe
Add devm for ioremap to proper cleanup.

Test gpiod_direction_input for failure.

Remove rb91x_nand_release and fix wrong usage.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21165
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-23 10:33:05 +01:00
Markus Stockhausen
3ddcd5265f realtek: phy: add RTL8218D initialization
The RTL8218D currently relies on proper U-Boot configuration. In
case that is not possible, provide a basic setup sequence that can
bring the PHY "alive". The SDK provides multiple configuration
sequences for two operation modes (XSGMII or QSGMII) and the different
SoC families. Due to limited testing resources only provide a setup
for RTL93xx devices and both modes at the moment.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21551
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-23 10:31:01 +01:00
Shiji Yang
46129bbbf5 mediatek: dts: mt7981: fix spi clocks
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Fix spi1 sel-clk source and add missing assigned-clocks.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-22 00:10:56 +01:00
Shiji Yang
3462789923 mediatek: dts: mt7981: remove internal phy LED pinctrl
This default pinctrl doesn't work at all. We must add pinctrl phandle
to the ethernet-phy node or mac node. This patch removed the internal
phy LED pinctrl group definitions from the SOC dtsi because it is
currently only used by one device. Some incorrect LED pinctrls also
have been removed because these devices do not have hardware phy LED.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-22 00:10:56 +01:00
Shiji Yang
c9cae03d35 mediatek: dts: mt7981: add mediatek,wed-pcie syscon phandle
The PCIe NIC WED offload features depend on it. Also add the missing
"syscon" compatible for the wed_pcie node as it's accessed by
syscon_regmap_lookup_by_phandle().

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-22 00:10:56 +01:00
Shiji Yang
5e3e73c969 mediatek: dts: mt7981: load xhci phy efuse by default
This should improve the stability of the USB 3.0 port[1].

[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.12.y&id=6f2b033cb883f64ad084a75f13634242c7e179a6
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-22 00:10:56 +01:00
Shiji Yang
0d13738ef4 mediatek: dts: mt7981: remove useless nodes
These stuffs were copied from the vendor SDK. There are currently
no drivers compatible with them. The pending upstream patches did
not include them either.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-22 00:10:56 +01:00
Caleb James DeLisle
b4b12a8239 econet: add clock/reset support
This is in preparation for the next update to EcoNet Ethernet driver
which will be using real resets rather than bit-bashing. Patches are
backported up to the current state of clk-next because I intend on
upstreaming these patches soon.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/21545
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-22 00:03:52 +01:00
Tianling Shen
609deedd87 rockchip: fix set default serial_{addr,port} in boot script
On some SoCs like RK3399, U-Boot no longer export the serial
address in $stdout variable, it has been changed to something like
`stdout=serial,vidconsole` since video supported was added. So
detect $soc variable instead, this also makes the script more clear.

Addtional note: rk3566 is reported as rk3568, rk3582 is reported as
rk3588 in $soc.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/21610
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-21 23:56:42 +01:00
Markus Stockhausen
7e39a2d485 realtek: mdio: derive phy smi-bus from parent node
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The dts for RTL93xx devices has duplicate data about the
smi bus of a phy node. The parent node declares the number
of the bus and the realtek,smi-address attribute does the
same.

Remove the bus part from the realtek,smi-address attribute
and lookup the bus from the parent node. While we are here
remove all realtek,smi-address attributes where phy id
matches the bus address. The driver will use that as a
fallback.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-21 23:32:54 +01:00
Markus Stockhausen
b948cc17b4 realtek: dts: convert devices to mdio bus 1-3
Switch the mdio bus topology for devices that have their phys
attached to bus 1-3. This does not have any impact because
the mdio driver was completly redisgned

With this commit the bus id is stored twice. Once in the (new)
bus and in the (old) realtek,smi-address property. E.g.

&mdio_bus1 {
  reg = <1>; <<< bus id
  phy24: ethernet-phy@24 {
    reg = <26>;
    compatible = "ethernet-phy-ieee802.3-c22";
    realtek,smi-address = <1 2>; <<< bus & address id
  };
};

This redundancy will be removed later.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-21 23:32:54 +01:00
Markus Stockhausen
cfe534dc8e realtek: dts: add mdio bus 1-3 to RTL93xx
RTL93xx devices have 4 smi busses (0-3). Add them to the dts.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-21 23:32:54 +01:00
Markus Stockhausen
3b73474f71 realtek: mdio/dsa: refactor mdio bus initialization
The mdio driver currently determines the smi bus and address from the
realtek,smi-address attribute of the phy. To better reflect the
topology and align with upstream, the phys should be relocated below
their associated bus. As an interim solution the following dts notation
is in focus.

mdio_ctrl: mdio-controller {
  mdio_bus0: mdio-bus@0 {
    reg = <0>;
    phy0: ethernet-phy@0 {
      reg = <0>;
      compatible = "ethernet-phy-ieee802.3-c45";
      realtek,smi-address = <8>;
    };

  &mdio_bus1 {
    reg = <1>;
    phy16: ethernet-phy@16 {
      reg = <16>;
      compatible = "ethernet-phy-ieee802.3-c45";
      realtek,smi-address = <2>;
  };
}

With this

- the phy reg property still denotes the port number
- the bus number can be derived from the parent bus node.
- the bus address is taken from realtek,smi-address

Refactor bus initialization so it can handle phy nodes below
multiple bus nodes.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-21 23:32:54 +01:00