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17f12695d0
There is a misunderstanding about BIT(7) aka EX_PHY_MAN_24_27 in SMI_GLB_CTRL register. The SDK sets/clears it at different places and it is not clear what it is for. Observation shows that it is essential for a working MAC_LINK_MEDIA_STS register. A RTL838x device has usally two configurations - port 24/26 are 2 serdes driven fiber ports - port 24-27 are 4 PHY driven combo ports In the combo case the above bit must be set so that a switch between copper and fiber can be detected. Cleanup the MDIO initialization and remove the unneeded bit handling in the DSA driver. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/21653 Signed-off-by: Robert Marko <robimarko@gmail.com> |
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| llvm-bpf | ||
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| Config.in | ||
| Makefile | ||