The u-boot-env partition on the Zyxel P-2812HNU-F1 is 128 KiB but
the actual environment data is only 8 KiB (0x2000 bytes). Without
the env-size property, the u-boot,env nvmem layout driver assumes
env-size equals the full partition size and computes an incorrect
CRC32 over the entire 128 KiB, causing all nvmem cell reads to fail
silently.
Add env-size = <0x2000> so the CRC32 is computed over the correct
8 KiB region, allowing nvmem-cells (such as ethaddr) to be read
properly by the kernel.
Signed-off-by: Burak Aydos <byhexadecimal@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21780
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop legacy sw_xxx() macros for rtl838x devices. While we are here
reorganize the access and aovid masked access where possible. So the
code is easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
As a first step convert the central run command over to regmap.
Additional info: The command masks where changed because
sw_xxx() dont care about the to be set or to be cleared bits
(aka mask). In regmap the mask must always be a superset of the
to be set bits.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
To make use of regmap in the command function adapt its signature
so it has access to the control structure via the bus.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
For regmap conversion the read/write functions need access to the
control structure (aka bus->priv). Add the bus to the parameters list.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
To convert the existing sw_xxx() commands the bus needs a regmap.
This is derived from the parent mfd node like in all other Realtek
drivers.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>
Port 21 definition was missed during addition of LGS328C.
Add it to the dts.
Fixes: 853d73f ("realtek: add support for Linksys LGS328C")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21793
Signed-off-by: Robert Marko <robimarko@gmail.com>
The firmware update file can get big, so instead of extracting
the whole file into the tmp folder potentially running out of space
and make the upgrade fail, stream from tar xvf -O directly to the
mtd write command.
Refactor the checking of partitions and the actual upgrade into
two steps when we are at it.
Link: https://github.com/openwrt/openwrt/pull/21782
Signed-off-by: Linus Walleij <linusw@kernel.org>
Part of the phy patch process breaks functionality on non-Realtek
platforms. Only apply this on Realtek SoCs to fix functionality
everywhere else.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21777
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the original userspace implementation, the WAN and DSL interfaces
used the same MAC. Mirror that here.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21081
Signed-off-by: Robert Marko <robimarko@gmail.com>
This adds the pending upstream patches for platform PWM support for qualcommbe
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/21727
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make sure seq is copied to ramfs during sysupgrade.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21760
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make sure seq is copied to ramfs during sysupgrade.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21760
Signed-off-by: Robert Marko <robimarko@gmail.com>
We don't want kmod-gpio-button-hotplug, we want the more
normal kmod-input-gpio-keys.
Link: https://github.com/openwrt/openwrt/pull/21750
Signed-off-by: Linus Walleij <linusw@kernel.org>
The redboot partition parser gets upset if a partition
doesn't end on an even erase block and marks the partition
read-only.
Fix this by always padding the three firmware items to
128kb.
It is no longer required for the filesystem to be padded
to 6144kb, so we pad this to just 128kb like the kernel
images.
Link: https://github.com/openwrt/openwrt/pull/21750
Signed-off-by: Linus Walleij <linusw@kernel.org>
The Storlink reference designs sometimes fail upgrade because
not the entire partition is used, so the size isn't equal to
the actual flash space available for the partition.
Fix this by calculating the actual partition sizes by measuring
across the partition offsets instead.
Link: https://github.com/openwrt/openwrt/pull/21750
Signed-off-by: Linus Walleij <linusw@kernel.org>
The MT7531 has an incorrect interrupt number described in the DTS.
This commit also adds PHY interrupts. They work the same as on
the MT7988.
Tested on Gemtek W1700k.
Suggested-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/21016
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is some special logic used for certain writes to digital pages for
RTL93xx SerDes, especially when configuring the XSGMII mode. For
RTL930x this applies to SerDes 2 and 3, for RTL93xx to more. In this case,
a dual-read/write to SDS and SDS + 1 is done. While the corresponding
mapping from front to back SDS for RTL931x is currently covered in the
SerDes MDIO driver, it isn't for RTL930x.
To cover these special cases and provide a clear interface on that,
introduce an XSG write SerDes operation. All these dual-read/write cases
can be expressed with such an XSG operation whose internal semantics are
defined for each switchcore family.
This could be done just with plain dual read/write calls however this
isn't a clean approach and may be confusing while comparing our
functionality with the SDK, especially for RTL930x.
In practice, if this isn't handled correctly, only half of the ports of an
XSGMII-connected RTL8218D do work because some required values aren't
applied for the background SerDes 3.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21592
Signed-off-by: Robert Marko <robimarko@gmail.com>
For RTL930x, the SerDes MDIO driver performed a slight SerDes ID mapping
on certain conditions. Instead of keeping this mapping in the MDIO and
try to extend it for further quirks, lets just be a plain MDIO here and
let the user (PCS) deal with these complex quirks.
Drop the mapping from the SerDes MDIO driver and move it to the PCS
driver by leveraging the previously introduced SerDes operations
structure. Define separate ops which incorporate this mapping and use
those instead of the generic implementations.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21592
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a dedicated structure for SerDes operations. This will be used for
several common operations currently called individually in various
places of the code.
Start with defining the basic read and write operations for a SerDes in
this structure. Use generic implementations of these operations for all
variants (RTL83xx, RTL93xx) for now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21592
Signed-off-by: Robert Marko <robimarko@gmail.com>
Several of these devices have GPIO key input but the
kernel module isn't default installed. Select it by default
for all of ixp4xx.
Link: https://github.com/openwrt/openwrt/pull/21749
Signed-off-by: Linus Walleij <linusw@kernel.org>
The ixp4xx is using split squashfs/jffs2 root filesystems on
some devices, so without CONFIG_BLK_DEV_LOOP the device does
not gain a writeable root filesystem with these boot messages:
mount_root: unable to create loop device
mount_root: jffs2 not ready yet, using temporary tmpfs overlay
and then it never gets out of that. Fix this so we get writeable
rootfs again.
Link: https://github.com/openwrt/openwrt/pull/21749
Signed-off-by: Linus Walleij <linusw@kernel.org>
Now that we have a board file, add calibration variant for TP-Link
TL-WA1201 v2 and add ipq-wifi package for it.
Tested-by: Jim McDonald <122668301+jimmyd998@users.noreply.github.com>
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21736
Signed-off-by: Robert Marko <robimarko@gmail.com>
Migration of the eDPU DTS to upstream one broke the eDPU plus model
since the required ethernet aliases are missing and U-Boot then cannot
find the required ethernet nodes.
So, after sending the required fix upstream, lets apply it in OpenWrt
as well.
Fixes: 9852dda410 ("mvebu: move DTS diff into a patch for Methode uDPU")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The gemini is using split squashfs/jffs2 root filesystems on
all devices, so without CONFIG_BLK_DEV_LOOP the device does
not gain a writeable root filesystem with these boot messages:
mount_root: unable to create loop device
mount_root: jffs2 not ready yet, using temporary tmpfs overlay
and then it never gets out of that. Fix this so we get writeable
rootfs again.
Link: https://github.com/openwrt/openwrt/pull/21748
Signed-off-by: Linus Walleij <linusw@kernel.org>
Backport a patch that reduces the quality of HWRNG. HWRNG has lower
entropy than expected. Thanks to this patch, it has a lower priority.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/21722
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds support for Hasivo S1100WP-8GT-SE switch.
Device specification
--------------------
SoC Type: Realtek RTL9303
RAM: Samsung K4B2G1646F-BYMA (256MB DDR3 SDRAM)
Flash: Fudan FM25Q128A (16 MB)
Ethernet: 8x RTL8221B 10/100/1000/2500Mbps PHY
LEDs: 2 LEDs + 4 LEDs/port
1x power green (no control)
1x system green (via RLT9303 GPIO)
3x RJ45 LEDs/port (via HC595 shift registers on LED spi)
1x Green
1x Green/Orange
1x Orange LED/port for PoE status (below RJ45, on STC8)
Button: Reset
USB ports: None
Bootloader: Realtek U-Boot 2011.12.(3.6.6.55087) (Nov 13 2022 - 14:37:31)
Fan: None installed (but board provision for temp/FET/fan)
POE: 2x HS104PTI for 802.3af/at/bt PoE (Not yet working)
Installing OpenWrt
------------------
1. UART RJ45 requires soldering a connector to the empty footprint (RJ1).
(Amphenol RJHSEE380 or similar)
2. Connect to UART 38400@8n1, using Cisco Console Rollover cable (RS232)
3. Set computer IP to 192.168.0.111, and plug in with 2.5Gbps
4. Enter bootloader by pressing esc key during boot
5. Enter password `Hs2021cfgmg`
6. Type `XXXX` to get into U-Boot
7. Type `rtk network on`
8. Use tftp if you have a 2.5G link (other speeds won't work).
If serial, you can increase baudrate in uboot with `setenv baudrate 115200`
9.1. `tftpboot 0x84f00000 <openwrt-initramfs-filename>`
9.2. Otherwise use serial transfer (Y modem): `loady 0x84f00000`
10. `bootm 0x84f00000`
Now you should be in OpenWRT, and can use sysupgrade to install.
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21576
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
XikeStor SKS8300-8T is a 8 ports Multi-Gig switch, based on the RTL9303.
Specifications:
- SoC : Realtek RTL9303
- RAM : DDR3 512 MiB
- Flash : SPI-NOR 32 MiB (Macronix)
- CPU : 800MHz
- Ethernet : 8× 1G/2.5G/5G/10G Base-T RJ45 ports (RTL8261N)
- Keys (GPIO) : 1x
- UART : "Console" port on the front panel
- type : RS-232C
- connector : RJ-45
- settings : 115200 8N1
- Power : 12 VDC, 4A
- Temperature sensor : LM75 or compatible
- Fan controller : SensyLink CTF2302
Flash instruction using initramfs image:
1. Prepare TFTP server & connect to serial port.
2. Connect your computer to one of the RJ45 ports on SKS8300-8T
3. Power on SKS8300-8T and interrupt autoboot with Shift + A.
4. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
5. Set the boot command to enable network on boot.
> setenv bootcmd 'mw.l 0x8401da94 0; rtk network on; boota'
6. Set switch IP and TFTP server IP (optional, adjust to your setup).
> setenv ipaddr <ip>
> setenv serverip <ip>
7. Download initramfs image from TFTP server.
> tftpboot 0x83000000 <image name>
8. Boot with the downloaded image.
> bootm 0x83000000
9. With rambooted OpenWrt, backup the stock firmware if needed.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.
In OpenWrt, it is necessary to execute "rtk network on" to enable full
networking functionality. However, the internal U-Boot initialization
(which shares logic with "rtk network init" initializing MAC only and
configures the fan controller) sets a flag at memory address 0x8401da94.
Once this flag is set, any subsequent calls to "rtk network on" are
blocked. To bypass this, resetting 0x8401da94 to 0 by step 5, ensuring
that the network can be properly initialized later. This specific
address was confirmed in U-Boot 2011.12.(3.6.11.55242) (Jan 06 2025 -
14:39:46) by decompiling the function that references the "rtk_mac_init"
string.
Reverting to stock firmware:
1. Connect to serial port.
2. Power on SKS8300-8T and interrupt autoboot with Shift + A.
3. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
4. Set the boot command to the firmware default.
> setenv bootcmd boota
5. Enable network.
> rtk network on
6. Boot OpenWrt.
> boota
7. Download latest firmware from XikeStor and upload to your device.
8. Write firmware with 'sysupgrade -F'.
9. After reboot, stock firmware should boot automatically.
Co-authored-by: Samy Younsi <kame@duck.com>
Signed-off-by: FUKAYA Toshikuni <toshiq2@neenana.org>
Link: https://github.com/openwrt/openwrt/pull/21511
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some of the code forgot to use the register defines for page
selection. Replace the hard coded values with their define.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21716
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL8214C configuration is currently useless.
- It uses register 29 (write only companion of ext. page register 30)
- "configuration" only reads registers 2/3 and writes a message
- "configuration" is run during probing
Drop the useless coding. As this was the last consumer drop register
29 define too.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21716
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL931X CMU code was only capable of setting up ring PLL. This is
fine so far as most modes use this PLL type. Other modes are not handled
by the code, neither here nor in the SDK. Though, the SDK has the needed
sequence to setup the LC PLL. Using LC PLL seems to be handled somewhere
else.
Include the small sequence from the SDK to have it, though not used yet.
This could be helpful for further development which goes beyond the SDK.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
The implementations for CMU management for RTL930x and RTL931x differ in
their terminology but not that much in their technical aspect. For both
it seems to be the case that two adjacent SerDes share a CMU. This CMU
contains a ring PLL for low speeds (capable of 1G/2.5G) and an LC PLL for
high speeds (capable of 1G/2.5G/10G).
Introduce an enum for the PLL type, used for both RTL93xx variants.
Align the naming of internal variables, especially in the RTL931x
implementation. Rename cmu_type to pll_type because this is much more
accurate. Use 'force_' instead of 'frc_' to make clear what it means.
Also rename the function from 'cmu_type_set' to 'config_cmu' because it
obviously does more than just setting the CMU type but rather configures
the CMU.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the wrong values bit values when setting CMU band which were the
same for both 'enable == true' and 'enable == false'.
While at it, fix some coding issues in the CMU functions:
- drop confusing debug output
- use ternary value instead of if-else
- return proper error
- make variable declaration in reverse christmas tree
- drop unneeded temporary value
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch the CMU setup functions to use the SerDes hardware mode instead
of the PHY interface mode.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
The symbol error reset function misses the default sequence. E.g. kernel
spits the message "rtpcs_930x_sds_sym_err_reset unsupported phy mode" when
working on 2500base-x.
Align the function with the SDK by
- adding QSGMII mode
- adding the "all other modes" switch
- working with "channels" to make clearer what happens
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21718
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Zyxel GS1900-24 B1 is a 24 port switch with two SFP ports, it is
identical to the A1 except for doubling the ram.
Specifications
--------------
* Device: Zyxel GS1900-24 B1
* SoC: Realtek RTL8382M 500 MHz MIPS 4KEc
* Flash: 16 MiB
* RAM: 128 MiB DDR2 SDRAM
* Ethernet: 24x 10/100/1000 Mbps, 2x SFP 100/1000 Mbps
* LEDs:
* 1 PWR LED (green, not configurable)
* 1 SYS LED (green, configurable)
* 24 ethernet port link/activity LEDs (green, SoC controlled)
* 2 SFP status/activity LEDs (green, SoC controlled)
* Buttons:
* 1 "RESET" button on front panel (soft reset)
* 1 button ('SW1') behind right hex grate (hardwired power-off)
* Power: 120-240V AC C13
* UART: Internal populated 10-pin header ('J5') providing RS232;
connected to SoC UART through a SIPEX 3232EC for voltage
level shifting.
* 'J5' RS232 Pinout (dot as pin 1):
2) SoC RXD
3) GND
10) SoC TXD
Serial connection parameters: 115200 8N1.
Installation
------------
OEM upgrade method:
* Log in to OEM management web interface
* Navigate to Maintenance > Firmware > Management
* If "Active Image" has the first option selected, OpenWrt will need to be
flashed to the "Active" partition. If the second option is selected,
OpenWrt will need to be flashed to the "Backup" partition.
* Navigate to Maintenance > Firmware > Upload
* Upload the openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-initramfs-kernel.bin
file by your preferred method to the previously determined partition.
When prompted, select to boot from the newly flashed image, and reboot
the switch.
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-squashfs-sysupgrade.bin
U-Boot TFTP method:
* Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10).
* Set up a TFTP server on your client and make it serve the initramfs
image.
* Connect serial, power up the switch, interrupt U-boot by hitting the
space bar, and enable the network:
> rtk network on
> Since the GS1900-24 B1 is a dual-partition device, you want to keep the
OEM firmware on the backup partition for the time being. OpenWrt can
only be installed in the first partition anyway (hardcoded in the
DTS). To ensure we are set to boot from the first partition, issue the
following commands:
> setsys bootpartition 0
> savesys
* Download the image onto the device and boot from it:
> tftpboot 0x81f00000 192.168.1.10:openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-squashfs-sysupgrade.bin
Co-authored-by: Goetz Goerisch <ggoerisch@gmail.com>
Signed-off-by: Joe Holden <jwh@zorins.us>
Add memory size and adapt supported device.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
As there are actually 2 versions of the GS1900-24 where the only
difference is the amount of ram, use a common dtsi and make the
original A1 model dts include the dtsi and only override the memory size.
Signed-off-by: Joe Holden <jwh@zorins.us>
Move memory size to device dts.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ethernet driver uses an indirection for access to the MAC_PORT_CTRL
register (aka. MAC_L2_PORT_CTRL on RTL93xx). It defines the base address
and adds up the cpu port offset. This is not needed as the driver does
not handle the non-cpu ports. Use direct register access instead and
avoid register confusion by always using the "_L2_" naming.
While we are here:
- Drop the functions and use defines instead
- Add CPU port defines for better readability
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21691
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Align with the other Realtek switch drivers and use "ctrl" instead
of "priv" for the central data structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21701
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The CONFIG_SOFTLOCKUP_DETECTOR_INTR_STORM option shows up when the
OpenWrt option CONFIG_KERNEL_SOFTLOCKUP_DETECTOR is activated.
Link: https://github.com/openwrt/openwrt/pull/21710
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix missing reference to bootconfig.sh that was breaking root partition
swap.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21721
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Setup for DSA QOS on RTL839x accesses unitialized memory. For some
reason the handover of the priv structure was realized via global
intermediate variable switch_priv. During refactoring for adbb9a6
("realtek: dsa: rtl83xx: fix init section mismatch") this was not
noticed. Since then RTL839x devices crash during startup.
Fix this by using standard handover via function parameters.
Fixes: adbb9a6 ("realtek: dsa: rtl83xx: fix init section mismatch")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21703
Signed-off-by: Robert Marko <robimarko@gmail.com>
