Commit graph

67068 commits

Author SHA1 Message Date
Jonas Jelonek
0917569dc2 realtek: eth: remove unused SerDes defines
Remove some unused defines for SerDes in the ethernet driver. They have
been missed before but are completely out of place here now.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21481
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-11 11:13:09 +01:00
Robert Marko
93665d0aa3 linux: crypto: fix dependencies for curve25519 and poly1305
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Currently, kmod-crypto-kpp is only implied for curve25519 and thus it
can get unselected and then building will fail due to missing kpp.ko.

Same issue happens with kmod-crypto-hash for poly1305.

So, lets drop the whole implies logic and make sure to always select
them as dependencies.

Fixes: #21386
Link: https://github.com/openwrt/openwrt/pull/21483
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-11 00:25:06 +01:00
Thomas Perale
dd519f6c05 ppp: update deprecated cpe
The CPE 'samba:ppp' added in OpenWrt commit [1], has been deprecated in
favour of 'point-to-point_protocol_project:point-to-point_protocol'
(see [2]).

[1] c61a239514 add PKG_CPE_ID ids to package and tools
[2] https://nvd.nist.gov/products/cpe/detail/1224B76D-6BB3-4088-9F42-23AC04A764F2

Signed-off-by: Thomas Perale <thomas.perale@mind.be>
Link: https://github.com/openwrt/openwrt/pull/21441
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-11 00:16:11 +01:00
Andreas Böhler
2a55846bf4 realtek: add support for ZyXEL GS1920-24HPv1
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The GS1920-24HPv1 is a switch with 24 copper ports and 4 combo SFP/copper
ports and PoE on the first 24 ports.

Specifications:
---------------
  * SoC: Realtek RTL8292M
  * Flash: 16 MiB SPI flash
  * RAM: 128 MiB
  * Ethernet: 24x 10/100/1000 Mbps
  * Buttons: 1x "Reset" button
  * UART: 1x serial header, standard DCE pinout (Tx = 2, Rx = 3, Gnd = 5);
          9600 baud, 8n1, +- 5.6V logic levels
  * SFP: 4 combo copper/SFP ports
  * PoE: 24x
  * Fans: ADT7468 fan controller

Works:
------
  - (24) RJ-45 ethernet ports
  - Switch functions
  - Buttons
  - LEDs (partial support, the wrong LEDs light up)
  - Manual fan control

Not yet enabled:
----------------
  - PoE (requires patches to realtek-poe to support i2c)
  - Combo ports (link is up, but no data is transferred)

Fans:
-----
After boot, the fans are running in full speed mode. You can interact
with the fan controller at /sys/class/hwmon/

Installation:
-------------

This device uses ZyNOS instead of Linux, this makes installation a bit
more cumbersome. Serial console is required!

1. Set the switch to boot from the first image. This step is crucial,
   it will fail to boot if this is not set properly.

2. Connect to the switch using serial and interrupt the boot process
   to enter debug/recovery mode.

3. Load the OpenWrt initramfs image via XMODEM. You need to obtain an
   unlock code, based on your MAC address, first. See the excellent write
   up at https://www.ixo.de/info/zyxel_uclinux/ for details. Replace
   unlock_code in the commands below by the code obtained.
   After running ATBA5, the terminal needs to be closed and re-opened
   with 115200 baud. This speeds up the file transfer significantly!
   The file length in bytes need to be given instead of file_length below.
   You also need an XMODEM upload utility like "lrzsz-sx -X" to transfer
   the file. Start the XMODEM upload after running the ATUPxxxx command:

     > ATEN1,unlock_code
     > ATBA5
     > ATUP80100000,file_length
     > ATGO80100000

4. Wait for OpenWrt to boot. Once this is done, transfer the loader binary
   and the sysupgrade image to "/tmp" using scp.

5. Install OpenWrt permanently by running the following two commands on
   the switch (over SSH):

    > mtd write /tmp/loader.bin loader
    > mtd write /tmp/sysupgrade.bin firmware

6. Reboot the switch and enjoy OpenWrt.

NB: You do not need to touch the loader binary unless it's recommended.
    The loader is not part of a regular sysupgrade file and will be left
    untouched. The boot loader only checks if the loader is valid to be
    able to boot.

Recovery/ Return to stock:
--------------------------

Just spam the "u" key during (or "z" for 9600 baud) during memory testing
to trigger a recovery XMODEM upload at 115200 baud. A standard OEM upgrade
image works properly.

Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/20439
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-10 22:30:56 +01:00
Andreas Böhler
1c63273d8d realtek: Makefile: add rt-loader-standalone and zynsig recipes
This adds the build recipes for rt-loader-standalone and zynsig to the
Makefile. The recipes are required for the upcoming ZyXEL GS1920 series.

Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/20439
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-10 22:30:56 +01:00
Pawel Dembicki
6150f9ceab mpc85xx: p2020: add support for WatchGuard XTM330 (NC5AE7)
Hardware specifications:
  - CPU: Freescale/NXP P2020, dual-core PowerPC @ 1 GHz
  - RAM: 1 GB DDR3
  - Flash: 2 MB NOR, 512 MB NAND
  - Networking: 7x Gigabit Ethernet ports (via two Marvell 88E6171
    switches,  each attached to a different MAC)
  - USB: 2x USB 2.0 ports (front panel)
  - mini-PCIe slot
  - RTC: Ricoh RS5C372A
  - 4 buttons (via external MCU)
  - 3 LEDs (via external MCU)
  - LCD display (via external MCU)

Installation procedure:

1. Obtain the original MAC address table from the stock bootlog, for
   example:

     setting device eth0 to 00:90:7f:00:00:01
     setting device eth1 to 00:90:7f:00:00:02
     setting device eth2 to 00:90:7f:00:00:03
     setting device eth3 to 00:90:7f:00:00:04
     setting device eth4 to 00:90:7f:00:00:05
     setting device eth5 to 00:90:7f:00:00:06
     setting device eth6 to 00:90:7f:00:00:07

2. Open the case and move jumper JP1 from 2-3 to 1-2 to enter FAILSAFE
   mode.
3. Power on the device and interrupt the boot process to access the U-Boot
   shell.
4. Program the MAC base address into the EEPROM (text after '#' is a
   comment):

     mac ports 3
     mac 2 00:90:7f:00:00:01   # first MAC address from bootlog
     mac save

5. Reset the device and enter the U-Boot console again.
6. Connect a TFTP server to port 6 and boot the initramfs image:

     setenv ipaddr 192.168.1.3
     setenv serverip 192.168.1.2
     setenv loadaddr 1000000
     tftpboot $loadaddr openwrt-mpc85xx-p2020-watchguard_xtm330-initramfs-kernel.bin
     bootm $loadaddr

7. (Optional) Backup all MTD partitions if you want the ability to restore
   stock firmware.
8. Perform a normal sysupgrade from the initramfs environment.
9. Power off the device and move jumper JP1 back to 2-3.
10. The device will now boot OpenWrt.

Known issues:
  - LCD, buttons and LEDs are controlled by an external MCU; the protocol is
    currently unknown.
  - The internal connection between the two Marvell switches is unused by
    OpenWrt.
  - The stock firmware uses an empty U-Boot environment; saving variables
    modifies the environment and prevents a normal boot. FAILSAFE U-Boot
    remains functional.
  - WatchGuard configuration is encrypted; DSA MAC addresses are stored in
    this configuration.
  - Failsafe Ethernet works on port1.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21020
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-10 21:30:58 +01:00
Yanase Yuki
e4b8d3f294 projectsmirrors: switch to HTTPS
apache.mirrors.ovh.net supports HTTPS,
so let's use it.

Signed-off-by: Yanase Yuki <dev@zpc.st>
Link: https://github.com/openwrt/openwrt/pull/21268
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-10 19:52:23 +01:00
Yanase Yuki
b378868a39 projectsmirrors: drop some sites
This commit drop ftp.nara.wide.ad.jp and
www.ring.gr.jp from projectsmirrors.

These mirrors only supports plain HTTP.
Drop mirrors that does no meet modern
security standards.

Signed-off-by: Yanase Yuki <dev@zpc.st>
Link: https://github.com/openwrt/openwrt/pull/21268
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-01-10 19:52:23 +01:00
JINLIANG GU
89d982d723 netifd: dhcp: suppress udhcpc default vendor class if specified in sendopts
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When DHCP Option 60 is specified via sendopts (hex, decimal, or named
formats), udhcpc sends its default "udhcp <version>" string alongside
the custom value, which causes authentication failures with some ISPs.

This fix detects Option 60 in sendopts and automatically passes -V ""
to udhcpc to suppress the default version string while allowing
multiple user-defined vendor classes.

Supported formats:
- Hexadecimal: 0x3c
- Decimal: 60
- Named: vendor

Fixes: #21242
Signed-off-by: JINLIANG GU <ihipop@gmail.com>
https://github.com/openwrt/openwrt/pull/21450
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2026-01-10 13:00:15 +01:00
Goetz Goerisch
93e98b4082 feeds: revert to git.openwrt.org
This reverts the feeds.conf.default to git.openwrt.org

Fixes: 66e6ebbc1e (microchipsw: drop source-only)
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21475
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-09 21:55:00 +01:00
Stijn Tintel
fa9f925951 realtek/rtl839x: Edgecore ECS4100-12PH support
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Add support for the Edgecore ECS4100-12PH, an 8-port 802.3bt PoE Gigabit
Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports.

Hardware:
* SoC: RTL8393M
* RAM: 256MiB
* Flash: 32MiB SPI-NOR
* Ethernet:
  * 8x GbE RJ45 PoE (external RTL8218B)
  * 2x GbE RJ45 / SFP combo (external RTL8214FC)
  * 2x SFP (external RTL8214FC)
* Console: RJ45 RS232 port on front panel
* PoE: Nuvoton M0516 + 2x Broadcom BCM59121 PSE

Installation via bootloader:
* open serial console (baud rate 115200)
* interrupt boot process by pressing any key during boot
* boot the OpenWrt initramfs:
  # rtk network on
  # tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-initramfs-kernel.bin
  # bootm
* copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin
  to /tmp and use sysupgrade to install it:
  # sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin

Even though U-Boot claims the switch is based on the RTL8392M SoC, my
device is based on the RTL8393M SoC. I have confirmed this by removing
the heatsink, and the Linux kernel agrees with this. Therefore the DTS
has the rtl8393_ prefix.

Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 21:03:41 +02:00
Markus Stockhausen
7b351062d2 realtek: eth: move init_mac() into configuration structure
Avoid family checks where possible. Now that the init_mac()
functions are in perfect shape include them into the
configuration structure. While we are here rename them
to the new driver prefix.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21391
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 21:03:04 +02:00
Markus Stockhausen
320e6f3188 realtek: eth: add init_mac() for RTL930x
This function does nothing at the moment. Simply add it for
completeness.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21391
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 21:03:04 +02:00
Markus Stockhausen
f8ec6a3b5f realtek: eth: reorder init_mac() functions
Move the functions close to each other and sort them.
No functional changes here.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21391
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 21:03:04 +02:00
Markus Stockhausen
7fb393fa7d realtek: eth: simplify rtl8380_init_mac()
This function is now only called on RTL838x devices. Remove all
obsolete family checks.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21391
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 21:03:04 +02:00
Markus Stockhausen
28c7524e78 realtek: eth: harmonize mac (aka chip) init
The ethernet driver must initialize the chip for proper operation.
Currently there exist functions for RTL838x, RTL839x and RTL931x.
All of them are called differently. Combine them in a central call
location.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21391
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 21:03:04 +02:00
Markus Stockhausen
985f30d576 realtek: dts: RTL93xx whitespace cleanup
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Replace spaces with tabs. No functional changes.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21474
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 20:39:50 +02:00
Jonas Jelonek
a2e49c4d72 realtek: replace remove_new with remove
Replace remove_new callback in struct platform_driver with remove. This
was just meant for a transition period. remove_new is dropped with 6.13.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21430
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 20:37:15 +02:00
Robert Marko
66e6ebbc1e microchipsw: drop source-only
Now that there is a consumer board available, lets drop source-only so that
buildbots provide official images.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-09 18:53:32 +01:00
Robert Marko
29b3d929a6
microchipsw: lan969x: add Novarq Tactical 1000
Novarq Tactical 1000 is a LAN9696 based switch.

Specifications:
* CPU: Microchip LAN9696 switch SoC
* DRAM: 2GB DDR4
* Storage:
	* 32MB QSPI NOR
	* 16GB eMMC
* Networking:
	* 24 x 10/100/1000 RJ45 via LAN8804 Quad PHY-s over QSGMII
	* 4 x 100/1000/2500/5000/10000 SFP+ ports
	* 1 x 10/100/1000 management RJ45 via LAN8840 PHY over RGMII (U-Boot too)
* USB: 1 x USB2.0 Type-A
* Management via USB-C (MCP2200):
	* UART @ 115200 baud (Default), 921600 possible
	* GPIO-s for bootstrap and reset
* LED-s:
	* 2 per networking port (Green and Yellow)
	* Green status LED
* Soft reset GPIO
* Power: 12V DC barrel jack
* External PoE:
	* Option for PoE add-on
* Temperature Sensors:
	* TMP1075 onboard
	* CPU temperature
* Microchip MCP79402 RTC with battery back-up
* Microchip ATECC608C secure peripheral
* CPU heatsink with PWM fan
* Onboard header for case fan

Installation instructions:

1. Connect to UART via the USB-C port
2. Connect the management port
3. Boot and interrupt U-Boot
4. TFTP the OpenWrt initramfs image and boot it
5. SCP the OpenWrt eMMC GPT image to a running OpenWrt initramfs to /tmp
openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz

And decompress it via:
gzip -d /tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz

6. Wipe eMMC with:
dd if=/dev/zero of=/dev/mmcblk0 bs=1M

7. Flash OpenWrt eMMC image with:
dd if=/tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img
of=/dev/mmcblk0

After a restart OpenWrt will boot, and then regular sysupgrade can be used
for upgrades.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-09 18:50:23 +01:00
Robert Marko
7b7a559976
microchipsw: use upstreamed patches
Replace some of the pending patches with the upstreamed versions and mark
them accordingly.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-09 18:50:23 +01:00
Robert Marko
6e0379deb9
boot: arm-trusted-firmware-microchipsw: update to latest
Update microchipsw TF-A to the latest bugfix release that fixes
SHA checksum validation if large files are uploaded via the monitor mode.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-09 18:50:23 +01:00
Robert Marko
6944f1c6a0
microchipsw: use latest DTS
Use the latest v3 that is sent upstream, it now uses a DTS header for clock
indices.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-01-09 18:50:23 +01:00
Jonas Jelonek
de9faf9e75 realtek: mdio: drop SerDes access functionality
The SerDes access functionality in the mdio-realtek-otto drivers was
meant to be temporary, at least from a certain point on. The user was
all the SerDes configuration that lived in the PHY and DSA drivers.

Now that SerDes configuration has moved completely to the PCS driver,
there is no user of this code anymore. Instead, the PCS driver uses a
separate driver 'mdio-realtek-otto-serdes' to access the SerDes. Thus,
drop all that unused functionality from the "normal" mdio driver.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21439
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 19:40:46 +02:00
Pawel Dembicki
ffda7e6748 qoriq: kernel: refresh config
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Done by 'make kernel_oldconfig'.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/10941
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 18:45:02 +02:00
Pawel Dembicki
0a2b3b66db qoriq: add support for NXP T4240RDB board
Hardware specs:
  - NXP T4240, 12C/24T @ 1.67 GHz
  - 3 × 2 GB DDR3 SO-DIMM
  - 128 MB NOR flash
  - 2 GB SLC NAND
  - SD card interface
  - PCIe: x4 and x8
  - SATA 3 Gbps
  - 8 × 1 GbE
  - 4 × 10 GbE SFP
  - RTC

This commit adds the sysupgrade and factory images for T4240RDB board in
both variants:
  - nor: for booting and read whole system from NOR memory
  - sdboot: for booting and read whole system from SD card

SD Card images install:

  - Burn image to sdcard. E.g:
      gunzip -c gunzip -c openwrt-qoriq-generic-fsl_T4240RDB-squashfs-sdcard.img.gz | \
      sudo dd of=/dev/mmcblk0 conv=fsync,notrunc status=progress bs=4M && sync
  - Download lastest Cortina PHY firmware from NXP github [1], if you accept their
    EULA [2].
  - Install Cortina PHY on image, E.g:
      dd if=cs4315-cs4340-PHY-ucode.txt of=/dev/mmcblk0 bs=1 seek=2M
  - Insert SD-Card to SD slot
  - Switch SW3.4 to OFF
  - Configre mac addresses from sticker in u-boot. E.g:
      setenv ethaddr 00:10:f3:3a:a8:66
      setenv eth1addr 00:10:f3:3a:a8:67
      setenv eth2addr 00:10:f3:3a:a8:68
      setenv eth3addr 00:10:f3:3a:a8:69
      setenv eth4addr 00:10:f3:3a:a8:6a
      setenv eth5addr 00:10:f3:3a:a8:6b
      setenv eth6addr 00:10:f3:3a:a8:6c
      setenv eth7addr 00:10:f3:3a:a8:6d
      setenv eth8addr 00:10:f3:3a:a8:6e
      setenv eth9addr 00:10:f3:3a:a8:6f
      setenv eth10addr 00:10:f3:3a:a8:70
      setenv eth11addr 00:10:f3:3a:a8:71
      saveenv
  - reset and boot

NOR images install:

  - download and extract factory image on tftp server root
  - boot device and stop in u-boot (from nor or sd card u-boot)
  - configure server and ip address. E.g:
      setenv ipaddr 192.168.1.2
      setenv serverip 192.168.1.1
  - Download image and run flashing:
      tftpboot $loadaddr openwrt-qoriq-generic-fsl_T4240RDB-squashfs-factory-nor.bin
      protect off all
      erase $fwaddr +$filesize
      cp.b $loadaddr $fwaddr $filesize
  - Switch SW3.4 to ON
  - Switch SW3.1-3 to OFF
  - reboot
  - Do postprocessing (see bellow)

NOR images post processing:

  - Configre mac addresses from sticker in u-boot. E.g:
      setenv ethaddr 00:10:f3:3a:a8:66
      setenv eth1addr 00:10:f3:3a:a8:67
      setenv eth2addr 00:10:f3:3a:a8:68
      setenv eth3addr 00:10:f3:3a:a8:69
      setenv eth4addr 00:10:f3:3a:a8:6a
      setenv eth5addr 00:10:f3:3a:a8:6b
      setenv eth6addr 00:10:f3:3a:a8:6c
      setenv eth7addr 00:10:f3:3a:a8:6d
      setenv eth8addr 00:10:f3:3a:a8:6e
      setenv eth9addr 00:10:f3:3a:a8:6f
      setenv eth10addr 00:10:f3:3a:a8:70
      setenv eth11addr 00:10:f3:3a:a8:71
      saveenv
  - boot
  - Download and refresh RCW stored in eeprom:
      tr '\0' '\377' < /dev/zero | dd bs=256 of=/sys/bus/i2c/devices/0-0050/eeprom
      cat /tmp/openwrt-qoriq-generic-fsl_T4240RDB-squashfs-rcw.bin > /sys/bus/i2c/devices/0-0050/eeprom
  - Download lastest Cortina PHY firmware from NXP github [1], if you accept their
    EULA [2].
  - Install Cortina PHY on image, E.g:
      mtd write cs4315-cs4340-PHY-ucode.txt /dev/mtd4
  - reset and boot

[1] https://raw.githubusercontent.com/nxp-qoriq/qoriq-firmware-cortina/refs/tags/lf-6.12.34-2.1.0/cs4315-cs4340-PHY-ucode.txt
[2] https://github.com/nxp-qoriq/qoriq-firmware-cortina/blob/lf-6.12.34-2.1.0/EULA.txt

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/10941
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 18:45:02 +02:00
Pawel Dembicki
c5d3d5fe28 package: u-boot: initial support for qoriq arch
This package adds initial u-boot support for qoriq target.

U-boot for qoriq devices must be compiled with 32-bit compiler and
linked with 32-bit linker. It's part of mpc 85xx target. But qoriq
target is 64-bit. As workaround, mpc85xx binary toolchain is downloaded
only for this u-boot.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/10941
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 18:45:02 +02:00
Pawel Dembicki
5ed0f5a6dd kernel: move patch from mpc85xx to pending
The patch "Revert "powerpc: dts: mpc85xx: remove "simple-bus" compatible
from ifc node" has been sent upstream [0].

It is also required for qoriq target and in this commit it is moved to
the generic/pending folder.

[0] https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20251105205524.17362-1-rosenp@gmail.com/

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/10941
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 18:45:02 +02:00
Daniel Golle
e5812c7a8c kernel: net: phy: mxl-gpy: replace downstream SGMII AN hack
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Replace downstream hack disabling SGMII in-band AN on the MediaTek platform
with pending upstream patch announcing in-band AN capabilities and implementing
configuring in-band AN in the PHY driver.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-01-09 16:09:56 +00:00
John Audia
92ff3dfd84 x86: switch from CONFIG_HZ_PERIODIC to CONFIG_NO_HZ_IDLE
Running with CONFIG_HZ_PERIODIC=y keeps the scheduler tick running
continuously, which produces higher jitter and lower power efficiency.
In contrast, CONFIG_NO_HZ_IDLE=y (the upstream default) stops the tick
only when the CPU is idle, giving lower idle power and normal runtime
jitter.

An Intel N150-based router/firewall was tested using two kernel builds:
one with CONFIG_HZ_PERIODIC=y, and one with CONFIG_NO_HZ_IDLE=y. Power
consumption was measured while the system was essentially idle (no
meaningful traffic). The CONFIG_NO_HZ_IDLE=y build consistently used
less power.

Details: The two power-measurement methods were:

 1. PkgWatt from turbostat (software)
 2. Wall-power measurement using a Kill-A-Watt (hardware)

The test began by zeroing the Kill-A-Watt and simultaneously running:
turbostat --quiet --Summary --interval 10 --show Busy%,PkgWatt

The test duration was defined by the time required for the Kill-A-Watt
to accumulate 0.005 kWh, after which the average wattage was calculated.

Results:
+----------------------+-----------------+----------------+-----------+
|  Metric              |   HZ_PERIODIC   |   NO_HZ_IDLE   | Delta %   |
+----------------------+-----------------+----------------+-----------+
|  PkgWatt             |  3.59 ± 0.38    |  3.38 ± 0.34   |  -5.9 %   |
+----------------------+-----------------+----------------+-----------+
| Avg wattage at wall  |      12.47      |     12.00      |  -3.77 %  |
+----------------------+-----------------+----------------+-----------+

The mean PkgWatt difference is 210 mW (5.9%) in favor of
CONFIG_NO_HZ_IDLE=y, with a t-statistic of ~3.17 and p ≈ 0.002.

Wall-power measurements show a 470 mW (3.77%) reduction under
CONFIG_NO_HZ_IDLE=y.

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/21470
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-09 16:35:34 +01:00
Markus Stockhausen
1137aaa1c9 realtek: phy: keep register state during RTL8214FC fibre check
Reading the fibre status of a RTL8214FC needs access to the
page register (31) and the extended page register (30).

The current implementation has two issues.

- The extended page register is not restored after changes
- Instead of register 30 its write-only sibling 29 is used.

This has the following side effect:

During regular polling kernel calls rtl8214fc_read_status
and determines the media status via __rtl8214fc_media_is_fibre.
Writing to register 29 a copy of that value is handed over
to register 30. This makes use of mdio tools for the first
port of the RTL8214FC hard. Register 30 is overwritten with
zero every second.

Change access from register 29 to register 30 and adapt
the sequence to restore register 30 contents at the end.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21393
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 17:20:35 +02:00
Chukun Pan
b5195cd473 mediatek: fix 2.5G PHY LED polarity for MT7987
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The patch that adds MT7987 support to the mtk-2p5ge
driver does the following:

case MTK_2P5GPHY_ID_MT7987:
	phy_clear_bits_mmd MTK_PHY_LED_ON_POLARITY
case MTK_2P5GPHY_ID_MT7988:
	phy_set_bits_mmd.. MTK_PHY_LED_ON_POLARITY

phy_set_bits_mmd... MTK_PHY_LED_ON_POLARITY | xxx

This clearly resulted in the LED polarity of the 2.5G PHY
on the MT7987 being reversed. Remove redundant MMD operations
to fix the 2.5G PHY LED error on Bananapi BPi-R4 Lite.

Fixes: d62fc50f ("mediatek: import patches from SDK to support MT7987 Ethernet")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
2026-01-09 12:59:54 +00:00
Chukun Pan
0827720e04 uboot-mediatek: fix LED on Bananapi BPi-R4 Lite
Create a common dtsi for Bananapi BPi-R4 Lite and add missing
gpio-leds. This reduced code and fixed the following LED bug:

LED 'green:status' not found (err=-19)

Fixes: 3a71dd58 ("uboot-mediatek: add support for the BananaPi BPi-R4 Lite")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
2026-01-09 12:59:54 +00:00
Daniel Golle
2a7d374dcd kernel: net: phy: realtek: replace patches with upstream backports
Replace downstream patches with backports of commits accepted upstream.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-01-09 12:55:02 +00:00
Shiji Yang
d93429888c tools/squashfs4: fix rare data corruption issue
There is a chance that the squashfs4 tool may create a broken image
under certain conditions. Backport the fix from upstream to address
this issue.

Report: https://forum.openwrt.org/t/bug-squashfs4-tools-4-7-4-create-corrupted-image/244894
Fixes: 64432358e0 ("tools/squashfs4: update to 4.7.3")
Reported-by: Oleg S <remittor@gmail.com>
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21458
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-09 13:50:38 +01:00
Jonas Jelonek
a9254a593b realtek: dsa,phy: rtl839x: remove SerDes PHY leftovers
Drop several leftovers of SerDes configuration from PHY and DSA drivers.
Both drivers can be seen as free from any SoC-side SerDes stuff.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 14:32:53 +02:00
Jonas Jelonek
9c0dfa339f realtek: pcs: rtl839x: setup SerDes in PCS driver
Add the SerDes setup hooks in the PCS driver for RTL839x so that
pcs_config actually triggers configuration. Adjust the DTS of all
devices accordingly by adding pcs-handles and dropping phy-handles.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 14:32:52 +02:00
Jonas Jelonek
6e2c676076 realtek: pcs: rtl839x: add initialization patch sequence
Add a patch sequence needed to properly initialize 10G SerDes. This is
taken from the SDK mostly as-is ([1]).

Exit early from SerDes reset for now because it seems to cause some
issues on lower 5G SerDes.

[1] 30e7d6c8c2/sources/rtk-dms1250/src/dal/cypress/dal_cypress_construct.c (L215)

Co-authored-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 14:32:52 +02:00
Jonas Jelonek
afec14aee1 realtek: pcs: rtl839x: add SerDes setup functionality
Add basic SerDes setup functionality which determines and sets the
hardware mode of a SerDes, and does a SerDes reset. This is restricted
to the 10G SerDes only as the 5G SerDes are setup properly by default.
Further initialization will be needed for the modes to function properly

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 14:32:52 +02:00
Jonas Jelonek
7de5ba2e98 realtek: pcs: rtl839x: refactor SerDes reset sequence
Refactor the previously added SerDes reset sequence. Use the SerDes
MDIO interface instead of plain writes into the switchcore's register
space. Moreover, simplify the sequence because the SDK version is
unnecessarily complex.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 14:32:52 +02:00
Jonas Jelonek
82d0ae3134 realtek: pcs: rtl893x: add SerDes reset sequence
Add SerDes reset sequence mostly as-is from the SDK (except for
adjusting the register write calls to work with regmap).

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
2026-01-09 14:32:52 +02:00
George Moussalem
e1a9636959 qualcommax: ipq50xx: Correct USB DWC3 wrapper interrupts
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Interrupts for DWC3 node were completely mixed up - SPI interrupt 62 is
not listed in reference manual at all.  It was also causing dtbs_check
warnings:

  ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names:0: 'pwr_event' was expected
  ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names: ['hs_phy_irq'] is too short

Warning itself was introduced by commit 53c6d854be4e ("dt-bindings: usb:
dwc3: Clean up hs_phy_irq in binding"), but this was trying to bring
sanity to the interrupts overall, although did a mistake for IPQ5018.
IPQ5018 does not have QUSB2 PHY and its interrupts should rather match
ones used in IPQ5332.

Correct it by using interrupts matching the bindings and reference
manual.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21454
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-08 18:38:51 +01:00
Robert Marko
0ff1553bd7 ipq-wifi: rename BDF for EAP623-Outdoor HD v1
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BDF for EAP623-Outdoor HD v1 was renamed in the repo, but ipq-wifi
was not updated to reflect that, so do it now to fix broken wifi.

Fixes: #21432
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-08 11:18:23 +01:00
George Moussalem
d6ab889e45 qualcommax: ipq50xx: correct assigned cmn pll clock rate
In IPQ5018, the reference clock to the CMN PLL block from the on-board
Wi-Fi has its divider set to 2. This divider wasn't taken into
consideration when calculating the CMN PLL clock rate which meant the
resulting clock rate was doubled.

With the reference clock divider being accounted for in the driver,
correct the assigned clock rate to 4.8GHz.

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21453
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-08 10:41:36 +01:00
George Moussalem
fdce6f99be qualcommax: ipq50xx: enable ipq-cmn-pll driver compilation
Add missing dt-bindings/include files needed for compilation of driver.
Enable compilation of the CMN PLL driver by adding the symbols to
Kconfig and Makefile.

Fixes: 468975a985 ("qualcommax: ipq50xx: backport upstreamed patches for adding ipq5018 CMN PLL support")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21453
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-08 10:41:35 +01:00
Robert Senderek
f948f71300 qualcommax: ipq50xx: Add support for Zyxel SCR50AXE
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This is tri-band WiFi6E capable router. Also Zyxel Nebula managed so no real local GUI. To open device 4 screws must be located uder the label.
Four latches are on front and two on each side. Better start from ethernet port side where 3 small latches are easy to handle.
FCC shows It's identical to WSQ65 sold as Zyxel Multy M6E but that's nowhare to be found yet. WSQ65 is not covered by this PR

Speficiations:
* SoC: Qualcomm IPQ5018
* RAM: 1GB DDR3
* Flash: Winbond W25N02KWZEIR 256MB
* UART: PCB "J3"  is located left from front LED strip
              (VCC/TX/RX/     /GND)   3.3V 115200n8
* Wi-Fi1: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
* Wi-Fi2: QCN6102 (2x2:2 5 Ghz 802.11an/ac/ax)
* Wi-Fi3: QCN6122 (2x2:2 6 Ghz 802.11an/ac/ax)
* Ethernet: QCA8337 4xLAN 1Gbit / 1xWAN 1Gbit
* Buttons: WPS , Reset
* LEDs: 13 in total
   RGB power, RGB wan, RGB status (cloud), RGB wifi, Green wps
* FCCID: I8803891

*Flash Instructions starts with getting root:
connect uart to J3 connector next to the front LEDs
go to failsafe when this shows up in log:
"Press the [f] key and hit [enter] to enter failsafe mode"
execute:
mount_root
passwd -d root
reboot

logon as root:
look for 'Please press Enter to activate this console.'
login is root password is empty
execute:
fw_setenv DebugFlag=0x1
fw_setenv bootdelay=0x2
passwd -d root
backup ubi partition "rootfs" into safe space
reboot

*OpenWrt installation
stop uboot and execute:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.10
tftpboot *-factory.ubi
flash rootfs
reset

or:
tftpboot *-initramfs-uImage.itb
bootm
use sysupgrade as usual

*restore OEM from backup
stop uboot and execute:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.10
tftpboot *-initramfs-uImage.itb
bootm
transfer rootfs.bin backup and execute:
ubiformat /dev/mtd16 -y -f /tmp/rootfs.bin

Signed-off-by: Robert Senderek <robert.senderek@10g.pl>
Link: https://github.com/openwrt/openwrt/pull/21042
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-07 11:05:20 +01:00
Robert Marko
95a3dc83f1 ipq-wifi: update to Git HEAD (2026-01-07)
11715a4fe783 ipq5018: add SCR50AXE BDF's

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-07 11:04:20 +01:00
Jonas Jelonek
b94c3ba0ff realtek: pcs: rtl931x: improve port media handling
The port media handling introduced before was to some extent just taken
over from the SDK. As a second step, improve that code now. Some code
can be deduplicated, a few statements removed and improved in general.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21385
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-07 11:01:11 +01:00
Jonas Jelonek
7971386514 realtek: pcs: rtl931x: add port media handling
SFP modules still do not work that well across different devices. One
missing piece seems to be the bunch of magic values and bits set by the
SDK depending on which media is used on a port.

Take over code from the SDK for port media handling [1]. This applies
different sequences depending on whether it's 10G fiber, 1G fiber or DAC
cables to make it work best for each variant. Place the call to that
code below the configuration of a SerDes mode but before actually
activating that mode and powering on the SerDes. The SDK and our code
for RTL930x do that similarly.

Though we do not have any notion of media in pcs_config right now, do
similar to some SDK versions and set an appropriate media type for fiber
modes and SGMII (otherwise it doesn't work).

[1] 51c3390e0e/sources/rtk-dms1250/src/hal/phy/phy_rtl9310.c (L2302)

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21385
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-07 11:01:11 +01:00
Jonas Jelonek
b4bd85d504 realtek: pcs: add enum for port media
The Realtek SDK includes a lot of code around specific port media,
usually having quite some differences between 10G fiber, 1G fiber and
DAC cables. For each type, several magic values are set which in the end
usually make different kinds of links work optimal.

While there is currently no way to get that media information from the
kernel, add some fields as an enum to have a notion of different media
kinds. In additional steps, code for the subtargets can be taken over
from the SDK to handle different media.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21385
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-01-07 11:01:11 +01:00