This change adds usxgmii support in UNIPHY0.
Earlier it was supported up to PSGMII with 4 ports.
With these changes,
UNIPHY0 supports either of the 2 modes mentioned below.
1. PSGMII with 4 ports
2. USXGMII with 1 port
Change-Id: Ic4ca62e3ef74d275cda92d86b459d204ee4325ed
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
Same as AP.AL02-C4 RDP, with support for 10G PHY or 10G fiber in UNIPHY0
Change-Id: Ic3935a2cdc0033ed4c7478ae14abd3cf61aef797
Signed-off-by: Hariharan K <quic_harihk@quicinc.com>
devsoc-01.6 and devsoc-01.7 RDPs are same as devsoc-01.4 and devsoc-01.1
respectively with 10GE SFP module instead of 2.5GE SFP module.
Change-Id: Ic65bab9126a34cb73dd51d5ce6a85e1cf29a1215
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Enable pci1 dual lane instead of pci0 single lane
Waikiki 5G module of RDP444 will support 4X4 320M,
so this module needs to be plugged into 2L PCIe.
Change-Id: Ic6a2e77203c576759c3344d006bf6e2e1ec903ec
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
removing the redundant initialization to reduce the size of uboot
Change-Id: I4a129bfc1bad4e402a66a1b1051d1f432a581a6e
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This RDP is based on AL02-C4.
The extra feature is QCN90xx on PCIE0
Change-Id: Ic153279dbe18daf9f602bf44f0bf7539f43ba5f8
Signed-off-by: Saahil Tomar <quic_saahtoma@quicinc.com>
AL02-C10 is based on AL02-C8.
C8 enables QCA8084 PHY mode, C10 is for Switch mode
Change-Id: Idbd154c66437357b5c2dbd636031af564c121cdf
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
These changes update the machine id and
config name for emulation FBC bring up
Change-Id: I45bf5cafcb14025841fda2b00e8f695d810b16d3
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This patch adds support for qca8084 phy based ports
in AL02-c8.
AL02-c8 has 4x2.5 + 2x10G.
Change-Id: Ibcad3d388cd6242158944d16c1b6cd3a08ba12aa
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
In AL03, we have qca8084 support instead of
qca807X and this patch adds support for the
same.
Note that there are only 5 ethernet ports in
AL03.
4x2.5G -> qca8084 port
1x10G -> Aquantia port
Change-Id: I824169cb972dd0fbd28c7d8648df3691ca93432f
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
The PCIE node is disabled by default in
the emulation platform
Change-Id: I51041186a57d08b58c1f7c85dd1a90fbeb24aac9
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
use machid 0xF040000 for devsoc emulation support
Change-Id: Id7487880570d8ef8dfa66cb6bda24798fcf339e2
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This changes add support for uboot base files.
Change-Id: I5f4b937dec30a27ec6acce6ceada7fbed5d5a41d
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
AL02-C8 is based on AL02-C4. Instead of QCA8075, QCA8084 is used
for Ethernet.
Change-Id: I70e3560461c1a547c40f5b9b839cc94ef2a39520
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
AP.AL02-C7 is similar to AP.AL02-C4 with emmc boot
Features: WK 2G + WK5G + WK 6G
AP.AL02-C8 is similar to AP.AL02-C6 with emmc boot
Features: Internal 2G +WK 5G + WK 6G
Change-Id: I31d1f65b071dfddc4eee393d292add58d3ddeadc
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This patch updates the default uniphy mode to SGMII
for the qca808x ports. If suppose, the phy is capable
of supporting 2.5G, then it will reconfigure the
uniphy mode to SGMII_PLUS at that time based on the
link speed detected.
Change-Id: I56692b19536e71cbcf3a4c31d32ecb29866c5fdc
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
1. Modified ipq5018-mp02.1.dts and added NAND alias and description
Change-Id: I6043168712b2b8e54780fe44ca2e00d29f90374a
Signed-off-by: Ignatius Michael (Jihan) Jihan <quic_mignatiu@quicinc.com>
Added read & write bam pipe entires in all the ipq specific dtsi.
Also, updated the spi bam code with generic code changes to enable
the multiple spi support on all ipq chipsets.
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Ram Kumar D <ramd@codeaurora.org>
Change-Id: Ibcdb9d2a9ff7a25f3d296ecdb1aca403511e07d7
The main differece on AL02-C4 are,
PCIE1: 2G WKK
PCIE2: 6G WKK
PCIE3: 5G WKK
Other features are same as AL02-C1.
Change-Id: Ie13154dacf247c99e15f1da775238012075740ee
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
The main differece on AL02-C3 are,
PCIE0: 1x5G
PCIE2: 1x6G
PCIE3: SDX
Other features are same as AL02-C2
Change-Id: If40e554baf16af1654bef3314f017f93d2babfbb
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Only i2c aliases will be populated as needed in respective
RDP DTS. All i2c nodes will be added in common SOC DTS.
Change-Id: I540425c63339f45990231dca84cab6e66af009fb
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Only 2 PCIE's must be enabled by default in AL02.
Change-Id: I6ef06daca92e83df065bb4ca80d77e79b13834e5
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This change allign pci id with design.
This changes remove the manual id variable and use
alias id number instead.
Change-Id: I7ba481ee6e05b58a8481ccd89c6d40c4b3928e76
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
