Reset command must be the first command issued to all
targets after the NAND flash device is powered on.
Change-Id: I617dc5b0ad8d72705dcf20f1cb554134b166e533
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
The UBI layer generates the following data aborts if any of the
NAND block contains bit flips
ubi0: attaching mtd2
ubi0: fixable bit-flip detected at PEB 149
ubi0: scanning is finished
ubi0: fixable bit-flip detected at PEB 149
data abort
pc : [<4a934cc8>] lr : [<4a933aec>]
reloc pc : [<4a934cc8>] lr : [<4a933aec>]
sp : 4a77f2e0 ip : 00000095 fp : 00000075
r10: 000001b7 r9 : 4a77fea0 r8 : 00000001
r7 : 0001f000 r6 : 0001f000 r5 : 4a785e40 r4 : 4a7c4180
r3 : 00000000 r2 : 00000075 r1 : 4a7860b8 r0 : 4a7c49c0
Flags: nzcv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
UBI layer will move the data from original block to some other
block in case of bit flips in the function ubi_eba_copy_leb. This
function uses volume EBA table vol->eba_tbl. The current UBI code
calls ubi_wl_init followed by ubi_eba_init but the ubi_eba_init
only initializes the volume EBA table. In case of bit failure,
the ubi_wl_init calls function __schedule_ubi_work which will
call ubi_eba_copy_leb and triggers data abort.
ubi_attach() {
ubi_wl_init -> __schedule_ubi_work -> ubi_eba_copy_leb
ubi_eba_init
}
The UBI code has been written for Linux kernel and it has been
ported to UBOOT. Since UBOOT does not support threads so all the
thread functions are being called in uboot synchronously.
In Linux kernel, the UBI background thread starts
after the initialization, which is being controlled by
thread_enabled variable which will be set to true after all
initialization.
Now this patch checks for thread_enabled variable and call the
do_work only if the thread is enabled.
Change-Id: I4b2b40031dbd5f16ceefef541248973ca326cd9c
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
NAND_CMD_PRG_PAGE_ALL uses the spare data from buffer itself
which is not applicable. The spare area in NAND page for
QPIC are dummy bytes so 0xff should be written to these
spare area. NAND_CMD_PRG_PAGE does the same thing and HLOS
driver uses this command for all page program
operations. The actual spare data is being written along
with every codeword since the codewords size is 516 in which
512 bytes are user data and 4 bytes are spare data.
Change-Id: I5651caf5ea95f046570e8318f59e140398869ece
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
1. This driver is directly being registered with MTD
layer so for OOB operations, the device OOB size will be
passed. QPIC can’t handle the complete OOB so calculate QPIC
supported OOB size and overwrite the device OOB size with
QPIC supported OOB size.
2. OOB available calculation was wrong. The available OOB’s are
4 bytes per codeword.
3. Raw configuration codeword size was hardcoded to 528 while 8
bit ECC codeword size is 532.
Change-Id: Idc118e2fdd9882758da9dc6b1e977e04697a5640
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
The QPIC XFER STEPS will not be configured in non NAND boot
mode and the data transfer speed will be very slow. Now this
patch reads the timing parameter from ONFI page and configures
the NAND XFER STEPS registers for highest supported ONFI mode.
For NON ONFI device, it will configure to default mode.
Change-Id: I2daf4a92255307efc53db9bb7fe2f02e8c00c3fa
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
As the U-boot source is going to be common between ARM and MIPS
architecture , it is required to pick only the files specific
to the respective architectures during the build.
So, move the qca arm target specific common files to another
sub level by specifying the ARCH arm.
Change-Id: I06b538834109981f21fef6270bfb8e437a2f5a7e
Signed-off-by: Prabhu Jayakumar <pjayak@codeaurora.org>
The writebufsize is introduced in mtd struct for the ubi fastmap
support.
This is not initialized in the qpic nand driver which leads to ubi
error.
Fixed the following ubi error.
bad write buffer size 0 for 2048 min. I/O unit
UBI init error 22
Change-Id: I35778366b95930bd01108bf300f073ee21940bc6
Signed-off-by: Ajay Kishore <akisho@codeaurora.org>
The writebufsize is introduced in mtd struct for the ubi fastmap
support.
This is not initialized in the qpic nand driver which leads to ubi
error.
Fixed the following ubi error.
bad write buffer size 0 for 2048 min. I/O unit
UBI init error 22
Change-Id: Ie523affe2d202f0e7b3e17dc4ecec19f7c02de27
Signed-off-by: Gokul Sriram Palanisamy <gpalan@codeaurora.org>
Fixed warnings for both ipq807x and ipq40xx
builds.
Change-Id: I69accebf525ee52f470335a14474378f5e7f65b0
Signed-off-by: Saravanan Jaganathan <sjaganat@codeaurora.org>
drivers/mtd/ubi/io.c:1354:3: error: 'dump_len' undeclared (first use in
this function)
dump_len = max_t(int, 128, len - i);
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Skip erase if the sector is blank. The sector erase is slow, and
may take 0.7 sec typically or up to 3 sec worst-case.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
If the erase fails, fail_addr might indicate exactly which block
failed. If fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not
at the device level or was not specific to any particular block.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Erase is an asynchronous operation. Device drivers are supposed
to call instr->callback() whenever the operation completes, even
if it completes with a failure.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Initialize instr.mtd in flash_erase(). This fixes the system
hang issue when CONFIG_MTD_PARTITIONS is selected.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Since all spi-flash core operations are moved into
sf_ops.c then it's better to renamed as spi-flash.c
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Used static for file-scope functions in sf_probe.c
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Since spi_slave is a spi pointer in spi_flash{} then assign
spi_slave{} pointer to flash->spi and remove spi_slave
pointer argument to
- spi_flash_probe_slave
- spi_flash_scan
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
For assigning read_bar commands in spansion case, break
is missing this patch add that break.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
SST parts added on sf_params.c supports both SST_WR which consits
of both BP and WP and there is a spi controller ich which supports
only BP so the relevent _write hook set based on "slave->op_mode_tx"
hence there is no respective change required from flash side hance
removed these.
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Removed unneeded header includes in sf_ops and sf_probe
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Using macro's for flash power up read-only access code
leads wrong behaviour hence use idcode0 for runtime
detection, hence the flash which require this functionality
gets detected at runtime.
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Most of the register access function are static,
so used simple name to represent each.
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
This patch removes unneeded ifdef and fixed accordingly.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Use static for file-scope functions and removed
them from header files.
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
- Move bar read code below the bar write hance both
at once place, hence it easy for #ifdef macro only
once and readable.
- Move read_cmd_array at top
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
read_id code is related to spi_flash stuff
hence moved to sf_ops.
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Intension is that sf_ops should deals all spi_flash
related stuff and sf_probe (which should renamed future)
should be an interface layer for spi_flash versus spi drivers.
sf_ops => spi_flash interface
sf_probe => interface layer vs spi_flash(sf_probe) to spi drivers
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Rename spi_flash_validate_params to spi_flash_scan
as this code not only deals with params setup but
also configure all spi_flash attributes.
And also moved all flash related code into
spi_flash_scan for future functionality addition.
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
