mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-02-09 05:21:03 +01:00
qca: moving qpic-nand initialization to common location
Moves qpic-nand configuration and gpio initialization routine to common location. Change-Id: Ic78230d4e66450bb6804cf9cbd79cec9e8d2f5df Signed-off-by: Gokul Sriram Palanisamy <gpalan@codeaurora.org>
This commit is contained in:
parent
fae4bc20ab
commit
96fa862182
4 changed files with 53 additions and 86 deletions
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@ -437,6 +437,6 @@ struct qpic_nand_dev {
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unsigned char *zero_oob;
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};
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extern int qpic_nand_init(struct qpic_nand_init_config *config);
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void qpic_nand_init(void);
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#endif
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@ -106,50 +106,15 @@ void reset_cpu(ulong addr)
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void board_nand_init(void)
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{
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struct qpic_nand_init_config config;
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int node, gpio_node;
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fdt_addr_t nand_base;
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int gpio_node;
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node = fdtdec_next_compatible(gd->fdt_blob, 0,
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COMPAT_QCOM_QPIC_NAND_V1_4_20);
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if (node < 0) {
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printf("Could not find nand-flash in device tree\n");
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return;
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}
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nand_base = fdtdec_get_addr(gd->fdt_blob, node, "reg");
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if (nand_base == FDT_ADDR_T_NONE) {
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printf("No valid NAND base address found in device tree\n");
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return;
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}
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config.pipes.read_pipe = DATA_PRODUCER_PIPE;
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config.pipes.write_pipe = DATA_CONSUMER_PIPE;
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config.pipes.cmd_pipe = CMD_PIPE;
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config.pipes.read_pipe_grp = DATA_PRODUCER_PIPE_GRP;
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config.pipes.write_pipe_grp = DATA_CONSUMER_PIPE_GRP;
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config.pipes.cmd_pipe_grp = CMD_PIPE_GRP;
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config.bam_base = QPIC_BAM_CTRL_BASE;
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config.nand_base = nand_base;
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config.ee = QPIC_NAND_EE;
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config.max_desc_len = QPIC_NAND_MAX_DESC_LEN;
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gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "nand_gpio");
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if (gpio_node >= 0) {
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qca_gpio_init(gpio_node);
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qpic_nand_init(&config);
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}
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qpic_nand_init();
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gpio_node = fdt_path_offset(gd->fdt_blob, "/spi/spi_gpio");
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if (gpio_node >= 0)
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if (gpio_node >= 0) {
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qca_gpio_init(gpio_node);
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#ifdef CONFIG_IPQ40XX_SPI
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ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX);
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#endif
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ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX);
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}
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}
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static void ipq40xx_edma_common_init(void)
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@ -108,41 +108,7 @@ int board_mmc_init(bd_t *bis)
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void board_nand_init(void)
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{
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int node;
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fdt_addr_t nand_base;
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node = fdtdec_next_compatible(gd->fdt_blob, 0,
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COMPAT_QCOM_QPIC_NAND_V1_5_20);
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if (node < 0) {
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printf("Could not find nand-flash in device tree\n");
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return;
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}
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nand_base = fdtdec_get_addr(gd->fdt_blob, node, "reg");
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if (nand_base == FDT_ADDR_T_NONE) {
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printf("No valid NAND base address found in device tree\n");
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return;
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}
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struct qpic_nand_init_config config;
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config.pipes.read_pipe = DATA_PRODUCER_PIPE;
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config.pipes.write_pipe = DATA_CONSUMER_PIPE;
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config.pipes.cmd_pipe = CMD_PIPE;
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config.pipes.read_pipe_grp = DATA_PRODUCER_PIPE_GRP;
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config.pipes.write_pipe_grp = DATA_CONSUMER_PIPE_GRP;
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config.pipes.cmd_pipe_grp = CMD_PIPE_GRP;
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config.bam_base = QPIC_BAM_CTRL_BASE;
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config.nand_base = nand_base;
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config.ee = QPIC_NAND_EE;
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config.max_desc_len = QPIC_NAND_MAX_DESC_LEN;
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qpic_nand_init(&config);
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qpic_nand_init();
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}
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void board_pci_init(int id)
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@ -35,6 +35,7 @@
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#include <linux/mtd/nand.h>
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#include <asm/arch-qcom-common/bam.h>
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#include <asm/arch-qcom-common/qpic_nand.h>
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#include <asm/arch-qcom-common/gpio.h>
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#include <fdtdec.h>
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#include <dm.h>
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@ -157,7 +158,7 @@ qpic_nand_check_status(struct mtd_info *mtd, uint32_t status)
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if (status & NAND_FLASH_OP_ERR) {
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erase_sts = qpic_nand_read_reg(
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NAND_ERASED_CW_DETECT_STATUS, 0);
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if ((erase_sts &
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if ((erase_sts &
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(1 << NAND_ERASED_CW_DETECT_STATUS_PAGE_ALL_ERASED))) {
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/* Mask the OP ERROR. */
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status &= ~NAND_FLASH_OP_ERR;
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@ -935,7 +936,7 @@ static int qpic_nand_block_isbad(struct mtd_info *mtd, loff_t offs)
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return -EINVAL;
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page = offs >> chip->page_shift;
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/* Read the bad block value from the flash.
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* Bad block value is stored in the first page of the block.
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*/
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@ -1061,7 +1062,7 @@ qpic_nand_add_wr_page_cws_cmd_desc(struct mtd_info *mtd, struct cfg_params *cfg,
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bam_add_one_desc(&bam,
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CMD_PIPE_INDEX,
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(unsigned char*)cmd_list_ptr_start,
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((uint32_t)cmd_list_ptr -
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((uint32_t)cmd_list_ptr -
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(uint32_t)cmd_list_ptr_start),
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int_flag | BAM_DESC_CMD_FLAG | BAM_DESC_UNLOCK_FLAG);
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num_desc += 2;
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@ -1365,7 +1366,7 @@ qpic_nand_non_onfi_probe(struct mtd_info *mtd)
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/* Read the nand id. */
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qpic_nand_fetch_id(mtd);
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qpic_nand_get_info(mtd, dev->id);
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return;
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@ -2168,8 +2169,7 @@ qpic_nand_mtd_params(struct mtd_info *mtd)
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static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
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int
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qpic_nand_init(struct qpic_nand_init_config *config)
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void qpic_nand_init(void)
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{
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struct mtd_info *mtd;
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const struct udevice_id *of_match = qpic_ver_ids;
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@ -2178,6 +2178,8 @@ qpic_nand_init(struct qpic_nand_init_config *config)
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struct qpic_nand_dev *dev;
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size_t alloc_size;
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unsigned char *buf;
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struct qpic_nand_init_config config;
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fdt_addr_t nand_base;
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while (of_match->compatible) {
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ret = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
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@ -2195,11 +2197,45 @@ qpic_nand_init(struct qpic_nand_init_config *config)
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chip = mtd->priv;
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chip->priv = &qpic_nand_dev;
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qpic_bam_init(config);
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if (ret < 0) {
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printf("Could not find nand-flash in device tree\n");
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return;
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}
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nand_base = fdtdec_get_addr(gd->fdt_blob, ret, "reg");
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if (nand_base == FDT_ADDR_T_NONE) {
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printf("No valid NAND base address found in device tree\n");
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return;
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}
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ret = fdt_subnode_offset(gd->fdt_blob, ret, "nand_gpio");
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if (ret >= 0) {
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qca_gpio_init(ret);
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} else {
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printf("Could not find subnode nand_gpio\n");
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return;
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}
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config.pipes.read_pipe = DATA_PRODUCER_PIPE;
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config.pipes.write_pipe = DATA_CONSUMER_PIPE;
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config.pipes.cmd_pipe = CMD_PIPE;
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config.pipes.read_pipe_grp = DATA_PRODUCER_PIPE_GRP;
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config.pipes.write_pipe_grp = DATA_CONSUMER_PIPE_GRP;
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config.pipes.cmd_pipe_grp = CMD_PIPE_GRP;
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config.bam_base = QPIC_BAM_CTRL_BASE;
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config.nand_base = nand_base;
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config.ee = QPIC_NAND_EE;
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config.max_desc_len = QPIC_NAND_MAX_DESC_LEN;
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qpic_bam_init(&config);
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ret = qpic_nand_onfi_probe(mtd);
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if (ret < 0)
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return ret;
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return;
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else if (ret > 0)
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qpic_nand_non_onfi_probe(mtd);
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@ -2244,9 +2280,9 @@ qpic_nand_init(struct qpic_nand_init_config *config)
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goto err_reg;
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}
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if (ret == 0)
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return ret;
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return;
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err_reg:
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free(dev->buffers);
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err_buf:
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return ret;
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return;
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}
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