The MAC addresses for eth0 and the individual LAN ports are now
configured via device tree. The assignment itself stays the same as
before, matching factory firmware.
The 02_network script still sets the bridge MAC address, as it is
different from the lowest port MAC address.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21976
Signed-off-by: Robert Marko <robimarko@gmail.com>
SerDes attached ports that are connected during switch
boot might not be able to transmit any data after SerDes
setup. Especially ports that passed traffic before (e.g.
for tftp initramfs boot) seem to be affected. Ports that
are connected later do not show this issue.
It turns out that the old SerDes setup never really worked
on RTL8382 and the pcs refactoring (with dynamic SerDes
start and stop) totally changed the order of network bringup
in contrast to Realtek SDK.
Fix this by restaring the switch queue whenever a SerDes
goes up for the first time.
Fixes: e956adf ("realtek: rtl838x: setup SDS in PCS driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21956
Signed-off-by: Robert Marko <robimarko@gmail.com>
The write protection register (0x1b000058) is opened up in prom init
but closed later in rtl838x_pie_init(). From that moment no more
special register writes are possible.
Only unlock the write protection register once during prom init.
Remove all other references. The error has been active since ages
but was not visible until pcs refactoring. For reference blame the
refactoring commit.
Fixes: e956adf ("realtek: rtl838x: setup SDS entirely in PCS driver")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21956
Signed-off-by: Robert Marko <robimarko@gmail.com>
Setup of register PLL_CML_CTRL has two issues.
- It clears out bits 4-31 due to a wrong mask
- Setup of bits 0-3 is not generic but depends on the mode of
serdes 0/1
Fix that by relocating the code and adapting the mask. The error
exists for longer but it has survived the pcs refactoring. Thus
blame the corresponding refactoring commit.
Fixes: b670d48 ("realtek: pcs: rtl838x: refactor imported code")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21956
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop leftovers from refactoring. Additionally convert all references
to the old dynamically calculated rings/ringsizes to the new ones.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of the new structures and redesign the receive path.
Especially
- reduce lock usage
- drop KSEG() macros
- use DMA mapping instead of uncached access
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Define the needed structures for the redesign of the ethernet
receive path. They are closely aligned with the already refactored
transmit path.
The only exception is the additional data buffer where the
hardware can place the incoming data. This is allocated non-
coherent and data will be manually synchronized. The old design
used coherent (aka uncached) memory access.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
Realtek switches have either 8 or 32 receive queues on the CPU port.
This is an overkill. Not only the CPUs have low performance but also
the queues need memory (currently ~4MB) and lots of them are rarely
used.
To mitigate that situation add a new setup routine that enforces CPU
packet receiving to a fixed number of queues. From observations one
can see that most of the packets (especially TCP) are received on a
single queue. To align with the transmit path, start with a limit of
2 receive queues.
To make it clear: This commit does not change the receive path or its
structures. It simply limits the number of queues that are filled by
the hardware.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
The ring counters on RTL83xx allow a space of up to 15 entries.
But rings can be filled faster than data is received and might be
much larger defined (128 at the moment). Also NAPI processing
allows much more than 15 packets to be processed in one chunk.
Disable the counters and let the hardware automatically detect
the available buffers by the ownership flag. With this disable
a pseudo workaround that tried to mitigate the buffer filling
on RTL838x due to wrong setup.
Remark. This commit fixes several inconsistencies in the setup
code. RTL838x runs the setup twice with different values. RTL839x
does not run the setup at all.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21856
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is now an implementation of .set_autoneg and .restart_autoneg for
all variants. Remove the helper function which checks for it, and just
call the operation directly.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21934
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL83xx uses the BMCR and ADVERTISE registers like RTL93xx to configure
in-band auto-negotiation. Split out the common parts as a new generic
implementation and use it for RTL83xx. RTL93xx retains its own variant
of set_autoneg to support XSGMII, but calls into the generic version for
all other modes.
Tested 1000Base-X auto-negotiation on HPE 1920-8G (RTL8380). Also tested
HPE 1920-24G (RTL8382) and HPE-1920-48G (RTL8393) to make sure this does
not affect PHY ports.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21934
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Only configure the eth0 MAC address when it is not already done in the
device tree. To do this, create a new variable "eth0_mac".
Also avoid setting "label_mac" for devices already having it defined in
the device tree.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Explicitly specify all devices where the MAC address is configured based
on the U-Boot environment.
This change makes it clearer which devices use this method. Also makes
things simpler for any future devices which handle MAC address
configuration entirely via device tree.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently, the 02_network script always configures MAC addresses for
each individual LAN port unless "lan_mac_start" is set to "skip". This
behaviour can be unexpected, and is also somewhat broken, as it even
continues to do so when "lan_mac_start" is empty.
Change it to only do the configuration if "lan_mac_start" is non-empty,
and also remove the fallback to "lan_mac", making this more obvious and
less error-prone.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The MAC address assignment for XikeStor SKS8300-8T and SKS8300-12E2T2X
is semantically identical to the first case, so let's combine them.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a missing tab in one of the cases of MAC address configuration.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21644
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The bus reset functions currently configure a lot of things. Looking
closely they have a topology setup and a polling setup part. Split the
big chunk in smaller better readable functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21906
Signed-off-by: Robert Marko <robimarko@gmail.com>
The downstream Realtek phy module is currently known as rtl83xx-phy.c
and its kernel config REALTEK_SOC_PHY. It has been simplified, cleaned
and now aligns to Realtek main module (upstream Realtek phy). It is no
longer tied to the Realtek switch SoC but serves as generic module for
1Gbit multiport phys. Adapt it as follows:
- place it into the realtek folder aside its upstream sibling
- rename it to realtek_multiport.c
- remove SoC dependency in Kconfig and Makefile
- change kernel configs for the targets accordingly
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21929
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop some lines that are not needed any longer.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21929
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x and RTL931x basically share the same logic for mac_config().
No need to duplicate that logic in two functions and to call one
from the other.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21895
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is still a stray call in setup_serdes to read the current CMU
band. The only effect is that the current band is printed to the log, the
value itself isn't used for anything further. Drop this since it's not
needed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The function 'rtpcs_931x_sds_init_leq_dfe' was taken over mostly as-is
from the SDK. After looking at what it actually does (by seeing which
register are written and how they are used elsewhere), it becomes clear
that 'init' isn't the correct term to describe what it does. It sets the
LEQ and DFE parameters to baseline values (mostly 0) and turns off auto
mode, switching to manual LEQ/DFE and forcing those baseline values.
This is rather a reset to a known state instead of an initialization.
Name the function accordingly.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add some comments to several register writes explaining what these
fields are. The information was extracted from the SDK. This allows to
understand much better what's going on there.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently, the CMU is configured after media specific settings have been
set. This seems to work however does not make that much sense. The
proper clock should be configured before the TX/RX channels are
configured. Thus, move the call to the CMU configuration above the media
handling.
While at it, handle the return code of the CMU config properly.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SerDes setup for RTL931x relies on chip specifics in some cases,
Determining both usually requires some register operations. But we can
avoid to do this every time again and again since the information is
static anyway. Thus, move this to initialization for RTL93xx, only read
once and store it in the global control structure. Though not used for
RTL930x, it has the same registers and information.
While at it, give referenced defines a proper prefix.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
From the Realtek SDK we know that the chip type tell us whether a chip
is a normal chip or an engineering sample/testchip [1]. Such engineering
samples likely never reach any consumer device, only some initial
development boards. So far we haven't encountered any device with that,
thus the code paths handling this are practically dead and can hardly be
checked of they work properly. To focus on support for the devices we
actually have, drop support for such engineering samples/testchips. This
may be readded later if there's sufficient need for this.
[1] 3261cf2e61/sources/rtk-dms1250/system/drv/swcore/chip_probe.c (L345)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Drop a register write sequence from the USXGMII setup for RTL931x in
favor of using a function that is already present. From the name, the
function initializes LEQ DFE. Though it's not yet clear what it exactly
does, this is already better then having a sequence with no explanation
somewhere in the code.
Apparently, when this code was added, the function wasn't present
but it's content was just added here as single usage.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21858
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport the PSE-PD (Power Sourcing Equipment - Powered Device)
framework updates from Linux 6.13 through 6.19. This brings modern
PoE (Power over Ethernet) controller support to OpenWrt, enabling
userspace control of PSE hardware via ethtool.
Key features:
- Enhanced ethtool integration for PSE status and configuration
- Power domain support with budget evaluation strategies
- PSE event reporting via netlink
- Port priority management for power budget allocation
- New Si3474 PSE controller driver
Backported commits:
v6.13 core framework and TPS23881 improvements:
- 6e56a6d47a7f net: pse-pd: Add power limit check
- 0b567519d115 net: pse-pd: tps23881: Simplify function returns
- 4c2bab507eb7 net: pse-pd: tps23881: Use helpers to calculate bit offset
- f3cb3c7bea0c net: pse-pd: tps23881: Add missing configuration register
- 3e9dbfec4998 net: pse-pd: Split ethtool_get_status
into multiple callbacks
- 4640a1f0d8f2 net: pse-pd: Remove is_enabled callback from drivers
- 7f076ce3f173 net: pse-pd: tps23881: Add power limit
and measurement features
- 10276f3e1c7e net: pse-pd: Fix missing PI of_node description
- 5385f1e1923c net: pse-pd: Clean ethtool header of PSE structures
v6.17 power domains and event support:
- fa2f0454174c net: pse-pd: Introduce attached_phydev to pse control
- fc0e6db30941 net: pse-pd: Add support for reporting events
- f5e7aecaa4ef net: pse-pd: tps23881: Add support for PSE events
- 50f8b341d268 net: pse-pd: Add support for PSE power domains
- 1176978ed851 net: ethtool: Add support for power domains index
- c394e757dedd net: pse-pd: Add helper to report hw enable status
- ffef61d6d273 net: pse-pd: Add support for budget evaluation strategies
- 359754013e6a net: pse-pd: pd692x0: Add PSE PI priority feature
- 24a4e3a05dd0 net: pse-pd: pd692x0: Add controller and manager power
- 56cfc97635e9 net: pse-pd: tps23881: Add static port priority feature
- d12b3dc10609 net: pse-pd: pd692x0: reduce stack usage
v6.18 Si3474 driver and fixes:
- 1c67f9c54cdc net: pse-pd: pd692x0: Fix power budget leak
- 7ef353879f71 net: pse-pd: pd692x0: Skip power budget when undefined
- a2317231df4b net: pse-pd: Add Si3474 PSE controller driver
v6.19 maintenance and TPS23881B support:
- 2c95a756e0cf net: pse-pd: tps23881: Fix current measurement scaling
- f197902cd21a net: pse-pd: pd692x0: Replace __free macro
- 6fa1f8b64a47 net: pse-pd: pd692x0: Separate configuration parsing
- 8f3d044b34fe net: pse-pd: pd692x0: Preserve PSE configuration
- 4d07797faaa1 net: pse-pd: tps23881: Add support for TPS23881B
Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
Link: https://github.com/openwrt/openwrt/pull/21810
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add board support for the Xikestor SKS8300-12E2T2X switch.
Hardware specifications:
========================
-Realtek RTL9302C SoC, 1x MIPS-34Kc, 800 MHz
-512 MB DDR3 RAM
-32 MB SPI-NOR Flash
-12x 2.5GBASE-T Ports (RTL8224)
-2x 10GBASE-T Ports (RTL8261)
-2x 10G SPF+ Ports
-Reset Button on the front panel
-Power & SYS LED's
-UART (115200 8N1) via RJ45
Flash instruction:
==================
-Prepare TFTP server & connect to serial port
-Connect your computer to one of the RJ45 ports
-Power on and interrupt autoboot with Shift + A.
-Use Shift + Q to drop from vendor CLI to U-Boot CLI.
-Change U-Boot Bootcommand (needed for network functionality):
> setenv bootcmd 'rtk network on; boota'
> saveenv
-Start network:
> rtk network on
-Set switch IP and TFTP server IP:
> setenv ipaddr [IP-ADDRESS]
> setenv serverip [IP-ADDRESS]
-Load initramfs image from TFTP server:
> tftpboot 0x82000000 [IMAGEFILE]
-Boot with the downloaded image:
> bootm 0x82000000
-Backup the stock firmware if needed
-Perform sysupgrade with the sysupgrade image (in Luci or Terminal via scp & sysupgrade)
Back to stock firmware:
=======================
-In the Terminal enter:
> fw_setenv bootcmd 'boota'
-Write firmware with:
> sysupgrade -F [IMAGEFILE]
Signed-off-by: Michael Wagenhofer <michael@wagenhofer.de>
Link: https://github.com/openwrt/openwrt/pull/21773
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Looking at the Realtek mdio busses there are curently the following
root@OpenWrt:~# mdio
1b000000.switchcore:mdio-controller-mii
fixed-0
realtek-aux-mdio
realtek-serdes-mdio
rtldsa_mdio-0
The main mdio bus for the phys is named after the dts node it belongs
to (1b000000.switchcore:mdio-controller-mii). As it is attached to the
controller node it is even more confusing.
Align the naming to the other busses and use "realtek-mdio".
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21702
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The phy driver still uses the ancient unknown firmware file format
for the internal RTL8218B of the RTL838x. Get rid of that and
convert the initialization to the bare minimum.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21885
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Enabling and disabling in-band auto-negotation is already supported on
RTL93xx. However, so far the advertisement is left unchanged at the
default of 0x1a0 (full duplex + pause + asymmetric pause).
Instead, set the advertisement to reflect the current configuration for
1000Base-X and 2500Base-X. Nothing needs to be done for SGMII, as the
advertisement register is ignored in that case.
Testing shows that negotiation of flow control works for 1000Base-X and
2500Base-X (tested with RTL930x on both ends of the link).
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21869
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a new SerDes operation for restarting in-band negotiation including
an implemenation for RTL93xx, and call it from .pcs_an_restart.
This is a prerequisite for configuration of the in-band advertisement,
as changing it requires triggering a restart of auto-negotiation.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21869
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 78bf3a5f44 ("realtek: dsa: Fix rate control initialization") enabled
code setting up the "storm control" feature. This casued a speed regression
on rtl838x, reducing the effective max speed per port from line rate to around
500 Mbits/s.
Storm control is a policy feature with a number of input parameters depending
on use case and environment. It is not possible to define a meaningful static
policy in the driver. The problem isn't just the arbitrary limits in the
current code. Such features require userspace interfaces.
Drop this code for now. It wasn't missed while it was disabled.
Cc: Sven Eckelmann <se@simonwunderlich.de>
Fixes: 78bf3a5f44 ("realtek: dsa: Fix rate control initialization")
Link: https://github.com/openwrt/openwrt/issues/21692
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21877
Signed-off-by: Robert Marko <robimarko@gmail.com>
DSA tagging currently works with a tuned trailer tagging. That means:
- realtek target uses tag_trailer for tagging
- there is a patch for the trailer tagger to write the target port not
as a bitfield but as an integer
Make the tagging independent from upstream and hacky patches by providing
a new downstream driver. This can be aligned easier for future development.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21815
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SoC specific configuration structure is currently manually
assigned depending on the family_id. This will be removed in
the future. Make use of device_get_match_data() instead.
While we are here rename the structure prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21866
Signed-off-by: Robert Marko <robimarko@gmail.com>
Bit 15 of the rtl838x SMI_GLB_CTRL register is set early during mdio reset
and never cleared. There is no need to set it again.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21868
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 17f12695d0 ("realtek: mdio: rtl838x: activate combo PHY media detection")
dropped setting bit 15 of the SMI_GLB_CTRL register without any explanation. This
broke the Netgear GS108Tv3, causing phy patching to fail:
Firmware loaded. Size 1184, magic: 83808380
Realtek RTL8218B (internal) 1b000000.switchcore:mdio-controller-mii:08: patch
Realtek RTL8218B (internal) 1b000000.switchcore:mdio-controller-mii:08: package not ready for patch.
Realtek RTL8218B (internal) 1b000000.switchcore:mdio-controller-mii:0f: probe with driver Realtek RTL8218B (internal) failed with error -5
None of the internal phys was able to detect a link after this error.
Some rtl8380 devices, like the Zyxel GS1900-10HP A1, were not affected by the bug
because their boot loader always sets bit 15. The bug could also be worked around
on affected devices by running "rtk network on" before booting OpenWrt, setting
bit 15 as a side effect.
Cc: Markus Stockhausen <markus.stockhausen@gmx.de>
Cc: Robert Marko <robimarko@gmail.com>
Fixes: 17f12695d0 ("realtek: mdio: rtl838x: activate combo PHY media detection")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/21868
Signed-off-by: Robert Marko <robimarko@gmail.com>
The internal RTL8218B gets detected cleanly. No need for
additional checks of the bus address or the SoC type.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21857
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add everything that's needed to have a standalone setup of the XSGMII
mode without having to rely on previous U-boot setup. This includes
patch sequences for the SerDes and extensions of symbol error reset and
reading.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The XSGMII mode is special in several regards. The inband
autonegotiation for this mode is called 'XSG N-way'. It is controlled
using different bits and location, and using XSG operations.
Add support for this by enhancing the set_autoneg implementation shared
by RTL930x and RTL931x. This can stay shared since it works the same for
both variants.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Instead of having all kinds of SerDes-related operations in the global
pcs config structure, there's now a SerDes ops structure which is
intended to cover and separate this.
Move the set_autoneg hook to the SerDes ops to adhere to this desired
separation. Calling the operation is further encapsulated with a small
convenience helper.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This header is deprecated and typically platform_device.h should be
used.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21164
[Adapted the lantiq patches a bit]
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Do not derive the number of hardware receive rings from the SoC
family. Instead add the information to the configuration
structure. Make use of it during ethernet driver probing.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21706
Signed-off-by: Robert Marko <robimarko@gmail.com>
For packets trapped to the CPU for a special reason (not normal
forward), the RTL931x tag decoding always print a log message with level
INFO. This is not needed and just spams the log, e.g. when LLDP packets
are running through the network, each of them causes a log message.
Make that a debug message instead of an info message. We can keep it,
just change when it's printed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21844
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove the unneeded sw_xxx() macros.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of regmap in the RTL93xx reset functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make use of regmap in RTL83xx reset functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some straight forward conversion ...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop legacy sw_xxx() macros for RTL931x devices. While we are here
reorganize the access and avoid masked access where possible. So the
code is easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21824
Signed-off-by: Robert Marko <robimarko@gmail.com>
