The RTL931X CMU code was only capable of setting up ring PLL. This is
fine so far as most modes use this PLL type. Other modes are not handled
by the code, neither here nor in the SDK. Though, the SDK has the needed
sequence to setup the LC PLL. Using LC PLL seems to be handled somewhere
else.
Include the small sequence from the SDK to have it, though not used yet.
This could be helpful for further development which goes beyond the SDK.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
The implementations for CMU management for RTL930x and RTL931x differ in
their terminology but not that much in their technical aspect. For both
it seems to be the case that two adjacent SerDes share a CMU. This CMU
contains a ring PLL for low speeds (capable of 1G/2.5G) and an LC PLL for
high speeds (capable of 1G/2.5G/10G).
Introduce an enum for the PLL type, used for both RTL93xx variants.
Align the naming of internal variables, especially in the RTL931x
implementation. Rename cmu_type to pll_type because this is much more
accurate. Use 'force_' instead of 'frc_' to make clear what it means.
Also rename the function from 'cmu_type_set' to 'config_cmu' because it
obviously does more than just setting the CMU type but rather configures
the CMU.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the wrong values bit values when setting CMU band which were the
same for both 'enable == true' and 'enable == false'.
While at it, fix some coding issues in the CMU functions:
- drop confusing debug output
- use ternary value instead of if-else
- return proper error
- make variable declaration in reverse christmas tree
- drop unneeded temporary value
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch the CMU setup functions to use the SerDes hardware mode instead
of the PHY interface mode.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21707
Signed-off-by: Robert Marko <robimarko@gmail.com>
The symbol error reset function misses the default sequence. E.g. kernel
spits the message "rtpcs_930x_sds_sym_err_reset unsupported phy mode" when
working on 2500base-x.
Align the function with the SDK by
- adding QSGMII mode
- adding the "all other modes" switch
- working with "channels" to make clearer what happens
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21718
Signed-off-by: Robert Marko <robimarko@gmail.com>
Ensure md volumes are ready before attempting to mount volumes.
Signed-off-by: Joe Hohertz <jhohertz@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21553
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Zyxel GS1900-24 B1 is a 24 port switch with two SFP ports, it is
identical to the A1 except for doubling the ram.
Specifications
--------------
* Device: Zyxel GS1900-24 B1
* SoC: Realtek RTL8382M 500 MHz MIPS 4KEc
* Flash: 16 MiB
* RAM: 128 MiB DDR2 SDRAM
* Ethernet: 24x 10/100/1000 Mbps, 2x SFP 100/1000 Mbps
* LEDs:
* 1 PWR LED (green, not configurable)
* 1 SYS LED (green, configurable)
* 24 ethernet port link/activity LEDs (green, SoC controlled)
* 2 SFP status/activity LEDs (green, SoC controlled)
* Buttons:
* 1 "RESET" button on front panel (soft reset)
* 1 button ('SW1') behind right hex grate (hardwired power-off)
* Power: 120-240V AC C13
* UART: Internal populated 10-pin header ('J5') providing RS232;
connected to SoC UART through a SIPEX 3232EC for voltage
level shifting.
* 'J5' RS232 Pinout (dot as pin 1):
2) SoC RXD
3) GND
10) SoC TXD
Serial connection parameters: 115200 8N1.
Installation
------------
OEM upgrade method:
* Log in to OEM management web interface
* Navigate to Maintenance > Firmware > Management
* If "Active Image" has the first option selected, OpenWrt will need to be
flashed to the "Active" partition. If the second option is selected,
OpenWrt will need to be flashed to the "Backup" partition.
* Navigate to Maintenance > Firmware > Upload
* Upload the openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-initramfs-kernel.bin
file by your preferred method to the previously determined partition.
When prompted, select to boot from the newly flashed image, and reboot
the switch.
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-squashfs-sysupgrade.bin
U-Boot TFTP method:
* Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10).
* Set up a TFTP server on your client and make it serve the initramfs
image.
* Connect serial, power up the switch, interrupt U-boot by hitting the
space bar, and enable the network:
> rtk network on
> Since the GS1900-24 B1 is a dual-partition device, you want to keep the
OEM firmware on the backup partition for the time being. OpenWrt can
only be installed in the first partition anyway (hardcoded in the
DTS). To ensure we are set to boot from the first partition, issue the
following commands:
> setsys bootpartition 0
> savesys
* Download the image onto the device and boot from it:
> tftpboot 0x81f00000 192.168.1.10:openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-squashfs-sysupgrade.bin
Co-authored-by: Goetz Goerisch <ggoerisch@gmail.com>
Signed-off-by: Joe Holden <jwh@zorins.us>
Add memory size and adapt supported device.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
As there are actually 2 versions of the GS1900-24 where the only
difference is the amount of ram, use a common dtsi and make the
original A1 model dts include the dtsi and only override the memory size.
Signed-off-by: Joe Holden <jwh@zorins.us>
Move memory size to device dts.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ethernet driver uses an indirection for access to the MAC_PORT_CTRL
register (aka. MAC_L2_PORT_CTRL on RTL93xx). It defines the base address
and adds up the cpu port offset. This is not needed as the driver does
not handle the non-cpu ports. Use direct register access instead and
avoid register confusion by always using the "_L2_" naming.
While we are here:
- Drop the functions and use defines instead
- Add CPU port defines for better readability
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21691
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Align with the other Realtek switch drivers and use "ctrl" instead
of "priv" for the central data structure.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21701
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The CONFIG_SOFTLOCKUP_DETECTOR_INTR_STORM option shows up when the
OpenWrt option CONFIG_KERNEL_SOFTLOCKUP_DETECTOR is activated.
Link: https://github.com/openwrt/openwrt/pull/21710
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix missing reference to bootconfig.sh that was breaking root partition
swap.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21721
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Extend the taxonomy subsystem to capture the complete association frame
in addition to the existing probe and association IE data.
This adds a new assoc_frame_taxonomy field to struct sta_info and exposes
it via the get_sta_ies ubus method as a base64-encoded "assoc_frame" field.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Extend the hostapd_rrm_beacon_req ubus method to support the optional
reporting_detail parameter as defined in IEEE 802.11-2016 section 9.4.2.21.7.
Also fix missing assignment operators (=) in the beacon_req_policy array
initialisation.
Signed-off-by: John Crispin <john@phrozen.org>
Add netifd_loglevel to /etc/config/network:
config globals 'globals'
option netifd_loglevel '1'
The netifd's default value is 2.
Signed-off-by: Peter Meiser <peter.meiser@gmx.com>
Link: https://github.com/openwrt/openwrt/pull/19737
Signed-off-by: Robert Marko <robimarko@gmail.com>
Setup for DSA QOS on RTL839x accesses unitialized memory. For some
reason the handover of the priv structure was realized via global
intermediate variable switch_priv. During refactoring for adbb9a6
("realtek: dsa: rtl83xx: fix init section mismatch") this was not
noticed. Since then RTL839x devices crash during startup.
Fix this by using standard handover via function parameters.
Fixes: adbb9a6 ("realtek: dsa: rtl83xx: fix init section mismatch")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21703
Signed-off-by: Robert Marko <robimarko@gmail.com>
TCL LINKHUB HH500V also known as Vodafone Gigacube B157 is a dual band
802.11ax 5G NR CPE with an FXS port.
Specifications:
* SoC: Qualcomm IPQ8072A
* RAM: 1024 MB
* NAND flash: 256MB NAND (MT29F2G08ABBGAH4)
* NOR flash: 64MB NOR (MX25U25635F) - only in some variants
* WiFi 5G: Qualcomm QCN5054
* WiFi 2.4G: Qualcomm QCN5024
* Ethernet 2.5G: Qualcomm QCA8081
* Ethernet 1G: Qualcomm QCA8075
* Modem: GosunCn GM800 (Qualcomm Snapdragon X55)
* SIM: 1 nano-SIM card slot
* Buttons: Power, Reset, WPS
* LEDs: Power (B/R), WiFi (B), 4G (B/Y/R), 5G (B/Y/R)
* VoIP: 1 FXS RJ11 port (not supported in OpenWrt)
* Power: 12V, 3A
UART serial console:
* 115200,8N1,1.8V
* Three unmarked test points next to QJ2012A:
+---------+
| QJ2012A |
+---------+
o TX
o GND
o RX
o
o
o
Installation via OEM firmware:
* Use the following process to obtain root ssh access
https://forum.openwrt.org/t/150371/24
* Connect using root with no password on port 42000
* Optionally for serial bootloader access run :
fw_setenv bootdelay=3
* SCP factory.bin to /tmp
* Run:
sysupgrade -n /tmp/factory.bin
Installation via serial console and OEM firmware::
* Use console to access OEM firmware shell
* Proceed with SCP & sysupgrade as described above
Other notes:
* This device uses active partition rotation
* Some versions (TCL branded?) have a NOR chip in addition to NAND
* The above is supported by u-boot patching DT partitions
* DT patching does NOT occur on tftpboot/bootm
* Modem is detected as foxconn-sdx55 by kernel (same VID/PID)
* This works OK-ish and should be improved if we can get OEM modem details
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19182
Signed-off-by: Robert Marko <robimarko@gmail.com>
The BOOTCONFIG partition is used by Qualcomm's boot chain to store
metadata about the device's startup configuration. It contains info such
as versioning, configuration flags, primary boot partition, and more.
Newer devices with dual boot partitions not only store the active boot
partition in a U-boot variable but also in partition info in the
BOOTCONFIG partition. As such, add library functions to set and toggle
the active boot partition.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19182
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GPIO expander is connected via I2C, thus the can_sleep flag has to
be set to true. This fixes spurious "scheduling while atomic" bugs
in the kernel ringbuffer.
Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19182
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align the functions with rest of driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21685
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align the functions with rest of driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21685
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are some code pieces that determine the SoC version of the
running system. For RTL83xx it reads out the registers, for RTL93xx
it simply uses a constant value. Without any consumer of this data
drop it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21684
Signed-off-by: Robert Marko <robimarko@gmail.com>
No one has looked into the firmware based RTL8218B initializations
for a long time. Instead the basic setup sequences have evolved
so that they can start the RTL8218B PHY from scratch. See
19bc6e8 ("realtek: phy: add basic RTL8218B setup")
4fa90d8 ("realtek: phy: enhance RTL8218B initialization")
Drop the legacy coding.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21679
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add two missing $$ in the factory image build pipeline for MR6350
Signed-off-by: Zeyu Dong <dzy201415@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21682
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit enables PoE output on port 1 of the Meraki MR30H if
the device is powered via 802.3at PoE.
No PoE output is enabled if the device is powered via 802.3af PoE,
as there is insufficient power.
Signed-off-by: Hal Martin <hal.martin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20645
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that DCB is enabled by default, it makes sense to include it on
lan969x.
While we are here, lets include ip-bridge as these devices are switches
and the Busybox applet does not expose enough functionality.
These devices have no space constraints.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Switchdev driver used by microchipsw supports DCB and has not storage
constraints, so enable kernel and driver DCB support by default.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The Raidsonic devices do not use a 2048k kernel "Kern"
partition like the Storlink reference designs. Instead
it uses a 3072k partition to fit a slightly
larger kernel.
Sadly the current OpenWrt Gemini kernel is still bigger
than 3072k so we need to make use of the Ramdisk
partition as well.
Create a special "copy-kernel" version that can deal
with the Raidsonic 3072k kernels. Tested on the
Raidsonic IB-4220-B booting kernel v6.12.66.
Fix a copy/paste error in the image generation makefile
while we are at it.
Link: https://github.com/openwrt/openwrt/pull/21686
Signed-off-by: Linus Walleij <linusw@kernel.org>
Specifications:
* SoC: Qualcomm IPQ6018/AP-CP03-C1 (64-bit Quad-core Arm Cortex-A53 @ 1.2 GHz)
* RAM: 2x Zentel A3T4GF40BBF-HP (1 GiB DDR3-1866 (13-13-13))
* Serial Port: 1v8 TTL 115200n8
* Wi-Fi: Qualcomm QCN5022 (802.11ax/b/g/n)
* Wi-Fi: Qualcomm QCN5052 (802.11ac/ax/n)
* Ethernet: RTL8211FS (10/100/1000BASE-T)
* Flash: GigaDevice PSR1GA30DT (128 MiB)
* LEDs: 1x Blue Status (GPIO 35 Active High)
* Buttons: 1x Reset (GPIO 9 Active Low)
* FCCID: 2AXJ4EAP620HDV3
* UART: 4-pin unpopulated header by the J1 footprint
Installation Instructions (Serial+TFTP):
1. Locate the J1 footprint which contains 4 unpopulated pins
where starting from the arrow, the pins are TX, RX, VCC and GND
respectively.
2. Connect a 1v8 TTL port to the 4 pins. Ensure RX and TX are crossed
over.
3. Copy openwrt-qualcommax-ipq60xx-tplink_eap620-hd-v3-initramfs-uImage.itb
to your TFTP server.
4. Power up the AP and hold Ctrl+B in the serial console (115200n8) until autoboot is halted.
5. Run the following commands in the U-boot prompt:
IPQ6018# setenv serverip <TFTP server addr>
IPQ6018# setenv ipaddr <addr of the AP>
IPQ6018# tftpboot 0x44000000 openwrt-qualcommax-ipq60xx-tplink_eap620-hd-v3-initramfs-uImage.itb
IPQ6018# bootm 0x44000000
You may need to type Ctrl+C and Enter before running these commands
to clear invisible characters from the buffer.
6. Run the following command in a terminal to copy the sysupgrade image
to be installed (check IP address):
$ scp -O openwrt-qualcommax-ipq60xx-tplink_eap620-hd-v3-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
7. Activate the OpenWrt serial console and run the following commands:
# cd /tmp
# sysupgrade -n openwrt-qualcommax-ipq60xx-tplink_eap620-hd-v3-squashfs-sysupgrade.bin
8. The AP will reboot and OpenWrt will be successfully installed.
Installation Instructions (Web UI method):
1. Set up the device using the vendor's web UI. Navigate to
Management->SSH and enable the "SSH Login" checkbox. Select "Save".
2. Connect to the machine via SSH:
$ ssh -o hostkeyalgorithms=ssh-rsa <ip_of_device>
3. Disable signature verification:
$ cliclientd stopcs
4. Rename the "-web-ui-factory" image to something less than 63
characters, maintaining the ".bin" suffix.
5. Go to System -> Firmware Update.
Under "New Firmware File", click "Browse" and select the image.
Select "Update" and confirm by clicking "OK".
6. If the update fails, the web UI should show an error message.
Otherwise, the device should reboot into OpenWrt.
Device support followed from EAP620HD v2 and eap6xx-outdoor for DTS.
Links: openwrt/openwrt#18227
Signed-off-by: John Christoforidis <github@yanny.dev>
Link: https://github.com/openwrt/openwrt/pull/21467
Signed-off-by: Robert Marko <robimarko@gmail.com>
Update the econet-eth driver to a new version which is of
sufficient quality that it is realistic to think about upstreaming.
This version is now NAPI based, collects stats, downloads without
dropped packets anymore, has debugfs introspection, and can be
unloaded and reloaded (providing the reset controller is present).
PR #21545 is recommended but not required, without this the
ethernet driver will log a warning on startup because it can't get
the resets and it will be impossible to unload and reload the
driver without a reboot. However, the PoC driver was not capable of
reloading so this is not a regression.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/21557
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Compilation currently spits this message:
WARNING: modpost: vmlinux: section mismatch in reference:
rtl83xx_sw_probe+0x6a4 (section: .text.rtl83xx_sw_probe)
-> rtl83xx_setup_qos (section: .init.text)
That means that we have a "normal" function caller (can be
called during the whole uptime) and a "initialization" function
callee (only available during init.
Fix this and directly fix the unwanted family checks.
Fixes: a91c3ab ("realtek: dsa: avoid use-after-free")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21690
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch was manually edited but not refreshed.
Fixes: 794b4dee65 ("uboot-mediatek: add 8g check to bpi-r4 environment for bl2")
Fixes: 46ee5209aa ("uboot-mediatek: add command for getting size of ram")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21693
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add a PHY ID for Aquantia AQR813 which is an Octa-PHY found in some
Realtek switches.
Add another PHY ID for another revision of AQR113C, also found in some
Realtek switches.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21515
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Apply the PHY polling configuration for RTL931x too, as previously
implemented for RTL930x. This is needed for several PHYs on that
platform to function properly.
Add another flag called 'force_res' to the phy_info struct which is for
RTL931x only. The SDK mentions this as a flag to force polling the
Realtek proprietary PHY status resolution register. Effectively, this
changes the polling to proprietary format instead of standard format,
and sets an enable bit in another private polling register field.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21515
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reading the PHY ID to assign a PHY config is currently simple. For C45
two MDIO reads of a hardcoded MMD are done to get the standard PHY ID
registers. MMD 31 (MMD_VEND2) is used for that purpose, assuming there
will be a valid PHY ID stored in this MMD in all cases. However, with
Aquantia AQR813 there's at least one example for which this isn't true.
This PHY returns 0 for the PHY ID in MMD_VEND2, instead MMD_VEND1 would
have the correct ID.
Enhance reading the PHY by accessing a common set of MMDs of which most
PHY at least implement one and have a valid PHY ID in. To keep overhead
low, do not scan all MMDs. As soon as a valid PHY ID is found, exit and
use that. This is similar to the kernel logic, jsut reduced to fewer
MMDs.
Also handle possible errors coming from MDIO reads to avoid reading garbage.
While at it, move reading the PHY ID to a separate function to not
pollute the poll fixup retrievel function.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21515
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Add pending support for the HINLINK H66K / H68K.
Tested on HINLINK H66K, H68K and H68K-V2.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/21270
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Realtek mdio driver does not need to track a separate lock.
Rely on the default kernel mdio bus lock instead.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Refactor RTL931x mdio commands to use the new helper function.
Remove unneeded goto and debug statements.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
