Adding device tree support for HK07 in u-boot-2016.
Change-Id: Ib1ea4ffe1df241d2c2cbd3fac4fff3f157eae077
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
In case of 11ad dock (AK01), 8033 phy needs to be reset,
before switch initialization. GPIO32 is configured to
reset phy.
Change-Id: I18a7f05b57c9a02adb27d58d8b4098d44edb49bd
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
This patch is to support DK01-C3 dts which is required
for standard profile in linux 4.4 kernel.Linux 3.14 kernel
does not have DK01-C3, hence it uses DK01-C1 config.
Change-Id: I4afa8c4511e55f093b573cf42e04b0917ce7d0b4
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
1. Added pci entries in AP160 and AP160_2xx dts
2. The wifi pcie card requires to be powered on from GPIO
pins. This patch also adds the same in AP160 dts file and
enable it during PCIe configuration.
Change-Id: Icd8f5741d5df38d46640c78a7475853e77b873a9
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Updated the drive strength and pull up values for
the emmc pins.
Reference commit id:185a9ad97acb1d0ee18b9af45a17e1d183af2674
Change-Id: I1e38a51eb1a4c1701866c1f45c8189eea9cd1337
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
Previous pending L2 cache errors are cleared during the
cleanup phase before transferring the control to linux.
Change-Id: I3a54c64049135e150c2b49b0d6de1667511b6a14
If the dump_to_flash environment variable is set with the proper
offset in u-boot, crashdump data will be stored to flash memory.
Otherwise it will be stored in tftp server.
Change-Id: I10ac1016e3dfe6a2fa11a0a67c5774b29c3df67a
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Made the necessary changes to retrieve the boot version through
SMEM call and append the same to device tree.
Change-Id: I627b108935995212520794d12d6f9af64641a96f
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
Made the necessary changes to retrieve the tz version through
SCM call and append the same to device tree.
Change-Id: I890f82a4ec03bb9c24eccce09fdeba9d948e1c71
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
This patch adds support to DK06_1_C1 board.
Change-Id: Ib4fcbdfe7e2e0ce08d5aa08aad4dc168c83a3583
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
This patch adds support to DK01_1_S1 board.
Change-Id: I4a97f809766513da05f167b48923986c0860384e
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
Registering SPI nor flash as mtd device was based
on 'spi_gpio' entry in dts, whereas it will be done
based on 'spi_nor_available' in this patch as spi_gpio
entry is not required in some of the SPI nor
supported boards.
This patch also enables the spi nand support
in DK04-c5 board.
Change-Id: I2d70a6c108321d0f504daab7bc4e74739499582a
If crashdump magic is found, should not allow user
to access u-boot prompt as tz will be in unsecure state.
Change-Id: Icdc94c33fb87664857bafa981950f9768794cf11
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
This patch fixes the issues in below i2c commands.
i2c probe , i2c md and i2c mw commands.
Change-Id: I3dd99e8846452b20a71b0664d325b309f3564579
Signed-off-by: Antony Arun T <antothom@codeaurora.org>
This patch enables SPI-NAND support for DK and making
chip select gpio configurable from DTS.
Change-Id: I2ca7d3021fa27da1d83e2a787a1dc626919124f8
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
ipq806x has different alignment of smem_ram_ptable structure when
compared to ipq40xx / ipq807x, which leads to fetching of wrong
information.
This patch addresses the issue by moving the above structure to
board specific.
Change-Id: If7bf2fc54243fc38d1b0a5c9e6f6ba6f9641c700
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
Adding support for DK04-C2,C3,C4,C5 and
DK07-C1,C2,C3 boards.
Change-Id: I2727645086328331deffd63849bedbf119d163c8
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
Enabling spi dma driver for ipq40xx. This patch
also enables rx and tx pipe configurable from dts.
Change-Id: Id6009f6e9863ab2cdf8b105461d62aa68e3d004b
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Added check for dcache status before flushing.
Change-Id: I69462aa7852f96611e663acdf43aecd005a50c38
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
If crashdump magic is found, should not allow user
to access u-boot prompt as tz will be in unsecure state.
Change-Id: I081e84eceada7ffe72d9b4fa4f0425535e4aabde
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Some of the newer nand parts can have bit flips in an erased
page due to the process technology used. In this case, qpic
nand controller is not able to identify that page as an erased
page. In case of bitflips, the ECC engine tries to correct the
data and then it generates the uncorrectable error. Now, this
data is not equal to original raw data.
Following logic is being added to identify the erased
codeword bitflips.
1. Maintain the bitmasks for the codewords which generated
uncorrectable error.
2. Read the raw data again in temp buffer and count the
number of zeros. Since spare bytes are unused in ECC layout and
won’t affect ECC correctability so no need to count number of
zero in spare bytes.
3. If the number of zero is below ECC correctability then it
can be treated as erased CW. In this case, make all the data/oob
of actual user buffers as 0xff.
Change-Id: Ie0427c6802e2e41234137e0fbbf51c5a50a35946
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
This patch does minor code reorganization to store spare, ecc and
bbm bytes in nand device structure which will be useful in
subsequent patches.
Change-Id: Id44c53e204a874569968764798c346a609695acf
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Following are the major issues in current implementation for
checking the read errors
1. For checking the erased CW, NAND_ERASED_CW_DETECT_STATUS
is being read inside qpic_nand_check_status. The
qpic_nand_check_status will be called after complete page read
so reading status register won’t help in getting the register
value after each CW reads.
2. The mtd layer expects the driver to return non-negative
integer representing the maximum number of bitflips that were
corrected on any one ecc region. The mtd layer takes care of
returning EUCLEAN based on returned number.
3. mtd->ecc_stats is only applicable when ECC engine is
doing ECC correction. For raw reads, the stats should not be
incremented.
Now the changes have been done to reorganize the error handling
1. schedule the NAND_ERASED_CW_DETECT_STATUS reading after
every CW read and check the same if ECC engine generates
uncorrectable error.
2. For raw read, the ECC engine will never generate the
uncorrectable error or erased CW so check only
NAND_FLASH_STATUS.
3. The qpic_nand_read_oob should return the maximum number
of bitflips that were corrected on any one ecc region so
introduce the max_bitflips for maintaining the same.
4. The read should return the complete data in case of
BADMSG so move the BADMSG check in the main read function.
Change-Id: Ibef56294ace00d7cd67b501f623fb1d3aeb2c6ec
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
1. ecc strength can be assigned in mtd structure itself so
remove the ecc_width from qpic nand dev structure
2. Initialize bitflip_threshold with 3*4 of ecc strength so
that MTD layer will return EUCLEAN if number of ecc correction
are more than bitflip_threshold.
Change-Id: Ieafd1957b89a05f9dd0fdfe829712d8891bd6a48
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
NANDC_RESULT_BAD_PAGE is not being returned by any operation, so
it can be removed.
Change-Id: Ia90e4e6b7ef7577d069d312d51083b50f49bf980
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Print spi 3 byte address by default if the
SMEM_SPI_FLASH_ADDR_LEN ID is not passed in smem.
Change-Id: I6b55401adb89a1341130465ae307c30901ce7895
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
This patch enables SDHCI mode and also supports
data transfer using ADMA method.
Change-Id: Ia3187fec9024ad0972ca720cf0b9ddc6a59b906c
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
