ipq806x: Add PCIE entries for AP161 board

Change-Id: If4da38e78d11c9fbdfce4967063462d5226e9098
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
This commit is contained in:
Kathiravan T 2017-11-28 12:37:09 +05:30
parent d1dda6d82a
commit a12f313e9c
2 changed files with 54 additions and 0 deletions

View file

@ -23,6 +23,9 @@
console = "/serial@16340000";
nand = "/nand@1A600000";
gmac_gpio = "/gmac1_gpio";
pci0 = "/pci@1b500000";
pci1 = "/pci@1b700000";
pci2 = "/pci@1b900000";
};
gmac_cfg {
@ -55,4 +58,40 @@
};
};
pci@1b500000 {
pci_gpio {
gpio3 {
gpio = <3>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_12MA>;
oe = <GPIO_OE_ENABLE>;
};
};
};
pci@1b700000 {
pci_gpio {
gpio48 {
gpio = <48>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_12MA>;
oe = <GPIO_OE_ENABLE>;
};
};
};
pci@1b900000 {
pci_gpio {
gpio63 {
gpio = <63>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_12MA>;
oe = <GPIO_OE_ENABLE>;
};
};
};
};

View file

@ -438,6 +438,21 @@
perst_gpio = <48>;
};
pci@1b900000 {
compatible = "qcom,ipq806x-pcie";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1b900000 0xf1d
0x1ba00000 0x2000
0x1b902000 0xa8
0x32000000 0x32000000
0x35f00000 0x100000
0x00903ADC 0x40>;
reg-names = "pci_dbi", "parf", "elbi", "axi_bars",
"axi_conf", "pci_rst";
perst_gpio = <63>;
};
spi {
spi0 {
mosi_miso_clk {