This change is necessary as an additional 2 MB is
allocated as reserved memory for TZ_APPS exposed
in qseecom driver and we must notify the same
boundary as FDT_HIGH to uboot.
Without this change, the board gets stuck in uboot
with starting kernel message during boot up.
Change-Id: I6653d3c3dbac97cdf38a41d84d0b401d462cf5ce
Signed-off-by: speriaka <speriaka@codeaurora.org>
During kernel bootup, dcache is enabled to reduce boot time.
When CONFIG_SYS_DCACHE_OFF macro is defined, dcache will not
be enabled.
Change-Id: I1830b467f2948250f5e7a676dd0f16a025e7b229
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
Software SPI reset mode can be trigger from 4-Byte Address mode
in flash W25Q256JW.
Change-Id: I3f8ec46c2732c07a7af0cc7331102334413067ba
Signed-off-by: Santan Kumar <santank@codeaurora.org>
Do generic flash structure initialization, for the devices
not listed in the SPI NOR flash lookup table, so that
we can access the flash even before the support is added.
Block size and density are obtained from smem.
Change-Id: I568eb538615bb36124c43a2509bcfce2e4a1188a
Signed-off-by: Balaji Jagadeesan <bjagadee@codeaurora.org>
If readonly bit of gpt attribute is set,
power-on write protection will be enabled.
Change-Id: I7dd9250fd592988626e889f92f07c6839585eb7d
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
This patch enables SDHCI mode and also supports
data transfer using ADMA method.
Change-Id: Idafb0ecd6cb3ddf28e18681f8823134be99574cd
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
To save space in NOR flash, environment loading from flash is
handled differently for NOR and NAND. The size for NOR flash
environment is taken from partition size itself.
Change-Id: I588471b679fad0e96b836d43dc1a0136c5400fc1
Signed-off-by: Antony Arun T <antothom@codeaurora.org>
dcache is enabled only during boot from flash.
During JTAG recovery, dcache_enable is skipped
to avoid cache issues in recovery environment.
Change-Id: Ie3003f67c787cbc6b88dc42017aeb2a9508d2ff9
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
This patch adds the support on nand driver to work
when dcache is on.
flush_dcache_range will do both clean and invalidate.
To avoid any data loss when an un-aligned buffer used
in RX path, before giving buffer to bam and after bam
updates the data in buffer, buffer will be flushed.
Change-Id: Ib38d68726efe1692ae94c2be1af61cf29d1c2e50
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
CONFIG_SYS_MALLOC_LEN has been increased from 256K to 2048K to
support memory requirements of MT29F8G08ABABA Micron
1GB NAND flash.
Change-Id: I7d5af023d2a8bd2a0f11b28ef75eee2f5c38f6be
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
Updated the drive strength and pull up values for
the emmc pins.
Reference commit id:185a9ad97acb1d0ee18b9af45a17e1d183af2674
Change-Id: I1e38a51eb1a4c1701866c1f45c8189eea9cd1337
Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
Previous pending L2 cache errors are cleared during the
cleanup phase before transferring the control to linux.
Change-Id: I3a54c64049135e150c2b49b0d6de1667511b6a14
