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ipq40xx: mmc: Enabled SDHCI ADMA support

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This patch enables SDHCI mode and also supports
data transfer using ADMA method.

Change-Id: Idafb0ecd6cb3ddf28e18681f8823134be99574cd
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
This commit is contained in:
Rajkumar Ayyasamy 2018-03-08 15:25:01 +05:30
parent f46ee781bf
commit 0effee2f25
3 changed files with 42 additions and 1 deletions
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38
board/qca/arm/ipq40xx/ipq40xx.c
View file

@ -33,12 +33,17 @@
#include "ipq40xx_edma_eth.h"
#include "qca_common.h"
#include "ipq_phy.h"
#include <sdhci.h>
#define DLOAD_MAGIC_COOKIE 0x10
#define TCSR_USB_HSPHY_DEVICE_MODE 0x00C700E70
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SDHCI_SUPPORT
qca_mmc mmc_host;
#else
struct sdhci_host mmc_host;
#endif
const char *rsvd_node = "/reserved-memory";
const char *del_node[] = {"rsvd1",
@ -230,6 +235,21 @@ int board_eth_init(bd_t *bis)
}
#ifdef CONFIG_QCA_MMC
void emmc_clock_reset(void)
{
writel(0x1, GCC_SDCC1_BCR);
udelay(10);
writel(0x0, GCC_SDCC1_BCR);
}
void emmc_sdhci_init(void)
{
writel(readl(MSM_SDC1_MCI_HC_MODE) & (~0x1), MSM_SDC1_MCI_HC_MODE);
writel(readl(MSM_SDC1_BASE) | (1 << 7), MSM_SDC1_BASE); //SW_RST
udelay(10);
writel(readl(MSM_SDC1_MCI_HC_MODE) | (0x1), MSM_SDC1_MCI_HC_MODE);
}
int board_mmc_init(bd_t *bis)
{
int ret;
@ -252,12 +272,30 @@ int board_mmc_init(bd_t *bis)
return -1;
}
#ifndef CONFIG_SDHCI_SUPPORT
mmc_host.base = base;
mmc_host.clk_mode = MMC_IDENTIFY_MODE;
emmc_clock_config(mmc_host.clk_mode);
ret = qca_mmc_init(bis, &mmc_host);
#else
mmc_host.ioaddr = (void *)MSM_SDC1_SDHCI_BASE;
mmc_host.voltages = MMC_VDD_165_195;
mmc_host.version = SDHCI_SPEC_300;
mmc_host.cfg.part_type = PART_TYPE_EFI;
mmc_host.quirks = SDHCI_QUIRK_BROKEN_VOLTAGE;
emmc_clock_disable();
emmc_clock_reset();
udelay(10);
emmc_clock_config(MMC_DATA_TRANSFER_SDHCI_MODE);
emmc_sdhci_init();
if (add_sdhci(&mmc_host, 200000000, 400000)) {
printf("add_sdhci fail!\n");
return -1;
}
#endif
if (!ret && sfi->flash_type == SMEM_BOOT_MMC_FLASH) {
ret = board_mmc_env_init(mmc_host);
}

2
board/qca/arm/ipq40xx/ipq40xx.h
View file

@ -26,11 +26,11 @@
#endif
#define MAX_CONF_NAME 5
#define GCC_BLSP1_UART1_APPS_CBCR 0x0180203c
#define GCC_SDCC1_BCR 0x1818000
#define KERNEL_AUTH_CMD 0x13
unsigned int smem_get_board_machtype(void);
extern qca_mmc mmc_host;
#define IPQ40XX_EDMA_DEV 1
typedef struct {

3
include/configs/ipq40xx.h
View file

@ -301,10 +301,13 @@ typedef struct {
#define CONFIG_MMC
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_CMD_MMC
#define CONFIG_SDHCI
#define CONFIG_SDHCI_QCA
#define CONFIG_GENERIC_MMC
#define CONFIG_EFI_PARTITION
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SDHCI_SUPPORT
#define CONFIG_MMC_ADMA
#endif
#define PCI_MAX_DEVICES 1