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https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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Merge "ipq40xx: spi: Added support for GD25Q256"
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commit
463c793088
6 changed files with 25 additions and 1 deletions
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@ -79,4 +79,5 @@ extern int dump_entries_s;
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#define MMC_MODE_HC 0x800
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#define SPI_DEFAULT_ADDR_LEN 3
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#define SPI_MAX_ADDR_LEN 4
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#endif /* __QCA_COMMON_H_ */
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@ -337,3 +337,8 @@ int apps_iscrashed(void)
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return 0;
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}
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unsigned int get_smem_spi_addr_len(void)
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{
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return SPI_MAX_ADDR_LEN;
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}
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@ -57,6 +57,8 @@ enum spi_nor_option_flags {
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#define SPI_FLASH_4B_ADDR_LEN 4
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#define SPI_FLASH_16MB_BOUN 0x1000000
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#define SPI_FLASH_CMD_EN4B 0xb7 /* Enter 4-byte mode */
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/* CFI Manufacture ID's */
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#define SPI_FLASH_CFI_MFR_SPANSION 0x01
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#define SPI_FLASH_CFI_MFR_STMICRO 0x20
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@ -64,6 +66,7 @@ enum spi_nor_option_flags {
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#define SPI_FLASH_CFI_MFR_SST 0xbf
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#define SPI_FLASH_CFI_MFR_WINBOND 0xef
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#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
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#define SPI_FLASH_CFI_MFR_GIGA 0xc8
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/* Erase commands */
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#define CMD_ERASE_4K 0x20
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@ -36,6 +36,7 @@ const struct spi_flash_params spi_flash_params_table[] = {
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{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K},
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{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K},
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{"GD25Q128", 0xc84018, 0x0, 64 * 1024, 256, RD_NORM, SECT_4K},
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{"GD25Q256", 0xc84019, 0x0, 64 * 1024, 512, RD_NORM, SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
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{"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, RD_NORM, 0},
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@ -1102,12 +1102,24 @@ int spi_flash_scan(struct spi_flash *flash)
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}
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flash->addr_width = SPI_FLASH_3B_ADDR_LEN;
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printf("SPI_ADDR_LEN=%x\n",get_smem_spi_addr_len());
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if ((flash->size > SPI_FLASH_16MB_BOUN) &&
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(get_smem_spi_addr_len() == SPI_FLASH_4B_ADDR_LEN)) {
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#ifndef CONFIG_IPQ_4B_ADDR_SWITCH_REQD
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if (idcode[0] == SPI_FLASH_CFI_MFR_WINBOND)
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flash->addr_width = SPI_FLASH_4B_ADDR_LEN;
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#else
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if (idcode[0] == SPI_FLASH_CFI_MFR_GIGA) {
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ret = spi_flash_cmd(spi, SPI_FLASH_CMD_EN4B, NULL, 0);
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if (ret) {
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printf("SF:Failed to switch to 4 byte mode\n");
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flash->size = 0x1000000;
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} else
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flash->addr_width = SPI_FLASH_4B_ADDR_LEN;
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}
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#endif
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}
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printf("SPI_ADDR_LEN=%x\n",flash->addr_width);
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#ifdef CONFIG_SPI_FLASH_STMICRO
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if (params->flags & E_FSR)
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flash->flags |= SNOR_F_USE_FSR;
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@ -302,4 +302,6 @@ typedef struct {
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#define CONFIG_CMD_PCI
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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#define CONFIG_IPQ_4B_ADDR_SWITCH_REQD
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#endif /* _IPQ40XX_H */
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