Previously the MAX_NAND_PAGE_SIZE was defined as 2K
during when we will face issues when dumping to
flash in nand-4k. This patch updates the max size
to 4K to support the same in nand-4k.
Change-Id: Idcec9998f56df1db21fc03097d0454efd81bbbd3
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
Currently, if atf env is set in the secure board. secure boot
sequence gets bypassed. This is not an expected behaviour. So,
removed support the atf env variable. Instead atf enabled status
can be verified using get_secure_state scm call.
Moreover, as per current design get_secure_state scm call will
not be implemented in ATF in future as well. If its implemented,
Bit 7 should be made to 1.
Change-Id: I0adcfac7bbcb10fe6906fd8a3f10a440ec7080ae
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This change fixup the magic word (0xBAD0FF5E) instead of zero.
So the uboot will skip setting qcom,training_offset
if the serial training partition is not present in flash.
Change-Id: I0ee8c9475e1153fdbc295691ceb2a4b1d6fdd394
Signed-off-by: Saahil Tomar <quic_saahtoma@quicinc.com>
UBI32 cores are not used in IPQ9574. So, this patch power
collapses all 4 UBI32 cores.
Change-Id: I50e3d963543303440c6af288af1c874717316b35
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
This patch updates the following:
1) Initializes I2C QUP clocks in U-Boot itself as required
without depending on SBL.
2) Removes all CONFIG_IPQ9574_RUMI references.
Change-Id: I1fb02861a70bd2b024122fff7810c3373cc2e1cd
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
The features are similar to MP03.1 RDP.
The only difference is PINE in lane 2 is replaced by WKK.
Change-Id: Ifa83c640307081e2511ab5d8728871a8344207c4
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
Currently, all mbn header based signed images can be booted on
non-secure board, whereas the signed elf images cannot.
So, added support to boot the signed elf image on non-secure board
by skipping the elf header offset.
Change-Id: Ib5eb5370bea626106028866b33b4dc658744f081
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This change will read the 0:ART partition for calibration data and
apply it to the appropriate registers.
Following sequence added for the same.
1. created scm_read call to read the protected register.
2. added function to read data from ART partition of all flash types
3. added function to apply data to the Caldata register.
Change-Id: I4c769be3cdf664e4c59159851cc211fca53c0f27
Signed-off-by: Ignatius Michael (Jihan) Jihan <quic_mignatiu@quicinc.com>
This change will fetch "qti,scm_restart_reason" node
from soc node, if it is not available under root node.
Change-Id: I2328dee16d0133be54abd9f565a1a34afb8241b6
Signed-off-by: Kavin A <quic_kavia@quicinc.com>
Currently, FDT fixup is happening after the initialization of the
driver model. But, it has to be done before that, otherwise, FDT
offsets configured in the drivers gets changed,
So, do ipq_uboot_fdt_fixup before driver model gets initialized by
calling it from board_fix_fdt. While at it, enabled the
CONFIG_OF_BOARD_FIXUP config in the required ipq specific defconfigs.
Change-Id: Ib05b9ab33b11716d5ca8db4afd6810e37982a443
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
After secure sysupgrade, uboot/TZ successfully authenticates
rootfs even if the signature & certificates are not appended
to kernel image. This is because the header and certificates
copied to DDR memory before sysupgrade is retained. Updated
the code to clear this DDR memory after authentication.
Change-Id: Ic2331326baefc945c217a507d4379951dba821ab
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This change support both legacy and current node
configuration.
Change-Id: I2a930950472119210961238d39dd00f9482cbe6e
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Add failsafe boot support to recover from system hang.
Signed-off-by: anusha <anusharao@codeaurora.org>
Change-Id: I49e28a4e88aa16e564065d06f8701dc4f6cb3555
Enabling the RE bit causes some issue in Kernel
when rcgr is configured.
Currently the RE bit is not set for these clocks
in Kernel as well and so reverting the same.
Change-Id: I12e29863531b64637d906026cab4374b49268cd0
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch updates the following:
1) Updates NSS NOC clock frequencies to expected clock rates
2) Add Debug prints during eth_halt which can help debug issues
3) Update ACL structure and configurations for ipq9574 platform
as required
4) Disable the MIB counters reset bit so that those counter
registers values can be dumped to check stats
5) Update VSI configurations for cases when BRIDGED_MODE config
is disabled
6) Update the VSI configuration to avoid flooding from one LAN
port to another
Change-Id: I39f20a57c08205fbeb669c93b6459cf8e184098d
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
On Linux-5.4 dts, SDX status GPIO pinmux node has
changed. Add new patch instruction for the same.
Change-Id: I0235f2a2ee335c7f916644c87f5cd7ed16174554
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
The command dpr_execute <load_address_of_dpr_binary>
is defined for the user to initiate DPR processing.
Uboot will raise scm call to TZ and pass the DPR load address.
Change-Id: Ide4495b49485a4ac6b722f0cb7d423d6a93946ca
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
The MMC mode switch command gets timed out occassionally.
Due to this, set_uuid_bootargs fails and uboot doesn't
jump to kernel. This issue is seen only in norplusemmc boot.
In eMMC Boot, board_mmc_env_init is called which handles
timeout case. Added the same logic to set_uuid_bootargs.
Change-Id: Ie9eb91b00f28c23c136d88e3cb39572e59c759e7
Signed-off-by: anusha <anusharao@codeaurora.org>
This change support both legacy and current node
configuration
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Change-Id: I12551970f16ec09a648bac2ecb1a45edeffd997c
Include SCM call to inform TZ whether HLOS boots from
primary or secondary partition
Change-Id: Ib1fa2b3c12762d1deed5b99f025c83870c142fa6
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Updated the source from gpll0_out_aux to gpll0_out_main
Change-Id: Iecaefbe03c02286823d1a67ea53b180bfd8d948e
Signed-off-by: anusha <anusharao@codeaurora.org>
This changes add SKU validation support in PCI driver
the valdiation api given as weak for non SKU supported platform.
Change-Id: I32985be1e06e9cb07d28edfba50299bb7eaa3cc5
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
