This patch does minor code reorganization to store spare, ecc and
bbm bytes in nand device structure which will be useful in
subsequent patches.
Change-Id: Id44c53e204a874569968764798c346a609695acf
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Following are the major issues in current implementation for
checking the read errors
1. For checking the erased CW, NAND_ERASED_CW_DETECT_STATUS
is being read inside qpic_nand_check_status. The
qpic_nand_check_status will be called after complete page read
so reading status register won’t help in getting the register
value after each CW reads.
2. The mtd layer expects the driver to return non-negative
integer representing the maximum number of bitflips that were
corrected on any one ecc region. The mtd layer takes care of
returning EUCLEAN based on returned number.
3. mtd->ecc_stats is only applicable when ECC engine is
doing ECC correction. For raw reads, the stats should not be
incremented.
Now the changes have been done to reorganize the error handling
1. schedule the NAND_ERASED_CW_DETECT_STATUS reading after
every CW read and check the same if ECC engine generates
uncorrectable error.
2. For raw read, the ECC engine will never generate the
uncorrectable error or erased CW so check only
NAND_FLASH_STATUS.
3. The qpic_nand_read_oob should return the maximum number
of bitflips that were corrected on any one ecc region so
introduce the max_bitflips for maintaining the same.
4. The read should return the complete data in case of
BADMSG so move the BADMSG check in the main read function.
Change-Id: Ibef56294ace00d7cd67b501f623fb1d3aeb2c6ec
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
1. ecc strength can be assigned in mtd structure itself so
remove the ecc_width from qpic nand dev structure
2. Initialize bitflip_threshold with 3*4 of ecc strength so
that MTD layer will return EUCLEAN if number of ecc correction
are more than bitflip_threshold.
Change-Id: Ieafd1957b89a05f9dd0fdfe829712d8891bd6a48
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
NANDC_RESULT_BAD_PAGE is not being returned by any operation, so
it can be removed.
Change-Id: Ia90e4e6b7ef7577d069d312d51083b50f49bf980
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Print spi 3 byte address by default if the
SMEM_SPI_FLASH_ADDR_LEN ID is not passed in smem.
Change-Id: I6b55401adb89a1341130465ae307c30901ce7895
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
This change adds support to check devcfg version and
allows sysupgrade only if the version is higher.
Change-Id: I7192f428c50c1b1b9eeddd1aac0d57d341d32436
Signed-off-by: Pavithra Palanisamy <pavip@codeaurora.org>
This patch enables SDHCI mode and also supports
data transfer using ADMA method.
Change-Id: Ia3187fec9024ad0972ca720cf0b9ddc6a59b906c
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
QUADRO test suite detects EBICS0.BIN file for crash dump,
Change in this sequence resulted in wrong dump collection,
Changing the dump sequence to suit QUADRO test needs.
Change-Id: I6f32421b47252474b6b6f9922dea8f621388bc6b
Signed-off-by: Venkat Raju Sana <vrsana@codeaurora.org>
Added support to choose FIT image config by
setting environment variable 'config_name'.
Setting environment variable will override
device tree entry.
Change-Id: I4d418b840a0e7e6c71d2c681b6929ef58cf0e570
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Reset command must be the first command issued to all
targets after the NAND flash device is powered on.
Change-Id: I617dc5b0ad8d72705dcf20f1cb554134b166e533
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
This SMEM type is to determine the spi flash addr is in 3 byte
or 4 byte.
Change-Id: I705a9c5c6f760b93e112a873ead41cd76520501b
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Currently our sysupgrade is comparing the calculated hash,
and referenced hash using strcmp(), A valid binary hash can
contain zeros or null, this can make strcmp() to stop when it
encounters a zero or null. To check the entire hash, not just
the bytes of the hash up to the first zero, we will use memcmp().
The existing code uses mbn_header->code_size for calculating
source offset from the image, this change adds mbn_header_size
for the calculation.
Change-Id: Iaae39d04e8e4aafc686a5acbc499b11b2b8d6602
Signed-off-by: Pavithra Palanisamy <pavip@codeaurora.org>
The existing sysupgrade treats all images as 32-bit image.
This change adds a check to signify the image class and
adds functions to process the headers respectively.
Change-Id: I04040fdc6e1a9c6c2df2407cd4b26dddaf4a008c
Signed-off-by: Pavithra Palanisamy <pavip@codeaurora.org>
Added a separate dumpinfo entry for
Secure boot to skip secure region.
Change-Id: Ib3836a851e8b0603a9c08013de293dcbe8e3c0fb
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
MDIO clock divider is set to 0x7 (counts to 8)
to produce 12.5MHz (100MHz/8) MDC frequency.
Change-Id: Ic7969aebf9fcbb14601ba8e56563959ab0b25657
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
